src/mesa/drivers/dri/i965/brw_wm.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_WM_H
  34 #define BRW_WM_H
  35
  36
  37 #include "program/prog_instruction.h"
  38 #include "brw_context.h"
  39 #include "brw_eu.h"
  40
  41 #define SATURATE (1<<5)
  42
  43 /* A big lookup table is used to figure out which and how many
  44  * additional regs will inserted before the main payload in the WM
  45  * program execution.  These mainly relate to depth and stencil
  46  * processing and the early-depth-test optimization.
  47  */
  48 #define IZ_PS_KILL_ALPHATEST_BIT    0x1
  49 #define IZ_PS_COMPUTES_DEPTH_BIT    0x2
  50 #define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
  51 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
  52 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
  53 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
  54 #define IZ_BIT_MAX                  0x40
  55
  56 #define AA_NEVER     0
  57 #define AA_SOMETIMES 1
  58 #define AA_ALWAYS    2
  59
  60 struct brw_wm_prog_key {
  61    GLuint source_depth_reg:3;
  62    GLuint source_w_reg:3;
  63    GLuint aa_dest_stencil_reg:3;
  64    GLuint dest_depth_reg:3;
  65    GLuint nr_payload_regs:4;
  66    GLuint computes_depth:1;     /* could be derived from program string */
  67    GLuint source_depth_to_render_target:1;
  68    GLuint flat_shade:1;
  69    GLuint linear_color:1;  /**< linear interpolation vs perspective interp */
  70    GLuint runtime_check_aads_emit:1;
  71    GLuint nr_color_regions:5;
  72
  73    GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */
  74    GLuint shadowtex_mask:16;
  75    GLuint yuvtex_mask:16;
  76    GLuint yuvtex_swap_mask:16;  /* UV swaped */
  77
  78    GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
  79
  80    GLushort drawable_height;
  81    GLbitfield64 vp_outputs_written;
  82    GLuint program_string_id:32;
  83 };
  84
  85
  86 /* A bit of a glossary:
  87  *
  88  * brw_wm_value: A computed value or program input.  Values are
  89  * constant, they are created once and are never modified.  When a
  90  * fragment program register is written or overwritten, new values are
  91  * created fresh, preserving the rule that values are constant.
  92  *
  93  * brw_wm_ref: A reference to a value.  Wherever a value used is by an
  94  * instruction or as a program output, that is tracked with an
  95  * instance of this struct.  All references to a value occur after it
  96  * is created.  After the last reference, a value is dead and can be
  97  * discarded.
  98  *
  99  * brw_wm_grf: Represents a physical hardware register.  May be either
 100  * empty or hold a value.  Register allocation is the process of
 101  * assigning values to grf registers.  This occurs in pass2 and the
 102  * brw_wm_grf struct is not used before that.
 103  *
 104  * Fragment program registers: These are time-varying constructs that
 105  * are hard to reason about and which we translate away in pass0.  A
 106  * single fragment program register element (eg. temp[0].x) will be
 107  * translated to one or more brw_wm_value structs, one for each time
 108  * that temp[0].x is written to during the program.
 109  */
 110
 111
 112
 113 /* Used in pass2 to track register allocation.
 114  */
 115 struct brw_wm_grf {
 116    struct brw_wm_value *value;
 117    GLuint nextuse;
 118 };
 119
 120 struct brw_wm_value {
 121    struct brw_reg hw_reg;       /* emitted to this reg, may not always be there */
 122    struct brw_wm_ref *lastuse;
 123    struct brw_wm_grf *resident;
 124    GLuint contributes_to_output:1;
 125    GLuint spill_slot:16;        /* if non-zero, spill immediately after calculation */
 126 };
 127
 128 struct brw_wm_ref {
 129    struct brw_reg hw_reg;       /* nr filled in in pass2, everything else, pass0 */
 130    struct brw_wm_value *value;
 131    struct brw_wm_ref *prevuse;
 132    GLuint unspill_reg:7;        /* unspill to reg */
 133    GLuint emitted:1;
 134    GLuint insn:24;
 135 };
 136
 137 struct brw_wm_constref {
 138    const struct brw_wm_ref *ref;
 139    GLfloat constval;
 140 };
 141
 142
 143 struct brw_wm_instruction {
 144    struct brw_wm_value *dst[4];
 145    struct brw_wm_ref *src[3][4];
 146    GLuint opcode:8;
 147    GLuint saturate:1;
 148    GLuint writemask:4;
 149    GLuint tex_unit:4;   /* texture unit for TEX, TXD, TXP instructions */
 150    GLuint tex_idx:3;    /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
 151    GLuint tex_shadow:1; /* do shadow comparison? */
 152    GLuint eot:1;        /* End of thread indicator for FB_WRITE*/
 153    GLuint target:10;    /* target binding table index for FB_WRITE*/
 154 };
 155
 156
 157 #define BRW_WM_MAX_INSN  (MAX_PROGRAM_INSTRUCTIONS*3 + FRAG_ATTRIB_MAX + 3)
 158 #define BRW_WM_MAX_GRF   128            /* hardware limit */
 159 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
 160 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
 161 #define BRW_WM_MAX_PARAM 256
 162 #define BRW_WM_MAX_CONST 256
 163 #define BRW_WM_MAX_SUBROUTINE 16
 164
 165 /* used in masks next to WRITEMASK_*. */
 166 #define SATURATE (1<<5)
 167
 168
 169 /* New opcodes to track internal operations required for WM unit.
 170  * These are added early so that the registers used can be tracked,
 171  * freed and reused like those of other instructions.
 172  */
 173 #define WM_PIXELXY        (MAX_OPCODE)
 174 #define WM_DELTAXY        (MAX_OPCODE + 1)
 175 #define WM_PIXELW         (MAX_OPCODE + 2)
 176 #define WM_LINTERP        (MAX_OPCODE + 3)
 177 #define WM_PINTERP        (MAX_OPCODE + 4)
 178 #define WM_CINTERP        (MAX_OPCODE + 5)
 179 #define WM_WPOSXY         (MAX_OPCODE + 6)
 180 #define WM_FB_WRITE       (MAX_OPCODE + 7)
 181 #define WM_FRONTFACING    (MAX_OPCODE + 8)
 182 #define MAX_WM_OPCODE     (MAX_OPCODE + 9)
 183
 184 #define PROGRAM_PAYLOAD   (PROGRAM_FILE_MAX)
 185 #define NUM_FILES         (PROGRAM_PAYLOAD + 1)
 186
 187 #define PAYLOAD_DEPTH     (FRAG_ATTRIB_MAX)
 188 #define PAYLOAD_W         (FRAG_ATTRIB_MAX + 1)
 189 #define PAYLOAD_FP_REG_MAX (FRAG_ATTRIB_MAX + 2)
 190
 191 struct brw_wm_compile {
 192    struct brw_compile func;
 193    struct brw_wm_prog_key key;
 194    struct brw_wm_prog_data prog_data;
 195
 196    struct brw_fragment_program *fp;
 197
 198    GLfloat (*env_param)[4];
 199
 200    enum {
 201       START,
 202       PASS2_DONE
 203    } state;
 204
 205    /* Initial pass - translate fp instructions to fp instructions,
 206     * simplifying and adding instructions for interpolation and
 207     * framebuffer writes.
 208     */
 209    struct prog_instruction *prog_instructions;
 210    GLuint nr_fp_insns;
 211    GLuint fp_temp;
 212    GLuint fp_interp_emitted;
 213    GLuint fp_fragcolor_emitted;
 214
 215    struct prog_src_register pixel_xy;
 216    struct prog_src_register delta_xy;
 217    struct prog_src_register pixel_w;
 218
 219
 220    struct brw_wm_value *vreg;
 221    GLuint nr_vreg;
 222
 223    struct brw_wm_value creg[BRW_WM_MAX_PARAM];
 224    GLuint nr_creg;
 225
 226    struct {
 227       struct brw_wm_value depth[4]; /* includes r0/r1 */
 228       struct brw_wm_value input_interp[FRAG_ATTRIB_MAX];
 229    } payload;
 230
 231
 232    const struct brw_wm_ref *pass0_fp_reg[NUM_FILES][256][4];
 233
 234    struct brw_wm_ref undef_ref;
 235    struct brw_wm_value undef_value;
 236
 237    struct brw_wm_ref *refs;
 238    GLuint nr_refs;
 239
 240    struct brw_wm_instruction *instruction;
 241    GLuint nr_insns;
 242
 243    struct brw_wm_constref constref[BRW_WM_MAX_CONST];
 244    GLuint nr_constrefs;
 245
 246    struct brw_wm_grf pass2_grf[BRW_WM_MAX_GRF/2];
 247
 248    GLuint grf_limit;
 249    GLuint max_wm_grf;
 250    GLuint last_scratch;
 251
 252    GLuint cur_inst;  /**< index of current instruction */
 253
 254    GLboolean out_of_regs;  /**< ran out of GRF registers? */
 255
 256    /** Mapping from Mesa registers to hardware registers */
 257    struct {
 258       GLboolean inited;
 259       struct brw_reg reg;
 260    } wm_regs[NUM_FILES][256][4];
 261
 262    GLboolean used_grf[BRW_WM_MAX_GRF];
 263    GLuint first_free_grf;
 264    struct brw_reg stack;
 265    struct brw_reg emit_mask_reg;
 266    GLuint tmp_regs[BRW_WM_MAX_GRF];
 267    GLuint tmp_index;
 268    GLuint tmp_max;
 269    GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
 270    GLuint dispatch_width;
 271
 272    /** we may need up to 3 constants per instruction (if use_const_buffer) */
 273    struct {
 274       GLint index;
 275       struct brw_reg reg;
 276    } current_const[3];
 277 };
 278
 279
 280 /** Bits for prog_instruction::Aux field */
 281 #define INST_AUX_EOT      0x1
 282 #define INST_AUX_TARGET(T)  (T << 1)
 283 #define INST_AUX_GET_TARGET(AUX) ((AUX) >> 1)
 284
 285
 286 GLuint brw_wm_nr_args( GLuint opcode );
 287 GLuint brw_wm_is_scalar_result( GLuint opcode );
 288
 289 void brw_wm_pass_fp( struct brw_wm_compile *c );
 290 void brw_wm_pass0( struct brw_wm_compile *c );
 291 void brw_wm_pass1( struct brw_wm_compile *c );
 292 void brw_wm_pass2( struct brw_wm_compile *c );
 293 void brw_wm_emit( struct brw_wm_compile *c );
 294 GLboolean brw_wm_arg_can_be_immediate(enum prog_opcode, int arg);
 295 void brw_wm_print_value( struct brw_wm_compile *c,
 296                          struct brw_wm_value *value );
 297
 298 void brw_wm_print_ref( struct brw_wm_compile *c,
 299                        struct brw_wm_ref *ref );
 300
 301 void brw_wm_print_insn( struct brw_wm_compile *c,
 302                         struct brw_wm_instruction *inst );
 303
 304 void brw_wm_print_program( struct brw_wm_compile *c,
 305                            const char *stage );
 306
 307 void brw_wm_lookup_iz( struct intel_context *intel,
 308                        GLuint line_aa,
 309                        GLuint lookup,
 310                        GLboolean ps_uses_depth,
 311                        struct brw_wm_prog_key *key );
 312
 313 GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp);
 314 void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c);
 315 GLboolean brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c);
 316
 317 /* brw_wm_emit.c */
 318 void emit_alu1(struct brw_compile *p,
 319                struct brw_instruction *(*func)(struct brw_compile *,
 320                                                struct brw_reg,
 321                                                struct brw_reg),
 322                const struct brw_reg *dst,
 323                GLuint mask,
 324                const struct brw_reg *arg0);
 325 void emit_alu2(struct brw_compile *p,
 326                struct brw_instruction *(*func)(struct brw_compile *,
 327                                                struct brw_reg,
 328                                                struct brw_reg,
 329                                                struct brw_reg),
 330                const struct brw_reg *dst,
 331                GLuint mask,
 332                const struct brw_reg *arg0,
 333                const struct brw_reg *arg1);
 334 void emit_cinterp(struct brw_compile *p,
 335                   const struct brw_reg *dst,
 336                   GLuint mask,
 337                   const struct brw_reg *arg0);
 338 void emit_cmp(struct brw_compile *p,
 339               const struct brw_reg *dst,
 340               GLuint mask,
 341               const struct brw_reg *arg0,
 342               const struct brw_reg *arg1,
 343               const struct brw_reg *arg2);
 344 void emit_ddxy(struct brw_compile *p,
 345                const struct brw_reg *dst,
 346                GLuint mask,
 347                GLboolean is_ddx,
 348                const struct brw_reg *arg0);
 349 void emit_delta_xy(struct brw_compile *p,
 350                    const struct brw_reg *dst,
 351                    GLuint mask,
 352                    const struct brw_reg *arg0);
 353 void emit_dp2(struct brw_compile *p,
 354               const struct brw_reg *dst,
 355               GLuint mask,
 356               const struct brw_reg *arg0,
 357               const struct brw_reg *arg1);
 358 void emit_dp3(struct brw_compile *p,
 359               const struct brw_reg *dst,
 360               GLuint mask,
 361               const struct brw_reg *arg0,
 362               const struct brw_reg *arg1);
 363 void emit_dp4(struct brw_compile *p,
 364               const struct brw_reg *dst,
 365               GLuint mask,
 366               const struct brw_reg *arg0,
 367               const struct brw_reg *arg1);
 368 void emit_dph(struct brw_compile *p,
 369               const struct brw_reg *dst,
 370               GLuint mask,
 371               const struct brw_reg *arg0,
 372               const struct brw_reg *arg1);
 373 void emit_fb_write(struct brw_wm_compile *c,
 374                    struct brw_reg *arg0,
 375                    struct brw_reg *arg1,
 376                    struct brw_reg *arg2,
 377                    GLuint target,
 378                    GLuint eot);
 379 void emit_frontfacing(struct brw_compile *p,
 380                       const struct brw_reg *dst,
 381                       GLuint mask);
 382 void emit_kil_nv(struct brw_wm_compile *c);
 383 void emit_linterp(struct brw_compile *p,
 384                   const struct brw_reg *dst,
 385                   GLuint mask,
 386                   const struct brw_reg *arg0,
 387                   const struct brw_reg *deltas);
 388 void emit_lrp(struct brw_compile *p,
 389               const struct brw_reg *dst,
 390               GLuint mask,
 391               const struct brw_reg *arg0,
 392               const struct brw_reg *arg1,
 393               const struct brw_reg *arg2);
 394 void emit_mad(struct brw_compile *p,
 395               const struct brw_reg *dst,
 396               GLuint mask,
 397               const struct brw_reg *arg0,
 398               const struct brw_reg *arg1,
 399               const struct brw_reg *arg2);
 400 void emit_math1(struct brw_wm_compile *c,
 401                 GLuint function,
 402                 const struct brw_reg *dst,
 403                 GLuint mask,
 404                 const struct brw_reg *arg0);
 405 void emit_math2(struct brw_wm_compile *c,
 406                 GLuint function,
 407                 const struct brw_reg *dst,
 408                 GLuint mask,
 409                 const struct brw_reg *arg0,
 410                 const struct brw_reg *arg1);
 411 void emit_min(struct brw_compile *p,
 412               const struct brw_reg *dst,
 413               GLuint mask,
 414               const struct brw_reg *arg0,
 415               const struct brw_reg *arg1);
 416 void emit_max(struct brw_compile *p,
 417               const struct brw_reg *dst,
 418               GLuint mask,
 419               const struct brw_reg *arg0,
 420               const struct brw_reg *arg1);
 421 void emit_pinterp(struct brw_compile *p,
 422                   const struct brw_reg *dst,
 423                   GLuint mask,
 424                   const struct brw_reg *arg0,
 425                   const struct brw_reg *deltas,
 426                   const struct brw_reg *w);
 427 void emit_pixel_xy(struct brw_wm_compile *c,
 428                    const struct brw_reg *dst,
 429                    GLuint mask);
 430 void emit_pixel_w(struct brw_wm_compile *c,
 431                   const struct brw_reg *dst,
 432                   GLuint mask,
 433                   const struct brw_reg *arg0,
 434                   const struct brw_reg *deltas);
 435 void emit_sop(struct brw_compile *p,
 436               const struct brw_reg *dst,
 437               GLuint mask,
 438               GLuint cond,
 439               const struct brw_reg *arg0,
 440               const struct brw_reg *arg1);
 441 void emit_sign(struct brw_compile *p,
 442                const struct brw_reg *dst,
 443                GLuint mask,
 444                const struct brw_reg *arg0);
 445 void emit_tex(struct brw_wm_compile *c,
 446               struct brw_reg *dst,
 447               GLuint dst_flags,
 448               struct brw_reg *arg,
 449               struct brw_reg depth_payload,
 450               GLuint tex_idx,
 451               GLuint sampler,
 452               GLboolean shadow);
 453 void emit_txb(struct brw_wm_compile *c,
 454               struct brw_reg *dst,
 455               GLuint dst_flags,
 456               struct brw_reg *arg,
 457               struct brw_reg depth_payload,
 458               GLuint tex_idx,
 459               GLuint sampler);
 460 void emit_wpos_xy(struct brw_wm_compile *c,
 461                   const struct brw_reg *dst,
 462                   GLuint mask,
 463                   const struct brw_reg *arg0);
 464 void emit_xpd(struct brw_compile *p,
 465               const struct brw_reg *dst,
 466               GLuint mask,
 467               const struct brw_reg *arg0,
 468               const struct brw_reg *arg1);
 469
 470 GLboolean brw_compile_shader(GLcontext *ctx,
 471                              struct gl_shader *shader);
 472 GLboolean brw_link_shader(GLcontext *ctx, struct gl_shader_program *prog);
 473 struct gl_shader *brw_new_shader(GLcontext *ctx, GLuint name, GLuint type);
 474 struct gl_shader_program *brw_new_shader_program(GLcontext *ctx, GLuint name);
 475
 476 GLboolean brw_do_channel_expressions(struct exec_list *instructions);
 477 GLboolean brw_do_vector_splitting(struct exec_list *instructions);
 478
 479 #endif