src/mesa/drivers/dri/i965/brw_wm.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_WM_H
  34 #define BRW_WM_H
  35
  36 #include <stdbool.h>
  37
  38 #include "program/prog_instruction.h"
  39 #include "brw_context.h"
  40 #include "brw_eu.h"
  41
  42 #define SATURATE (1<<5)
  43
  44 /* A big lookup table is used to figure out which and how many
  45  * additional regs will inserted before the main payload in the WM
  46  * program execution.  These mainly relate to depth and stencil
  47  * processing and the early-depth-test optimization.
  48  */
  49 #define IZ_PS_KILL_ALPHATEST_BIT    0x1
  50 #define IZ_PS_COMPUTES_DEPTH_BIT    0x2
  51 #define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
  52 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
  53 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
  54 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
  55 #define IZ_BIT_MAX                  0x40
  56
  57 #define AA_NEVER     0
  58 #define AA_SOMETIMES 1
  59 #define AA_ALWAYS    2
  60
  61 struct brw_wm_prog_key {
  62    uint8_t iz_lookup;
  63    GLuint stats_wm:1;
  64    GLuint flat_shade:1;
  65    GLuint nr_color_regions:5;
  66    GLuint render_to_fbo:1;
  67    GLuint alpha_test:1;
  68    GLuint clamp_fragment_color:1;
  69    GLuint line_aa:2;
  70
  71    GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */
  72    GLuint yuvtex_mask:16;
  73    GLuint yuvtex_swap_mask:16;  /* UV swaped */
  74    uint16_t gl_clamp_mask[3];
  75
  76    GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
  77    GLushort drawable_height;
  78    GLbitfield64 vp_outputs_written;
  79    GLuint program_string_id:32;
  80 };
  81
  82
  83 /* A bit of a glossary:
  84  *
  85  * brw_wm_value: A computed value or program input.  Values are
  86  * constant, they are created once and are never modified.  When a
  87  * fragment program register is written or overwritten, new values are
  88  * created fresh, preserving the rule that values are constant.
  89  *
  90  * brw_wm_ref: A reference to a value.  Wherever a value used is by an
  91  * instruction or as a program output, that is tracked with an
  92  * instance of this struct.  All references to a value occur after it
  93  * is created.  After the last reference, a value is dead and can be
  94  * discarded.
  95  *
  96  * brw_wm_grf: Represents a physical hardware register.  May be either
  97  * empty or hold a value.  Register allocation is the process of
  98  * assigning values to grf registers.  This occurs in pass2 and the
  99  * brw_wm_grf struct is not used before that.
 100  *
 101  * Fragment program registers: These are time-varying constructs that
 102  * are hard to reason about and which we translate away in pass0.  A
 103  * single fragment program register element (eg. temp[0].x) will be
 104  * translated to one or more brw_wm_value structs, one for each time
 105  * that temp[0].x is written to during the program.
 106  */
 107
 108
 109
 110 /* Used in pass2 to track register allocation.
 111  */
 112 struct brw_wm_grf {
 113    struct brw_wm_value *value;
 114    GLuint nextuse;
 115 };
 116
 117 struct brw_wm_value {
 118    struct brw_reg hw_reg;       /* emitted to this reg, may not always be there */
 119    struct brw_wm_ref *lastuse;
 120    struct brw_wm_grf *resident;
 121    GLuint contributes_to_output:1;
 122    GLuint spill_slot:16;        /* if non-zero, spill immediately after calculation */
 123 };
 124
 125 struct brw_wm_ref {
 126    struct brw_reg hw_reg;       /* nr filled in in pass2, everything else, pass0 */
 127    struct brw_wm_value *value;
 128    struct brw_wm_ref *prevuse;
 129    GLuint unspill_reg:7;        /* unspill to reg */
 130    GLuint emitted:1;
 131    GLuint insn:24;
 132 };
 133
 134 struct brw_wm_constref {
 135    const struct brw_wm_ref *ref;
 136    GLfloat constval;
 137 };
 138
 139
 140 struct brw_wm_instruction {
 141    struct brw_wm_value *dst[4];
 142    struct brw_wm_ref *src[3][4];
 143    GLuint opcode:8;
 144    GLuint saturate:1;
 145    GLuint writemask:4;
 146    GLuint tex_unit:4;   /* texture unit for TEX, TXD, TXP instructions */
 147    GLuint tex_idx:3;    /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
 148    GLuint tex_shadow:1; /* do shadow comparison? */
 149    GLuint eot:1;        /* End of thread indicator for FB_WRITE*/
 150    GLuint target:10;    /* target binding table index for FB_WRITE*/
 151 };
 152
 153
 154 #define BRW_WM_MAX_INSN  (MAX_PROGRAM_INSTRUCTIONS*3 + FRAG_ATTRIB_MAX + 3)
 155 #define BRW_WM_MAX_GRF   128            /* hardware limit */
 156 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
 157 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
 158 #define BRW_WM_MAX_PARAM 256
 159 #define BRW_WM_MAX_CONST 256
 160 #define BRW_WM_MAX_SUBROUTINE 16
 161
 162 /* used in masks next to WRITEMASK_*. */
 163 #define SATURATE (1<<5)
 164
 165
 166 /* New opcodes to track internal operations required for WM unit.
 167  * These are added early so that the registers used can be tracked,
 168  * freed and reused like those of other instructions.
 169  */
 170 #define WM_PIXELXY        (MAX_OPCODE)
 171 #define WM_DELTAXY        (MAX_OPCODE + 1)
 172 #define WM_PIXELW         (MAX_OPCODE + 2)
 173 #define WM_LINTERP        (MAX_OPCODE + 3)
 174 #define WM_PINTERP        (MAX_OPCODE + 4)
 175 #define WM_CINTERP        (MAX_OPCODE + 5)
 176 #define WM_WPOSXY         (MAX_OPCODE + 6)
 177 #define WM_FB_WRITE       (MAX_OPCODE + 7)
 178 #define WM_FRONTFACING    (MAX_OPCODE + 8)
 179 #define MAX_WM_OPCODE     (MAX_OPCODE + 9)
 180
 181 #define PROGRAM_PAYLOAD   (PROGRAM_FILE_MAX)
 182 #define NUM_FILES         (PROGRAM_PAYLOAD + 1)
 183
 184 #define PAYLOAD_DEPTH     (FRAG_ATTRIB_MAX)
 185 #define PAYLOAD_W         (FRAG_ATTRIB_MAX + 1)
 186 #define PAYLOAD_FP_REG_MAX (FRAG_ATTRIB_MAX + 2)
 187
 188 struct brw_wm_compile {
 189    struct brw_compile func;
 190    struct brw_wm_prog_key key;
 191    struct brw_wm_prog_data prog_data;
 192
 193    struct brw_fragment_program *fp;
 194
 195    GLfloat (*env_param)[4];
 196
 197    enum {
 198       START,
 199       PASS2_DONE
 200    } state;
 201
 202    uint8_t source_depth_reg;
 203    uint8_t source_w_reg;
 204    uint8_t aa_dest_stencil_reg;
 205    uint8_t dest_depth_reg;
 206    uint8_t nr_payload_regs;
 207    GLuint computes_depth:1;     /* could be derived from program string */
 208    GLuint source_depth_to_render_target:1;
 209    GLuint runtime_check_aads_emit:1;
 210
 211    /* Initial pass - translate fp instructions to fp instructions,
 212     * simplifying and adding instructions for interpolation and
 213     * framebuffer writes.
 214     */
 215    struct prog_instruction *prog_instructions;
 216    GLuint nr_fp_insns;
 217    GLuint fp_temp;
 218    GLuint fp_interp_emitted;
 219
 220    struct prog_src_register pixel_xy;
 221    struct prog_src_register delta_xy;
 222    struct prog_src_register pixel_w;
 223
 224
 225    struct brw_wm_value *vreg;
 226    GLuint nr_vreg;
 227
 228    struct brw_wm_value creg[BRW_WM_MAX_PARAM];
 229    GLuint nr_creg;
 230
 231    struct {
 232       struct brw_wm_value depth[4]; /* includes r0/r1 */
 233       struct brw_wm_value input_interp[FRAG_ATTRIB_MAX];
 234    } payload;
 235
 236
 237    const struct brw_wm_ref *pass0_fp_reg[NUM_FILES][256][4];
 238
 239    struct brw_wm_ref undef_ref;
 240    struct brw_wm_value undef_value;
 241
 242    struct brw_wm_ref *refs;
 243    GLuint nr_refs;
 244
 245    struct brw_wm_instruction *instruction;
 246    GLuint nr_insns;
 247
 248    struct brw_wm_constref constref[BRW_WM_MAX_CONST];
 249    GLuint nr_constrefs;
 250
 251    struct brw_wm_grf pass2_grf[BRW_WM_MAX_GRF/2];
 252
 253    GLuint grf_limit;
 254    GLuint max_wm_grf;
 255    GLuint last_scratch;
 256
 257    GLuint cur_inst;  /**< index of current instruction */
 258
 259    GLboolean out_of_regs;  /**< ran out of GRF registers? */
 260
 261    /** Mapping from Mesa registers to hardware registers */
 262    struct {
 263       GLboolean inited;
 264       struct brw_reg reg;
 265    } wm_regs[NUM_FILES][256][4];
 266
 267    GLboolean used_grf[BRW_WM_MAX_GRF];
 268    GLuint first_free_grf;
 269    struct brw_reg stack;
 270    struct brw_reg emit_mask_reg;
 271    GLuint tmp_regs[BRW_WM_MAX_GRF];
 272    GLuint tmp_index;
 273    GLuint tmp_max;
 274    GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
 275    GLuint dispatch_width;
 276
 277    /** we may need up to 3 constants per instruction (if use_const_buffer) */
 278    struct {
 279       GLint index;
 280       struct brw_reg reg;
 281    } current_const[3];
 282 };
 283
 284
 285 /** Bits for prog_instruction::Aux field */
 286 #define INST_AUX_EOT      0x1
 287 #define INST_AUX_TARGET(T)  (T << 1)
 288 #define INST_AUX_GET_TARGET(AUX) ((AUX) >> 1)
 289
 290
 291 GLuint brw_wm_nr_args( GLuint opcode );
 292 GLuint brw_wm_is_scalar_result( GLuint opcode );
 293
 294 void brw_wm_pass_fp( struct brw_wm_compile *c );
 295 void brw_wm_pass0( struct brw_wm_compile *c );
 296 void brw_wm_pass1( struct brw_wm_compile *c );
 297 void brw_wm_pass2( struct brw_wm_compile *c );
 298 void brw_wm_emit( struct brw_wm_compile *c );
 299 GLboolean brw_wm_arg_can_be_immediate(enum prog_opcode, int arg);
 300 void brw_wm_print_value( struct brw_wm_compile *c,
 301                          struct brw_wm_value *value );
 302
 303 void brw_wm_print_ref( struct brw_wm_compile *c,
 304                        struct brw_wm_ref *ref );
 305
 306 void brw_wm_print_insn( struct brw_wm_compile *c,
 307                         struct brw_wm_instruction *inst );
 308
 309 void brw_wm_print_program( struct brw_wm_compile *c,
 310                            const char *stage );
 311
 312 void brw_wm_lookup_iz(struct intel_context *intel,
 313                       struct brw_wm_compile *c);
 314
 315 bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c);
 316
 317 /* brw_wm_emit.c */
 318 void emit_alu1(struct brw_compile *p,
 319                struct brw_instruction *(*func)(struct brw_compile *,
 320                                                struct brw_reg,
 321                                                struct brw_reg),
 322                const struct brw_reg *dst,
 323                GLuint mask,
 324                const struct brw_reg *arg0);
 325 void emit_alu2(struct brw_compile *p,
 326                struct brw_instruction *(*func)(struct brw_compile *,
 327                                                struct brw_reg,
 328                                                struct brw_reg,
 329                                                struct brw_reg),
 330                const struct brw_reg *dst,
 331                GLuint mask,
 332                const struct brw_reg *arg0,
 333                const struct brw_reg *arg1);
 334 void emit_cinterp(struct brw_compile *p,
 335                   const struct brw_reg *dst,
 336                   GLuint mask,
 337                   const struct brw_reg *arg0);
 338 void emit_cmp(struct brw_compile *p,
 339               const struct brw_reg *dst,
 340               GLuint mask,
 341               const struct brw_reg *arg0,
 342               const struct brw_reg *arg1,
 343               const struct brw_reg *arg2);
 344 void emit_ddxy(struct brw_compile *p,
 345                const struct brw_reg *dst,
 346                GLuint mask,
 347                GLboolean is_ddx,
 348                const struct brw_reg *arg0);
 349 void emit_delta_xy(struct brw_compile *p,
 350                    const struct brw_reg *dst,
 351                    GLuint mask,
 352                    const struct brw_reg *arg0);
 353 void emit_dp2(struct brw_compile *p,
 354               const struct brw_reg *dst,
 355               GLuint mask,
 356               const struct brw_reg *arg0,
 357               const struct brw_reg *arg1);
 358 void emit_dp3(struct brw_compile *p,
 359               const struct brw_reg *dst,
 360               GLuint mask,
 361               const struct brw_reg *arg0,
 362               const struct brw_reg *arg1);
 363 void emit_dp4(struct brw_compile *p,
 364               const struct brw_reg *dst,
 365               GLuint mask,
 366               const struct brw_reg *arg0,
 367               const struct brw_reg *arg1);
 368 void emit_dph(struct brw_compile *p,
 369               const struct brw_reg *dst,
 370               GLuint mask,
 371               const struct brw_reg *arg0,
 372               const struct brw_reg *arg1);
 373 void emit_fb_write(struct brw_wm_compile *c,
 374                    struct brw_reg *arg0,
 375                    struct brw_reg *arg1,
 376                    struct brw_reg *arg2,
 377                    GLuint target,
 378                    GLuint eot);
 379 void emit_frontfacing(struct brw_compile *p,
 380                       const struct brw_reg *dst,
 381                       GLuint mask);
 382 void emit_linterp(struct brw_compile *p,
 383                   const struct brw_reg *dst,
 384                   GLuint mask,
 385                   const struct brw_reg *arg0,
 386                   const struct brw_reg *deltas);
 387 void emit_lrp(struct brw_compile *p,
 388               const struct brw_reg *dst,
 389               GLuint mask,
 390               const struct brw_reg *arg0,
 391               const struct brw_reg *arg1,
 392               const struct brw_reg *arg2);
 393 void emit_mad(struct brw_compile *p,
 394               const struct brw_reg *dst,
 395               GLuint mask,
 396               const struct brw_reg *arg0,
 397               const struct brw_reg *arg1,
 398               const struct brw_reg *arg2);
 399 void emit_math1(struct brw_wm_compile *c,
 400                 GLuint function,
 401                 const struct brw_reg *dst,
 402                 GLuint mask,
 403                 const struct brw_reg *arg0);
 404 void emit_math2(struct brw_wm_compile *c,
 405                 GLuint function,
 406                 const struct brw_reg *dst,
 407                 GLuint mask,
 408                 const struct brw_reg *arg0,
 409                 const struct brw_reg *arg1);
 410 void emit_min(struct brw_compile *p,
 411               const struct brw_reg *dst,
 412               GLuint mask,
 413               const struct brw_reg *arg0,
 414               const struct brw_reg *arg1);
 415 void emit_max(struct brw_compile *p,
 416               const struct brw_reg *dst,
 417               GLuint mask,
 418               const struct brw_reg *arg0,
 419               const struct brw_reg *arg1);
 420 void emit_pinterp(struct brw_compile *p,
 421                   const struct brw_reg *dst,
 422                   GLuint mask,
 423                   const struct brw_reg *arg0,
 424                   const struct brw_reg *deltas,
 425                   const struct brw_reg *w);
 426 void emit_pixel_xy(struct brw_wm_compile *c,
 427                    const struct brw_reg *dst,
 428                    GLuint mask);
 429 void emit_pixel_w(struct brw_wm_compile *c,
 430                   const struct brw_reg *dst,
 431                   GLuint mask,
 432                   const struct brw_reg *arg0,
 433                   const struct brw_reg *deltas);
 434 void emit_sop(struct brw_compile *p,
 435               const struct brw_reg *dst,
 436               GLuint mask,
 437               GLuint cond,
 438               const struct brw_reg *arg0,
 439               const struct brw_reg *arg1);
 440 void emit_sign(struct brw_compile *p,
 441                const struct brw_reg *dst,
 442                GLuint mask,
 443                const struct brw_reg *arg0);
 444 void emit_tex(struct brw_wm_compile *c,
 445               struct brw_reg *dst,
 446               GLuint dst_flags,
 447               struct brw_reg *arg,
 448               struct brw_reg depth_payload,
 449               GLuint tex_idx,
 450               GLuint sampler,
 451               GLboolean shadow);
 452 void emit_txb(struct brw_wm_compile *c,
 453               struct brw_reg *dst,
 454               GLuint dst_flags,
 455               struct brw_reg *arg,
 456               struct brw_reg depth_payload,
 457               GLuint tex_idx,
 458               GLuint sampler);
 459 void emit_wpos_xy(struct brw_wm_compile *c,
 460                   const struct brw_reg *dst,
 461                   GLuint mask,
 462                   const struct brw_reg *arg0);
 463 void emit_xpd(struct brw_compile *p,
 464               const struct brw_reg *dst,
 465               GLuint mask,
 466               const struct brw_reg *arg0,
 467               const struct brw_reg *arg1);
 468
 469 GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog);
 470 struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type);
 471 struct gl_shader_program *brw_new_shader_program(struct gl_context *ctx, GLuint name);
 472
 473 bool brw_color_buffer_write_enabled(struct brw_context *brw);
 474 bool brw_render_target_supported(gl_format format);
 475 void brw_wm_payload_setup(struct brw_context *brw,
 476                           struct brw_wm_compile *c);
 477
 478 #endif