src/mesa/drivers/dri/i965/brw_wm_debug.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_wm.h"
  35 #include "program.h"
  36 #include "shader/arbprogparse.h"
  37 #include "shader/program_instruction.h"
  38
  39 static const char *fp_opcode_string[] = {
  40    "ABS",               /* ARB_f_p only */
  41    "ADD",
  42    "CMP",               /* ARB_f_p only */
  43    "COS",
  44    "DDX",               /* NV_f_p only */
  45    "DDY",               /* NV_f_p only */
  46    "DP3",
  47    "DP4",
  48    "DPH",               /* ARB_f_p only */
  49    "DST",
  50    "END",               /* private opcode */
  51    "EX2",
  52    "FLR",
  53    "FRC",
  54    "KIL",               /* ARB_f_p only */
  55    "KIL_NV",            /* NV_f_p only */
  56    "LG2",
  57    "LIT",
  58    "LRP",
  59    "MAD",
  60    "MAX",
  61    "MIN",
  62    "MOV",
  63    "MUL",
  64    "PK2H",              /* NV_f_p only */
  65    "PK2US",             /* NV_f_p only */
  66    "PK4B",              /* NV_f_p only */
  67    "PK4UB",             /* NV_f_p only */
  68    "POW",
  69    "PRINT",             /* Mesa only */
  70    "RCP",
  71    "RFL",               /* NV_f_p only */
  72    "RSQ",
  73    "SCS",               /* ARB_f_p only */
  74    "SEQ",               /* NV_f_p only */
  75    "SFL",               /* NV_f_p only */
  76    "SGE",               /* NV_f_p only */
  77    "SGT",               /* NV_f_p only */
  78    "SIN",
  79    "SLE",               /* NV_f_p only */
  80    "SLT",
  81    "SNE",               /* NV_f_p only */
  82    "STR",               /* NV_f_p only */
  83    "SUB",
  84    "SWZ",               /* ARB_f_p only */
  85    "TEX",
  86    "TXB",               /* ARB_f_p only */
  87    "TXD",               /* NV_f_p only */
  88    "TXP",               /* ARB_f_p only */
  89    "TXP_NV",            /* NV_f_p only */
  90    "UP2H",              /* NV_f_p only */
  91    "UP2US",             /* NV_f_p only */
  92    "UP4B",              /* NV_f_p only */
  93    "UP4UB",             /* NV_f_p only */
  94    "X2D",               /* NV_f_p only - 2d mat mul */
  95    "XPD",               /* ARB_f_p only - cross product */
  96 };
  97
  98
  99
 100 void brw_wm_print_value( struct brw_wm_compile *c,
 101                        struct brw_wm_value *value )
 102 {
 103    assert(value);
 104    if (c->state >= PASS2_DONE)
 105       brw_print_reg(value->hw_reg);
 106    else if( value == &c->undef_value )
 107       _mesa_printf("undef");
 108    else if( value - c->vreg >= 0 &&
 109             value - c->vreg < BRW_WM_MAX_VREG)
 110       _mesa_printf("r%d", value - c->vreg);
 111    else if (value - c->creg >= 0 &&
 112             value - c->creg < BRW_WM_MAX_PARAM)
 113       _mesa_printf("c%d", value - c->creg);
 114    else if (value - c->payload.input_interp >= 0 &&
 115             value - c->payload.input_interp < FRAG_ATTRIB_MAX)
 116       _mesa_printf("i%d", value - c->payload.input_interp);
 117    else if (value - c->payload.depth >= 0 &&
 118             value - c->payload.depth < FRAG_ATTRIB_MAX)
 119       _mesa_printf("d%d", value - c->payload.depth);
 120    else
 121       _mesa_printf("?");
 122 }
 123
 124 void brw_wm_print_ref( struct brw_wm_compile *c,
 125                        struct brw_wm_ref *ref )
 126 {
 127    struct brw_reg hw_reg = ref->hw_reg;
 128
 129    if (ref->unspill_reg)
 130       _mesa_printf("UNSPILL(%x)/", ref->value->spill_slot);
 131
 132    if (c->state >= PASS2_DONE)
 133       brw_print_reg(ref->hw_reg);
 134    else {
 135       _mesa_printf("%s", hw_reg.negate ? "-" : "");
 136       _mesa_printf("%s", hw_reg.abs ? "abs/" : "");
 137       brw_wm_print_value(c, ref->value);
 138       if ((hw_reg.nr&1) || hw_reg.subnr) {
 139          _mesa_printf("->%d.%d", (hw_reg.nr&1), hw_reg.subnr);
 140       }
 141    }
 142 }
 143
 144 void brw_wm_print_insn( struct brw_wm_compile *c,
 145                         struct brw_wm_instruction *inst )
 146 {
 147    GLuint i, arg;
 148    GLuint nr_args = brw_wm_nr_args(inst->opcode);
 149
 150    _mesa_printf("[");
 151    for (i = 0; i < 4; i++) {
 152       if (inst->dst[i]) {
 153          brw_wm_print_value(c, inst->dst[i]);
 154          if (inst->dst[i]->spill_slot)
 155             _mesa_printf("/SPILL(%x)",inst->dst[i]->spill_slot);
 156       }
 157       else
 158          _mesa_printf("#");
 159       if (i < 3)
 160          _mesa_printf(",");
 161    }
 162    _mesa_printf("]");
 163
 164    if (inst->writemask != WRITEMASK_XYZW)
 165       _mesa_printf(".%s%s%s%s",
 166                    GET_BIT(inst->writemask, 0) ? "x" : "",
 167                    GET_BIT(inst->writemask, 1) ? "y" : "",
 168                    GET_BIT(inst->writemask, 2) ? "z" : "",
 169                    GET_BIT(inst->writemask, 3) ? "w" : "");
 170
 171    switch (inst->opcode) {
 172    case WM_PIXELXY:
 173       _mesa_printf(" = PIXELXY");
 174       break;
 175    case WM_DELTAXY:
 176       _mesa_printf(" = DELTAXY");
 177       break;
 178    case WM_PIXELW:
 179       _mesa_printf(" = PIXELW");
 180       break;
 181    case WM_WPOSXY:
 182       _mesa_printf(" = WPOSXY");
 183       break;
 184    case WM_PINTERP:
 185       _mesa_printf(" = PINTERP");
 186       break;
 187    case WM_LINTERP:
 188       _mesa_printf(" = LINTERP");
 189       break;
 190    case WM_CINTERP:
 191       _mesa_printf(" = CINTERP");
 192       break;
 193    case WM_FB_WRITE:
 194       _mesa_printf(" = FB_WRITE");
 195       break;
 196    default:
 197       _mesa_printf(" = %s", fp_opcode_string[inst->opcode]);
 198       break;
 199    }
 200
 201    if (inst->saturate)
 202       _mesa_printf("_SAT");
 203
 204    for (arg = 0; arg < nr_args; arg++) {
 205
 206       _mesa_printf(" [");
 207
 208       for (i = 0; i < 4; i++) {
 209          if (inst->src[arg][i]) {
 210             brw_wm_print_ref(c, inst->src[arg][i]);
 211          }
 212          else
 213             _mesa_printf("%%");
 214
 215          if (i < 3)
 216             _mesa_printf(",");
 217          else
 218             _mesa_printf("]");
 219       }
 220    }
 221    _mesa_printf("\n");
 222 }
 223
 224 void brw_wm_print_program( struct brw_wm_compile *c,
 225                            const char *stage )
 226 {
 227    GLuint insn;
 228
 229    _mesa_printf("\n\n\n%s:\n", stage);
 230    for (insn = 0; insn < c->nr_insns; insn++)
 231       brw_wm_print_insn(c, &c->instruction[insn]);
 232    _mesa_printf("\n\n\n");
 233 }
 234