2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "main/glheader.h"
34 #include "main/macros.h"
35 #include "main/enums.h"
36 #include "brw_context.h"
40 #include "shader/prog_parameter.h"
41 #include "shader/prog_print.h"
42 #include "shader/prog_statevars.h"
45 /** An invalid texture target */
46 #define TEX_TARGET_NONE NUM_TEXTURE_TARGETS
48 /** An invalid texture unit */
49 #define TEX_UNIT_NONE BRW_MAX_TEX_UNIT
51 #define FIRST_INTERNAL_TEMP MAX_NV_FRAGMENT_PROGRAM_TEMPS
59 static const char *wm_opcode_strings
[] = {
72 static const char *wm_file_strings
[] = {
78 /***********************************************************************
82 static struct prog_src_register
src_reg(GLuint file
, GLuint idx
)
84 struct prog_src_register reg
;
87 reg
.Swizzle
= SWIZZLE_NOOP
;
89 reg
.Negate
= NEGATE_NONE
;
94 static struct prog_src_register
src_reg_from_dst(struct prog_dst_register dst
)
96 return src_reg(dst
.File
, dst
.Index
);
99 static struct prog_src_register
src_undef( void )
101 return src_reg(PROGRAM_UNDEFINED
, 0);
104 static GLboolean
src_is_undef(struct prog_src_register src
)
106 return src
.File
== PROGRAM_UNDEFINED
;
109 static struct prog_src_register
src_swizzle( struct prog_src_register reg
, int x
, int y
, int z
, int w
)
111 reg
.Swizzle
= MAKE_SWIZZLE4(x
,y
,z
,w
);
115 static struct prog_src_register
src_swizzle1( struct prog_src_register reg
, int x
)
117 return src_swizzle(reg
, x
, x
, x
, x
);
120 static struct prog_src_register
src_swizzle4( struct prog_src_register reg
, uint swizzle
)
122 reg
.Swizzle
= swizzle
;
127 /***********************************************************************
131 static struct prog_dst_register
dst_reg(GLuint file
, GLuint idx
)
133 struct prog_dst_register reg
;
136 reg
.WriteMask
= WRITEMASK_XYZW
;
138 reg
.CondMask
= COND_TR
;
145 static struct prog_dst_register
dst_mask( struct prog_dst_register reg
, int mask
)
147 reg
.WriteMask
&= mask
;
151 static struct prog_dst_register
dst_undef( void )
153 return dst_reg(PROGRAM_UNDEFINED
, 0);
158 static struct prog_dst_register
get_temp( struct brw_wm_compile
*c
)
160 int bit
= _mesa_ffs( ~c
->fp_temp
);
163 _mesa_printf("%s: out of temporaries\n", __FILE__
);
167 c
->fp_temp
|= 1<<(bit
-1);
168 return dst_reg(PROGRAM_TEMPORARY
, FIRST_INTERNAL_TEMP
+(bit
-1));
172 static void release_temp( struct brw_wm_compile
*c
, struct prog_dst_register temp
)
174 c
->fp_temp
&= ~(1 << (temp
.Index
- FIRST_INTERNAL_TEMP
));
178 /***********************************************************************
182 static struct prog_instruction
*get_fp_inst(struct brw_wm_compile
*c
)
184 return &c
->prog_instructions
[c
->nr_fp_insns
++];
187 static struct prog_instruction
*emit_insn(struct brw_wm_compile
*c
,
188 const struct prog_instruction
*inst0
)
190 struct prog_instruction
*inst
= get_fp_inst(c
);
195 static struct prog_instruction
* emit_tex_op(struct brw_wm_compile
*c
,
197 struct prog_dst_register dest
,
200 GLuint tex_src_target
,
202 struct prog_src_register src0
,
203 struct prog_src_register src1
,
204 struct prog_src_register src2
)
206 struct prog_instruction
*inst
= get_fp_inst(c
);
208 assert(tex_src_unit
< BRW_MAX_TEX_UNIT
||
209 tex_src_unit
== TEX_UNIT_NONE
);
210 assert(tex_src_target
< NUM_TEXTURE_TARGETS
||
211 tex_src_target
== TEX_TARGET_NONE
);
213 /* update mask of which texture units are referenced by this program */
214 if (tex_src_unit
!= TEX_UNIT_NONE
)
215 c
->fp
->tex_units_used
|= (1 << tex_src_unit
);
217 memset(inst
, 0, sizeof(*inst
));
221 inst
->SaturateMode
= saturate
;
222 inst
->TexSrcUnit
= tex_src_unit
;
223 inst
->TexSrcTarget
= tex_src_target
;
224 inst
->TexShadow
= tex_shadow
;
225 inst
->SrcReg
[0] = src0
;
226 inst
->SrcReg
[1] = src1
;
227 inst
->SrcReg
[2] = src2
;
232 static struct prog_instruction
* emit_op(struct brw_wm_compile
*c
,
234 struct prog_dst_register dest
,
236 struct prog_src_register src0
,
237 struct prog_src_register src1
,
238 struct prog_src_register src2
)
240 return emit_tex_op(c
, op
, dest
, saturate
,
241 TEX_UNIT_NONE
, TEX_TARGET_NONE
, 0, /* unit, tgt, shadow */
246 /* Many Mesa opcodes produce the same value across all the result channels.
247 * We'd rather not have to support that splatting in the opcode implementations,
248 * and brw_wm_pass*.c wants to optimize them out by shuffling references around
249 * anyway. We can easily get both by emitting the opcode to one channel, and
250 * then MOVing it to the others, which brw_wm_pass*.c already understands.
252 static struct prog_instruction
*emit_scalar_insn(struct brw_wm_compile
*c
,
253 const struct prog_instruction
*inst0
)
255 struct prog_instruction
*inst
;
256 unsigned int dst_chan
;
257 unsigned int other_channel_mask
;
259 if (inst0
->DstReg
.WriteMask
== 0)
262 dst_chan
= _mesa_ffs(inst0
->DstReg
.WriteMask
) - 1;
263 inst
= get_fp_inst(c
);
265 inst
->DstReg
.WriteMask
= 1 << dst_chan
;
267 other_channel_mask
= inst0
->DstReg
.WriteMask
& ~(1 << dst_chan
);
268 if (other_channel_mask
!= 0) {
271 dst_mask(inst0
->DstReg
, other_channel_mask
),
273 src_swizzle1(src_reg_from_dst(inst0
->DstReg
), dst_chan
),
281 /***********************************************************************
282 * Special instructions for interpolation and other tasks
285 static struct prog_src_register
get_pixel_xy( struct brw_wm_compile
*c
)
287 if (src_is_undef(c
->pixel_xy
)) {
288 struct prog_dst_register pixel_xy
= get_temp(c
);
289 struct prog_src_register payload_r0_depth
= src_reg(PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
);
292 /* Emit the out calculations, and hold onto the results. Use
293 * two instructions as a temporary is required.
295 /* pixel_xy.xy = PIXELXY payload[0];
299 dst_mask(pixel_xy
, WRITEMASK_XY
),
305 c
->pixel_xy
= src_reg_from_dst(pixel_xy
);
311 static struct prog_src_register
get_delta_xy( struct brw_wm_compile
*c
)
313 if (src_is_undef(c
->delta_xy
)) {
314 struct prog_dst_register delta_xy
= get_temp(c
);
315 struct prog_src_register pixel_xy
= get_pixel_xy(c
);
316 struct prog_src_register payload_r0_depth
= src_reg(PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
);
318 /* deltas.xy = DELTAXY pixel_xy, payload[0]
322 dst_mask(delta_xy
, WRITEMASK_XY
),
328 c
->delta_xy
= src_reg_from_dst(delta_xy
);
334 static struct prog_src_register
get_pixel_w( struct brw_wm_compile
*c
)
336 if (src_is_undef(c
->pixel_w
)) {
337 struct prog_dst_register pixel_w
= get_temp(c
);
338 struct prog_src_register deltas
= get_delta_xy(c
);
339 struct prog_src_register interp_wpos
= src_reg(PROGRAM_PAYLOAD
, FRAG_ATTRIB_WPOS
);
341 /* deltas.xyw = DELTAS2 deltas.xy, payload.interp_wpos.x
345 dst_mask(pixel_w
, WRITEMASK_W
),
352 c
->pixel_w
= src_reg_from_dst(pixel_w
);
358 static void emit_interp( struct brw_wm_compile
*c
,
361 struct prog_dst_register dst
= dst_reg(PROGRAM_INPUT
, idx
);
362 struct prog_src_register interp
= src_reg(PROGRAM_PAYLOAD
, idx
);
363 struct prog_src_register deltas
= get_delta_xy(c
);
365 /* Need to use PINTERP on attributes which have been
366 * multiplied by 1/W in the SF program, and LINTERP on those
370 case FRAG_ATTRIB_WPOS
:
371 /* Have to treat wpos.xy specially:
375 dst_mask(dst
, WRITEMASK_XY
),
381 dst
= dst_mask(dst
, WRITEMASK_ZW
);
383 /* PROGRAM_INPUT.attr.xyzw = INTERP payload.interp[attr].x, deltas.xyw
393 case FRAG_ATTRIB_COL0
:
394 case FRAG_ATTRIB_COL1
:
395 if (c
->key
.flat_shade
) {
405 if (c
->key
.linear_color
) {
415 /* perspective-corrected color interpolation */
426 case FRAG_ATTRIB_FOGC
:
427 /* Interpolate the fog coordinate */
430 dst_mask(dst
, WRITEMASK_X
),
438 dst_mask(dst
, WRITEMASK_YZW
),
449 case FRAG_ATTRIB_FACE
:
450 /* XXX review/test this case */
453 dst_mask(dst
, WRITEMASK_X
),
460 case FRAG_ATTRIB_PNTC
:
461 /* XXX review/test this case */
464 dst_mask(dst
, WRITEMASK_XY
),
472 dst_mask(dst
, WRITEMASK_ZW
),
494 c
->fp_interp_emitted
|= 1<<idx
;
497 /***********************************************************************
498 * Hacks to extend the program parameter and constant lists.
501 /* Add the fog parameters to the parameter list of the original
502 * program, rather than creating a new list. Doesn't really do any
503 * harm and it's not as if the parameter handling isn't a big hack
506 static struct prog_src_register
search_or_add_param5(struct brw_wm_compile
*c
,
513 struct gl_program_parameter_list
*paramList
= c
->fp
->program
.Base
.Parameters
;
514 gl_state_index tokens
[STATE_LENGTH
];
522 for (idx
= 0; idx
< paramList
->NumParameters
; idx
++) {
523 if (paramList
->Parameters
[idx
].Type
== PROGRAM_STATE_VAR
&&
524 memcmp(paramList
->Parameters
[idx
].StateIndexes
, tokens
, sizeof(tokens
)) == 0)
525 return src_reg(PROGRAM_STATE_VAR
, idx
);
528 idx
= _mesa_add_state_reference( paramList
, tokens
);
530 return src_reg(PROGRAM_STATE_VAR
, idx
);
534 static struct prog_src_register
search_or_add_const4f( struct brw_wm_compile
*c
,
540 struct gl_program_parameter_list
*paramList
= c
->fp
->program
.Base
.Parameters
;
550 /* Have to search, otherwise multiple compilations will each grow
551 * the parameter list.
553 for (idx
= 0; idx
< paramList
->NumParameters
; idx
++) {
554 if (paramList
->Parameters
[idx
].Type
== PROGRAM_CONSTANT
&&
555 memcmp(paramList
->ParameterValues
[idx
], values
, sizeof(values
)) == 0)
557 /* XXX: this mimics the mesa bug which puts all constants and
558 * parameters into the "PROGRAM_STATE_VAR" category:
560 return src_reg(PROGRAM_STATE_VAR
, idx
);
563 idx
= _mesa_add_unnamed_constant( paramList
, values
, 4, &swizzle
);
564 assert(swizzle
== SWIZZLE_NOOP
); /* Need to handle swizzle in reg setup */
565 return src_reg(PROGRAM_STATE_VAR
, idx
);
570 /***********************************************************************
571 * Expand various instructions here to simpler forms.
573 static void precalc_dst( struct brw_wm_compile
*c
,
574 const struct prog_instruction
*inst
)
576 struct prog_src_register src0
= inst
->SrcReg
[0];
577 struct prog_src_register src1
= inst
->SrcReg
[1];
578 struct prog_dst_register dst
= inst
->DstReg
;
580 if (dst
.WriteMask
& WRITEMASK_Y
) {
581 /* dst.y = mul src0.y, src1.y
585 dst_mask(dst
, WRITEMASK_Y
),
592 if (dst
.WriteMask
& WRITEMASK_XZ
) {
593 struct prog_instruction
*swz
;
594 GLuint z
= GET_SWZ(src0
.Swizzle
, Z
);
596 /* dst.xz = swz src0.1zzz
600 dst_mask(dst
, WRITEMASK_XZ
),
602 src_swizzle(src0
, SWIZZLE_ONE
, z
, z
, z
),
605 /* Avoid letting negation flag of src0 affect our 1 constant. */
606 swz
->SrcReg
[0].Negate
&= ~NEGATE_X
;
608 if (dst
.WriteMask
& WRITEMASK_W
) {
609 /* dst.w = mov src1.w
613 dst_mask(dst
, WRITEMASK_W
),
622 static void precalc_lit( struct brw_wm_compile
*c
,
623 const struct prog_instruction
*inst
)
625 struct prog_src_register src0
= inst
->SrcReg
[0];
626 struct prog_dst_register dst
= inst
->DstReg
;
628 if (dst
.WriteMask
& WRITEMASK_XW
) {
629 struct prog_instruction
*swz
;
631 /* dst.xw = swz src0.1111
635 dst_mask(dst
, WRITEMASK_XW
),
637 src_swizzle1(src0
, SWIZZLE_ONE
),
640 /* Avoid letting the negation flag of src0 affect our 1 constant. */
641 swz
->SrcReg
[0].Negate
= NEGATE_NONE
;
644 if (dst
.WriteMask
& WRITEMASK_YZ
) {
647 dst_mask(dst
, WRITEMASK_YZ
),
657 * Some TEX instructions require extra code, cube map coordinate
658 * normalization, or coordinate scaling for RECT textures, etc.
659 * This function emits those extra instructions and the TEX
660 * instruction itself.
662 static void precalc_tex( struct brw_wm_compile
*c
,
663 const struct prog_instruction
*inst
)
665 struct prog_src_register coord
;
666 struct prog_dst_register tmpcoord
;
667 const GLuint unit
= c
->fp
->program
.Base
.SamplerUnits
[inst
->TexSrcUnit
];
669 assert(unit
< BRW_MAX_TEX_UNIT
);
671 if (inst
->TexSrcTarget
== TEXTURE_CUBE_INDEX
) {
672 struct prog_instruction
*out
;
673 struct prog_dst_register tmp0
= get_temp(c
);
674 struct prog_src_register tmp0src
= src_reg_from_dst(tmp0
);
675 struct prog_dst_register tmp1
= get_temp(c
);
676 struct prog_src_register tmp1src
= src_reg_from_dst(tmp1
);
677 struct prog_src_register src0
= inst
->SrcReg
[0];
679 /* find longest component of coord vector and normalize it */
680 tmpcoord
= get_temp(c
);
681 coord
= src_reg_from_dst(tmpcoord
);
683 /* tmpcoord = src0 (i.e.: coord = src0) */
684 out
= emit_op(c
, OPCODE_MOV
,
690 out
->SrcReg
[0].Negate
= NEGATE_NONE
;
691 out
->SrcReg
[0].Abs
= 1;
693 /* tmp0 = MAX(coord.X, coord.Y) */
694 emit_op(c
, OPCODE_MAX
,
697 src_swizzle1(coord
, X
),
698 src_swizzle1(coord
, Y
),
701 /* tmp1 = MAX(tmp0, coord.Z) */
702 emit_op(c
, OPCODE_MAX
,
706 src_swizzle1(coord
, Z
),
709 /* tmp0 = 1 / tmp1 */
710 emit_op(c
, OPCODE_RCP
,
711 dst_mask(tmp0
, WRITEMASK_X
),
717 /* tmpCoord = src0 * tmp0 */
718 emit_op(c
, OPCODE_MUL
,
722 src_swizzle1(tmp0src
, SWIZZLE_X
),
725 release_temp(c
, tmp0
);
726 release_temp(c
, tmp1
);
728 else if (inst
->TexSrcTarget
== TEXTURE_RECT_INDEX
) {
729 struct prog_src_register scale
=
730 search_or_add_param5( c
,
736 tmpcoord
= get_temp(c
);
738 /* coord.xy = MUL inst->SrcReg[0], { 1/width, 1/height }
752 coord
= src_reg_from_dst(tmpcoord
);
755 coord
= inst
->SrcReg
[0];
758 /* Need to emit YUV texture conversions by hand. Probably need to
759 * do this here - the alternative is in brw_wm_emit.c, but the
760 * conversion requires allocating a temporary variable which we
761 * don't have the facility to do that late in the compilation.
763 if (c
->key
.yuvtex_mask
& (1 << unit
)) {
764 /* convert ycbcr to RGBA */
765 GLboolean swap_uv
= c
->key
.yuvtex_swap_mask
& (1<<unit
);
768 CONST C0 = { -.5, -.0625, -.5, 1.164 }
769 CONST C1 = { 1.596, -0.813, 2.018, -.391 }
771 UYV.xyz = ADD UYV, C0
772 UYV.y = MUL UYV.y, C0.w
774 RGB.xyz = MAD UYV.zzx, C1, UYV.y
776 RGB.xyz = MAD UYV.xxz, C1, UYV.y
777 RGB.y = MAD UYV.z, C1.w, RGB.y
779 struct prog_dst_register dst
= inst
->DstReg
;
780 struct prog_dst_register tmp
= get_temp(c
);
781 struct prog_src_register tmpsrc
= src_reg_from_dst(tmp
);
782 struct prog_src_register C0
= search_or_add_const4f( c
, -.5, -.0625, -.5, 1.164 );
783 struct prog_src_register C1
= search_or_add_const4f( c
, 1.596, -0.813, 2.018, -.391 );
798 /* tmp.xyz = ADD TMP, C0
802 dst_mask(tmp
, WRITEMASK_XYZ
),
808 /* YUV.y = MUL YUV.y, C0.w
813 dst_mask(tmp
, WRITEMASK_Y
),
821 * RGB.xyz = MAD YUV.zzx, C1, YUV.y
823 * RGB.xyz = MAD YUV.xxz, C1, YUV.y
828 dst_mask(dst
, WRITEMASK_XYZ
),
830 swap_uv
?src_swizzle(tmpsrc
, Z
,Z
,X
,X
):src_swizzle(tmpsrc
, X
,X
,Z
,Z
),
832 src_swizzle1(tmpsrc
, Y
));
834 /* RGB.y = MAD YUV.z, C1.w, RGB.y
838 dst_mask(dst
, WRITEMASK_Y
),
840 src_swizzle1(tmpsrc
, Z
),
842 src_swizzle1(src_reg_from_dst(dst
), Y
));
844 release_temp(c
, tmp
);
847 /* ordinary RGBA tex instruction */
860 /* For GL_EXT_texture_swizzle: */
861 if (c
->key
.tex_swizzles
[unit
] != SWIZZLE_NOOP
) {
862 /* swizzle the result of the TEX instruction */
863 struct prog_src_register tmpsrc
= src_reg_from_dst(inst
->DstReg
);
864 emit_op(c
, OPCODE_SWZ
,
866 SATURATE_OFF
, /* saturate already done above */
867 src_swizzle4(tmpsrc
, c
->key
.tex_swizzles
[unit
]),
872 if ((inst
->TexSrcTarget
== TEXTURE_RECT_INDEX
) ||
873 (inst
->TexSrcTarget
== TEXTURE_CUBE_INDEX
))
874 release_temp(c
, tmpcoord
);
879 * Check if the given TXP instruction really needs the divide-by-W step.
881 static GLboolean
projtex( struct brw_wm_compile
*c
,
882 const struct prog_instruction
*inst
)
884 const struct prog_src_register src
= inst
->SrcReg
[0];
887 assert(inst
->Opcode
== OPCODE_TXP
);
889 /* Only try to detect the simplest cases. Could detect (later)
890 * cases where we are trying to emit code like RCP {1.0}, MUL x,
893 * More complex cases than this typically only arise from
894 * user-provided fragment programs anyway:
896 if (inst
->TexSrcTarget
== TEXTURE_CUBE_INDEX
)
897 retVal
= GL_FALSE
; /* ut2004 gun rendering !?! */
898 else if (src
.File
== PROGRAM_INPUT
&&
899 GET_SWZ(src
.Swizzle
, W
) == W
&&
900 (c
->key
.proj_attrib_mask
& (1 << src
.Index
)) == 0)
912 static void precalc_txp( struct brw_wm_compile
*c
,
913 const struct prog_instruction
*inst
)
915 struct prog_src_register src0
= inst
->SrcReg
[0];
917 if (projtex(c
, inst
)) {
918 struct prog_dst_register tmp
= get_temp(c
);
919 struct prog_instruction tmp_inst
;
921 /* tmp0.w = RCP inst.arg[0][3]
925 dst_mask(tmp
, WRITEMASK_W
),
927 src_swizzle1(src0
, GET_SWZ(src0
.Swizzle
, W
)),
931 /* tmp0.xyz = MUL inst.arg[0], tmp0.wwww
935 dst_mask(tmp
, WRITEMASK_XYZ
),
938 src_swizzle1(src_reg_from_dst(tmp
), W
),
941 /* dst = precalc(TEX tmp0)
944 tmp_inst
.SrcReg
[0] = src_reg_from_dst(tmp
);
945 precalc_tex(c
, &tmp_inst
);
947 release_temp(c
, tmp
);
951 /* dst = precalc(TEX src0)
953 precalc_tex(c
, inst
);
959 static void emit_fb_write( struct brw_wm_compile
*c
)
961 struct prog_src_register payload_r0_depth
= src_reg(PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
);
962 struct prog_src_register outdepth
= src_reg(PROGRAM_OUTPUT
, FRAG_RESULT_DEPTH
);
963 struct prog_src_register outcolor
;
966 struct prog_instruction
*inst
, *last_inst
;
967 struct brw_context
*brw
= c
->func
.brw
;
969 /* The inst->Aux field is used for FB write target and the EOT marker */
971 if (brw
->state
.nr_color_regions
> 1) {
972 for (i
= 0 ; i
< brw
->state
.nr_color_regions
; i
++) {
973 outcolor
= src_reg(PROGRAM_OUTPUT
, FRAG_RESULT_DATA0
+ i
);
974 last_inst
= inst
= emit_op(c
,
975 WM_FB_WRITE
, dst_mask(dst_undef(),0), 0,
976 outcolor
, payload_r0_depth
, outdepth
);
978 if (c
->fp_fragcolor_emitted
) {
979 outcolor
= src_reg(PROGRAM_OUTPUT
, FRAG_RESULT_COLOR
);
980 last_inst
= inst
= emit_op(c
, WM_FB_WRITE
, dst_mask(dst_undef(),0),
981 0, outcolor
, payload_r0_depth
, outdepth
);
985 last_inst
->Aux
|= 1; //eot
988 /* if gl_FragData[0] is written, use it, else use gl_FragColor */
989 if (c
->fp
->program
.Base
.OutputsWritten
& (1 << FRAG_RESULT_DATA0
))
990 outcolor
= src_reg(PROGRAM_OUTPUT
, FRAG_RESULT_DATA0
);
992 outcolor
= src_reg(PROGRAM_OUTPUT
, FRAG_RESULT_COLOR
);
994 inst
= emit_op(c
, WM_FB_WRITE
, dst_mask(dst_undef(),0),
995 0, outcolor
, payload_r0_depth
, outdepth
);
996 inst
->Aux
= 1|(0<<1);
1003 /***********************************************************************
1004 * Emit INTERP instructions ahead of first use of each attrib.
1007 static void validate_src_regs( struct brw_wm_compile
*c
,
1008 const struct prog_instruction
*inst
)
1010 GLuint nr_args
= brw_wm_nr_args( inst
->Opcode
);
1013 for (i
= 0; i
< nr_args
; i
++) {
1014 if (inst
->SrcReg
[i
].File
== PROGRAM_INPUT
) {
1015 GLuint idx
= inst
->SrcReg
[i
].Index
;
1016 if (!(c
->fp_interp_emitted
& (1<<idx
))) {
1017 emit_interp(c
, idx
);
1023 static void validate_dst_regs( struct brw_wm_compile
*c
,
1024 const struct prog_instruction
*inst
)
1026 if (inst
->DstReg
.File
== PROGRAM_OUTPUT
) {
1027 GLuint idx
= inst
->DstReg
.Index
;
1028 if (idx
== FRAG_RESULT_COLOR
)
1029 c
->fp_fragcolor_emitted
= 1;
1033 static void print_insns( const struct prog_instruction
*insn
,
1037 for (i
= 0; i
< nr
; i
++, insn
++) {
1038 _mesa_printf("%3d: ", i
);
1039 if (insn
->Opcode
< MAX_OPCODE
)
1040 _mesa_print_instruction(insn
);
1041 else if (insn
->Opcode
< MAX_WM_OPCODE
) {
1042 GLuint idx
= insn
->Opcode
- MAX_OPCODE
;
1044 _mesa_print_alu_instruction(insn
,
1045 wm_opcode_strings
[idx
],
1049 _mesa_printf("965 Opcode %d\n", insn
->Opcode
);
1055 * Initial pass for fragment program code generation.
1056 * This function is used by both the GLSL and non-GLSL paths.
1058 void brw_wm_pass_fp( struct brw_wm_compile
*c
)
1060 struct brw_fragment_program
*fp
= c
->fp
;
1063 if (INTEL_DEBUG
& DEBUG_WM
) {
1064 _mesa_printf("pre-fp:\n");
1065 _mesa_print_program(&fp
->program
.Base
);
1069 c
->pixel_xy
= src_undef();
1070 c
->delta_xy
= src_undef();
1071 c
->pixel_w
= src_undef();
1073 c
->fp
->tex_units_used
= 0x0;
1075 /* Emit preamble instructions. This is where special instructions such as
1076 * WM_CINTERP, WM_LINTERP, WM_PINTERP and WM_WPOSXY are emitted to
1077 * compute shader inputs from varying vars.
1079 for (insn
= 0; insn
< fp
->program
.Base
.NumInstructions
; insn
++) {
1080 const struct prog_instruction
*inst
= &fp
->program
.Base
.Instructions
[insn
];
1081 validate_src_regs(c
, inst
);
1082 validate_dst_regs(c
, inst
);
1085 /* Loop over all instructions doing assorted simplifications and
1088 for (insn
= 0; insn
< fp
->program
.Base
.NumInstructions
; insn
++) {
1089 const struct prog_instruction
*inst
= &fp
->program
.Base
.Instructions
[insn
];
1090 struct prog_instruction
*out
;
1092 /* Check for INPUT values, emit INTERP instructions where
1096 switch (inst
->Opcode
) {
1098 out
= emit_insn(c
, inst
);
1099 out
->Opcode
= OPCODE_MOV
;
1103 out
= emit_insn(c
, inst
);
1104 out
->Opcode
= OPCODE_MOV
;
1105 out
->SrcReg
[0].Negate
= NEGATE_NONE
;
1106 out
->SrcReg
[0].Abs
= 1;
1110 out
= emit_insn(c
, inst
);
1111 out
->Opcode
= OPCODE_ADD
;
1112 out
->SrcReg
[1].Negate
^= NEGATE_XYZW
;
1116 out
= emit_insn(c
, inst
);
1117 /* This should probably be done in the parser.
1119 out
->DstReg
.WriteMask
&= WRITEMASK_XY
;
1123 precalc_dst(c
, inst
);
1127 precalc_lit(c
, inst
);
1131 precalc_tex(c
, inst
);
1135 precalc_txp(c
, inst
);
1139 out
= emit_insn(c
, inst
);
1140 out
->TexSrcUnit
= fp
->program
.Base
.SamplerUnits
[inst
->TexSrcUnit
];
1141 assert(out
->TexSrcUnit
< BRW_MAX_TEX_UNIT
);
1145 out
= emit_insn(c
, inst
);
1146 /* This should probably be done in the parser.
1148 out
->DstReg
.WriteMask
&= WRITEMASK_XYZ
;
1152 out
= emit_insn(c
, inst
);
1153 /* This should probably be done in the parser.
1155 out
->DstReg
.WriteMask
= 0;
1163 if (brw_wm_is_scalar_result(inst
->Opcode
))
1164 emit_scalar_insn(c
, inst
);
1171 if (INTEL_DEBUG
& DEBUG_WM
) {
1172 _mesa_printf("pass_fp:\n");
1173 print_insns( c
->prog_instructions
, c
->nr_fp_insns
);