2 #include "shader/prog_parameter.h"
3 #include "brw_context.h"
7 /* Only guess, need a flag in gl_fragment_program later */
8 GLboolean
brw_wm_is_glsl(struct gl_fragment_program
*fp
)
11 for (i
= 0; i
< fp
->Base
.NumInstructions
; i
++) {
12 struct prog_instruction
*inst
= &fp
->Base
.Instructions
[i
];
13 switch (inst
->Opcode
) {
31 static void set_reg(struct brw_wm_compile
*c
, int file
, int index
,
32 int component
, struct brw_reg reg
)
34 c
->wm_regs
[file
][index
][component
].reg
= reg
;
35 c
->wm_regs
[file
][index
][component
].inited
= GL_TRUE
;
38 static int get_scalar_dst_index(struct prog_instruction
*inst
)
41 for (i
= 0; i
< 4; i
++)
42 if (inst
->DstReg
.WriteMask
& (1<<i
))
47 static struct brw_reg
alloc_tmp(struct brw_wm_compile
*c
)
50 reg
= brw_vec8_grf(c
->tmp_index
--, 0);
54 static void release_tmps(struct brw_wm_compile
*c
)
60 get_reg(struct brw_wm_compile
*c
, int file
, int index
, int component
, int nr
, GLuint neg
, GLuint abs
)
64 case PROGRAM_STATE_VAR
:
65 case PROGRAM_CONSTANT
:
67 file
= PROGRAM_STATE_VAR
;
69 case PROGRAM_UNDEFINED
:
70 return brw_null_reg();
75 if(c
->wm_regs
[file
][index
][component
].inited
)
76 reg
= c
->wm_regs
[file
][index
][component
].reg
;
78 reg
= brw_vec8_grf(c
->reg_index
, 0);
80 if(!c
->wm_regs
[file
][index
][component
].inited
) {
81 set_reg(c
, file
, index
, component
, reg
);
85 if (neg
& (1<< component
)) {
93 static void prealloc_reg(struct brw_wm_compile
*c
)
97 int nr_interp_regs
= 0;
98 GLuint inputs
= FRAG_BIT_WPOS
| c
->fp_interp_emitted
| c
->fp_deriv_emitted
;
100 for (i
= 0; i
< 4; i
++) {
101 reg
= (i
< c
->key
.nr_depth_regs
)
102 ? brw_vec8_grf(i
*2, 0) : brw_vec8_grf(0, 0);
103 set_reg(c
, PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
, i
, reg
);
105 c
->reg_index
+= 2*c
->key
.nr_depth_regs
;
107 int nr_params
= c
->fp
->program
.Base
.Parameters
->NumParameters
;
108 struct gl_program_parameter_list
*plist
=
109 c
->fp
->program
.Base
.Parameters
;
111 c
->prog_data
.nr_params
= 4*nr_params
;
112 for (i
= 0; i
< nr_params
; i
++) {
113 for (j
= 0; j
< 4; j
++, index
++) {
114 reg
= brw_vec1_grf(c
->reg_index
+ index
/8,
116 c
->prog_data
.param
[index
] =
117 &plist
->ParameterValues
[i
][j
];
118 set_reg(c
, PROGRAM_STATE_VAR
, i
, j
, reg
);
121 c
->nr_creg
= 2*((4*nr_params
+15)/16);
122 c
->reg_index
+= c
->nr_creg
;
124 for (i
= 0; i
< FRAG_ATTRIB_MAX
; i
++) {
125 if (inputs
& (1<<i
)) {
127 reg
= brw_vec8_grf(c
->reg_index
, 0);
128 for (j
= 0; j
< 4; j
++)
129 set_reg(c
, PROGRAM_PAYLOAD
, i
, j
, reg
);
134 c
->prog_data
.first_curbe_grf
= c
->key
.nr_depth_regs
* 2;
135 c
->prog_data
.urb_read_length
= nr_interp_regs
* 2;
136 c
->prog_data
.curb_read_length
= c
->nr_creg
;
137 c
->emit_mask_reg
= brw_uw1_reg(BRW_GENERAL_REGISTER_FILE
, c
->reg_index
, 0);
139 c
->stack
= brw_uw16_reg(BRW_GENERAL_REGISTER_FILE
, c
->reg_index
, 0);
143 static struct brw_reg
get_dst_reg(struct brw_wm_compile
*c
,
144 struct prog_instruction
*inst
, int component
, int nr
)
146 return get_reg(c
, inst
->DstReg
.File
, inst
->DstReg
.Index
, component
, nr
,
150 static struct brw_reg
get_src_reg(struct brw_wm_compile
*c
,
151 struct prog_src_register
*src
, int index
, int nr
)
153 int component
= GET_SWZ(src
->Swizzle
, index
);
154 return get_reg(c
, src
->File
, src
->Index
, component
, nr
,
155 src
->NegateBase
, src
->Abs
);
158 static void emit_abs( struct brw_wm_compile
*c
,
159 struct prog_instruction
*inst
)
162 struct brw_compile
*p
= &c
->func
;
163 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
164 for (i
= 0; i
< 4; i
++) {
165 if (inst
->DstReg
.WriteMask
& (1<<i
)) {
166 struct brw_reg src
, dst
;
167 dst
= get_dst_reg(c
, inst
, i
, 1);
168 src
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
169 brw_MOV(p
, dst
, brw_abs(src
));
172 brw_set_saturate(p
, 0);
175 static void emit_int( struct brw_wm_compile
*c
,
176 struct prog_instruction
*inst
)
179 struct brw_compile
*p
= &c
->func
;
180 GLuint mask
= inst
->DstReg
.WriteMask
;
181 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
182 for (i
= 0; i
< 4; i
++) {
184 struct brw_reg src
, dst
;
185 dst
= get_dst_reg(c
, inst
, i
, 1) ;
186 src
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
187 brw_RNDD(p
, dst
, src
);
190 brw_set_saturate(p
, 0);
193 static void emit_mov( struct brw_wm_compile
*c
,
194 struct prog_instruction
*inst
)
197 struct brw_compile
*p
= &c
->func
;
198 GLuint mask
= inst
->DstReg
.WriteMask
;
199 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
200 for (i
= 0; i
< 4; i
++) {
202 struct brw_reg src
, dst
;
203 dst
= get_dst_reg(c
, inst
, i
, 1);
204 src
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
205 brw_MOV(p
, dst
, src
);
208 brw_set_saturate(p
, 0);
211 static void emit_pixel_xy(struct brw_wm_compile
*c
,
212 struct prog_instruction
*inst
)
214 struct brw_reg r1
= brw_vec1_grf(1, 0);
215 struct brw_reg r1_uw
= retype(r1
, BRW_REGISTER_TYPE_UW
);
217 struct brw_reg dst0
, dst1
;
218 struct brw_compile
*p
= &c
->func
;
219 GLuint mask
= inst
->DstReg
.WriteMask
;
221 dst0
= get_dst_reg(c
, inst
, 0, 1);
222 dst1
= get_dst_reg(c
, inst
, 1, 1);
223 /* Calculate pixel centers by adding 1 or 0 to each of the
224 * micro-tile coordinates passed in r1.
226 if (mask
& WRITEMASK_X
) {
228 vec8(retype(dst0
, BRW_REGISTER_TYPE_UW
)),
229 stride(suboffset(r1_uw
, 4), 2, 4, 0),
230 brw_imm_v(0x10101010));
233 if (mask
& WRITEMASK_Y
) {
235 vec8(retype(dst1
, BRW_REGISTER_TYPE_UW
)),
236 stride(suboffset(r1_uw
, 5), 2, 4, 0),
237 brw_imm_v(0x11001100));
242 static void emit_delta_xy(struct brw_wm_compile
*c
,
243 struct prog_instruction
*inst
)
245 struct brw_reg r1
= brw_vec1_grf(1, 0);
246 struct brw_reg dst0
, dst1
, src0
, src1
;
247 struct brw_compile
*p
= &c
->func
;
248 GLuint mask
= inst
->DstReg
.WriteMask
;
250 dst0
= get_dst_reg(c
, inst
, 0, 1);
251 dst1
= get_dst_reg(c
, inst
, 1, 1);
252 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
253 src1
= get_src_reg(c
, &inst
->SrcReg
[0], 1, 1);
254 /* Calc delta X,Y by subtracting origin in r1 from the pixel
257 if (mask
& WRITEMASK_X
) {
260 retype(src0
, BRW_REGISTER_TYPE_UW
),
264 if (mask
& WRITEMASK_Y
) {
267 retype(src1
, BRW_REGISTER_TYPE_UW
),
268 negate(suboffset(r1
,1)));
275 static void fire_fb_write( struct brw_wm_compile
*c
,
279 struct brw_compile
*p
= &c
->func
;
281 /* Pass through control information:
283 /* mov (8) m1.0<1>:ud r1.0<8;8,1>:ud { Align1 NoMask } */
285 brw_push_insn_state(p
);
286 brw_set_mask_control(p
, BRW_MASK_DISABLE
); /* ? */
288 brw_message_reg(base_reg
+ 1),
290 brw_pop_insn_state(p
);
292 /* Send framebuffer write message: */
294 retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW
),
296 retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW
),
297 0, /* render surface always 0 */
303 static void emit_fb_write(struct brw_wm_compile
*c
,
304 struct prog_instruction
*inst
)
306 struct brw_compile
*p
= &c
->func
;
309 struct brw_reg src0
;//, src1, src2, dst;
311 /* Reserve a space for AA - may not be needed:
313 if (c
->key
.aa_dest_stencil_reg
)
316 brw_push_insn_state(p
);
317 for (channel
= 0; channel
< 4; channel
++) {
318 src0
= get_src_reg(c
, &inst
->SrcReg
[0], channel
, 1);
319 /* mov (8) m2.0<1>:ud r28.0<8;8,1>:ud { Align1 } */
320 /* mov (8) m6.0<1>:ud r29.0<8;8,1>:ud { Align1 SecHalf } */
321 brw_MOV(p
, brw_message_reg(nr
+ channel
), src0
);
323 /* skip over the regs populated above: */
325 brw_pop_insn_state(p
);
327 fire_fb_write(c
, 0, nr
);
330 static void emit_pixel_w( struct brw_wm_compile
*c
,
331 struct prog_instruction
*inst
)
333 struct brw_compile
*p
= &c
->func
;
334 GLuint mask
= inst
->DstReg
.WriteMask
;
335 if (mask
& WRITEMASK_W
) {
336 struct brw_reg dst
, src0
, delta0
, delta1
;
337 struct brw_reg interp3
;
339 dst
= get_dst_reg(c
, inst
, 3, 1);
340 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
341 delta0
= get_src_reg(c
, &inst
->SrcReg
[1], 0, 1);
342 delta1
= get_src_reg(c
, &inst
->SrcReg
[1], 1, 1);
344 interp3
= brw_vec1_grf(src0
.nr
+1, 4);
345 /* Calc 1/w - just linterp wpos[3] optimized by putting the
346 * result straight into a message reg.
348 brw_LINE(p
, brw_null_reg(), interp3
, delta0
);
349 brw_MAC(p
, brw_message_reg(2), suboffset(interp3
, 1), delta1
);
353 BRW_MATH_FUNCTION_INV
,
354 BRW_MATH_SATURATE_NONE
,
356 BRW_MATH_PRECISION_FULL
);
360 static void emit_linterp(struct brw_wm_compile
*c
,
361 struct prog_instruction
*inst
)
363 struct brw_compile
*p
= &c
->func
;
364 GLuint mask
= inst
->DstReg
.WriteMask
;
365 struct brw_reg interp
[4];
366 struct brw_reg dst
, delta0
, delta1
;
369 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
370 delta0
= get_src_reg(c
, &inst
->SrcReg
[1], 0, 1);
371 delta1
= get_src_reg(c
, &inst
->SrcReg
[1], 1, 1);
375 interp
[0] = brw_vec1_grf(nr
, 0);
376 interp
[1] = brw_vec1_grf(nr
, 4);
377 interp
[2] = brw_vec1_grf(nr
+1, 0);
378 interp
[3] = brw_vec1_grf(nr
+1, 4);
380 for(i
= 0; i
< 4; i
++ ) {
382 dst
= get_dst_reg(c
, inst
, i
, 1);
383 brw_LINE(p
, brw_null_reg(), interp
[i
], delta0
);
384 brw_MAC(p
, dst
, suboffset(interp
[i
],1), delta1
);
389 static void emit_cinterp(struct brw_wm_compile
*c
,
390 struct prog_instruction
*inst
)
392 struct brw_compile
*p
= &c
->func
;
393 GLuint mask
= inst
->DstReg
.WriteMask
;
395 struct brw_reg interp
[4];
396 struct brw_reg dst
, src0
;
398 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
402 interp
[0] = brw_vec1_grf(nr
, 0);
403 interp
[1] = brw_vec1_grf(nr
, 4);
404 interp
[2] = brw_vec1_grf(nr
+1, 0);
405 interp
[3] = brw_vec1_grf(nr
+1, 4);
407 for(i
= 0; i
< 4; i
++ ) {
409 dst
= get_dst_reg(c
, inst
, i
, 1);
410 brw_MOV(p
, dst
, suboffset(interp
[i
],3));
415 static void emit_pinterp(struct brw_wm_compile
*c
,
416 struct prog_instruction
*inst
)
418 struct brw_compile
*p
= &c
->func
;
419 GLuint mask
= inst
->DstReg
.WriteMask
;
421 struct brw_reg interp
[4];
422 struct brw_reg dst
, delta0
, delta1
;
423 struct brw_reg src0
, w
;
425 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
426 delta0
= get_src_reg(c
, &inst
->SrcReg
[1], 0, 1);
427 delta1
= get_src_reg(c
, &inst
->SrcReg
[1], 1, 1);
428 w
= get_src_reg(c
, &inst
->SrcReg
[2], 3, 1);
432 interp
[0] = brw_vec1_grf(nr
, 0);
433 interp
[1] = brw_vec1_grf(nr
, 4);
434 interp
[2] = brw_vec1_grf(nr
+1, 0);
435 interp
[3] = brw_vec1_grf(nr
+1, 4);
437 for(i
= 0; i
< 4; i
++ ) {
439 dst
= get_dst_reg(c
, inst
, i
, 1);
440 brw_LINE(p
, brw_null_reg(), interp
[i
], delta0
);
441 brw_MAC(p
, dst
, suboffset(interp
[i
],1),
443 brw_MUL(p
, dst
, dst
, w
);
448 static void emit_xpd(struct brw_wm_compile
*c
,
449 struct prog_instruction
*inst
)
452 struct brw_compile
*p
= &c
->func
;
453 GLuint mask
= inst
->DstReg
.WriteMask
;
454 for (i
= 0; i
< 4; i
++) {
458 struct brw_reg src0
, src1
, dst
;
459 dst
= get_dst_reg(c
, inst
, i
, 1);
460 src0
= negate(get_src_reg(c
, &inst
->SrcReg
[0], i2
, 1));
461 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i1
, 1);
462 brw_MUL(p
, brw_null_reg(), src0
, src1
);
463 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i1
, 1);
464 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i2
, 1);
465 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
466 brw_MAC(p
, dst
, src0
, src1
);
467 brw_set_saturate(p
, 0);
470 brw_set_saturate(p
, 0);
473 static void emit_dp3(struct brw_wm_compile
*c
,
474 struct prog_instruction
*inst
)
476 struct brw_reg src0
[3], src1
[3], dst
;
478 struct brw_compile
*p
= &c
->func
;
479 for (i
= 0; i
< 3; i
++) {
480 src0
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
481 src1
[i
] = get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
484 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
485 brw_MUL(p
, brw_null_reg(), src0
[0], src1
[0]);
486 brw_MAC(p
, brw_null_reg(), src0
[1], src1
[1]);
487 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
488 brw_MAC(p
, dst
, src0
[2], src1
[2]);
489 brw_set_saturate(p
, 0);
492 static void emit_dp4(struct brw_wm_compile
*c
,
493 struct prog_instruction
*inst
)
495 struct brw_reg src0
[4], src1
[4], dst
;
497 struct brw_compile
*p
= &c
->func
;
498 for (i
= 0; i
< 4; i
++) {
499 src0
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
500 src1
[i
] = get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
502 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
503 brw_MUL(p
, brw_null_reg(), src0
[0], src1
[0]);
504 brw_MAC(p
, brw_null_reg(), src0
[1], src1
[1]);
505 brw_MAC(p
, brw_null_reg(), src0
[2], src1
[2]);
506 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
507 brw_MAC(p
, dst
, src0
[3], src1
[3]);
508 brw_set_saturate(p
, 0);
511 static void emit_dph(struct brw_wm_compile
*c
,
512 struct prog_instruction
*inst
)
514 struct brw_reg src0
[4], src1
[4], dst
;
516 struct brw_compile
*p
= &c
->func
;
517 for (i
= 0; i
< 4; i
++) {
518 src0
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
519 src1
[i
] = get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
521 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
522 brw_MUL(p
, brw_null_reg(), src0
[0], src1
[0]);
523 brw_MAC(p
, brw_null_reg(), src0
[1], src1
[1]);
524 brw_MAC(p
, dst
, src0
[2], src1
[2]);
525 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
526 brw_ADD(p
, dst
, src0
[3], src1
[3]);
527 brw_set_saturate(p
, 0);
530 static void emit_math1(struct brw_wm_compile
*c
,
531 struct prog_instruction
*inst
, GLuint func
)
533 struct brw_compile
*p
= &c
->func
;
534 struct brw_reg src0
, dst
;
536 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
537 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
538 brw_MOV(p
, brw_message_reg(2), src0
);
542 (inst
->SaturateMode
!= SATURATE_OFF
) ? BRW_MATH_SATURATE_SATURATE
: BRW_MATH_SATURATE_NONE
,
545 BRW_MATH_DATA_VECTOR
,
546 BRW_MATH_PRECISION_FULL
);
549 static void emit_rcp(struct brw_wm_compile
*c
,
550 struct prog_instruction
*inst
)
552 emit_math1(c
, inst
, BRW_MATH_FUNCTION_INV
);
555 static void emit_rsq(struct brw_wm_compile
*c
,
556 struct prog_instruction
*inst
)
558 emit_math1(c
, inst
, BRW_MATH_FUNCTION_RSQ
);
561 static void emit_sin(struct brw_wm_compile
*c
,
562 struct prog_instruction
*inst
)
564 emit_math1(c
, inst
, BRW_MATH_FUNCTION_SIN
);
567 static void emit_cos(struct brw_wm_compile
*c
,
568 struct prog_instruction
*inst
)
570 emit_math1(c
, inst
, BRW_MATH_FUNCTION_COS
);
573 static void emit_ex2(struct brw_wm_compile
*c
,
574 struct prog_instruction
*inst
)
576 emit_math1(c
, inst
, BRW_MATH_FUNCTION_EXP
);
579 static void emit_lg2(struct brw_wm_compile
*c
,
580 struct prog_instruction
*inst
)
582 emit_math1(c
, inst
, BRW_MATH_FUNCTION_LOG
);
585 static void emit_add(struct brw_wm_compile
*c
,
586 struct prog_instruction
*inst
)
588 struct brw_compile
*p
= &c
->func
;
589 struct brw_reg src0
, src1
, dst
;
590 GLuint mask
= inst
->DstReg
.WriteMask
;
592 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
593 for (i
= 0 ; i
< 4; i
++) {
595 dst
= get_dst_reg(c
, inst
, i
, 1);
596 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
597 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
598 brw_ADD(p
, dst
, src0
, src1
);
601 brw_set_saturate(p
, 0);
604 static void emit_sub(struct brw_wm_compile
*c
,
605 struct prog_instruction
*inst
)
607 struct brw_compile
*p
= &c
->func
;
608 struct brw_reg src0
, src1
, dst
;
609 GLuint mask
= inst
->DstReg
.WriteMask
;
611 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
612 for (i
= 0 ; i
< 4; i
++) {
614 dst
= get_dst_reg(c
, inst
, i
, 1);
615 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
616 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
617 brw_ADD(p
, dst
, src0
, negate(src1
));
620 brw_set_saturate(p
, 0);
623 static void emit_mul(struct brw_wm_compile
*c
,
624 struct prog_instruction
*inst
)
626 struct brw_compile
*p
= &c
->func
;
627 struct brw_reg src0
, src1
, dst
;
628 GLuint mask
= inst
->DstReg
.WriteMask
;
630 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
631 for (i
= 0 ; i
< 4; i
++) {
633 dst
= get_dst_reg(c
, inst
, i
, 1);
634 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
635 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
636 brw_MUL(p
, dst
, src0
, src1
);
639 brw_set_saturate(p
, 0);
642 static void emit_frc(struct brw_wm_compile
*c
,
643 struct prog_instruction
*inst
)
645 struct brw_compile
*p
= &c
->func
;
646 struct brw_reg src0
, dst
;
647 GLuint mask
= inst
->DstReg
.WriteMask
;
649 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
650 for (i
= 0 ; i
< 4; i
++) {
652 dst
= get_dst_reg(c
, inst
, i
, 1);
653 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
654 brw_FRC(p
, dst
, src0
);
657 if (inst
->SaturateMode
!= SATURATE_OFF
)
658 brw_set_saturate(p
, 0);
661 static void emit_flr(struct brw_wm_compile
*c
,
662 struct prog_instruction
*inst
)
664 struct brw_compile
*p
= &c
->func
;
665 struct brw_reg src0
, dst
;
666 GLuint mask
= inst
->DstReg
.WriteMask
;
668 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
669 for (i
= 0 ; i
< 4; i
++) {
671 dst
= get_dst_reg(c
, inst
, i
, 1);
672 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
673 brw_RNDD(p
, dst
, src0
);
676 brw_set_saturate(p
, 0);
679 static void emit_max(struct brw_wm_compile
*c
,
680 struct prog_instruction
*inst
)
682 struct brw_compile
*p
= &c
->func
;
683 GLuint mask
= inst
->DstReg
.WriteMask
;
684 struct brw_reg src0
, src1
, dst
;
686 brw_push_insn_state(p
);
687 for (i
= 0; i
< 4; i
++) {
689 dst
= get_dst_reg(c
, inst
, i
, 1);
690 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
691 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
692 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
693 brw_MOV(p
, dst
, src0
);
694 brw_set_saturate(p
, 0);
696 brw_CMP(p
, brw_null_reg(), BRW_CONDITIONAL_L
, src0
, src1
);
697 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
698 brw_set_predicate_control(p
, BRW_PREDICATE_NORMAL
);
699 brw_MOV(p
, dst
, src1
);
700 brw_set_saturate(p
, 0);
701 brw_set_predicate_control_flag_value(p
, 0xff);
704 brw_pop_insn_state(p
);
707 static void emit_min(struct brw_wm_compile
*c
,
708 struct prog_instruction
*inst
)
710 struct brw_compile
*p
= &c
->func
;
711 GLuint mask
= inst
->DstReg
.WriteMask
;
712 struct brw_reg src0
, src1
, dst
;
714 brw_push_insn_state(p
);
715 for (i
= 0; i
< 4; i
++) {
717 dst
= get_dst_reg(c
, inst
, i
, 1);
718 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
719 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
720 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
721 brw_MOV(p
, dst
, src0
);
722 brw_set_saturate(p
, 0);
724 brw_CMP(p
, brw_null_reg(), BRW_CONDITIONAL_L
, src1
, src0
);
725 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
726 brw_set_predicate_control(p
, BRW_PREDICATE_NORMAL
);
727 brw_MOV(p
, dst
, src1
);
728 brw_set_saturate(p
, 0);
729 brw_set_predicate_control_flag_value(p
, 0xff);
732 brw_pop_insn_state(p
);
735 static void emit_pow(struct brw_wm_compile
*c
,
736 struct prog_instruction
*inst
)
738 struct brw_compile
*p
= &c
->func
;
739 struct brw_reg dst
, src0
, src1
;
740 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
741 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
742 src1
= get_src_reg(c
, &inst
->SrcReg
[1], 0, 1);
744 brw_MOV(p
, brw_message_reg(2), src0
);
745 brw_MOV(p
, brw_message_reg(3), src1
);
749 BRW_MATH_FUNCTION_POW
,
750 (inst
->SaturateMode
!= SATURATE_OFF
) ? BRW_MATH_SATURATE_SATURATE
: BRW_MATH_SATURATE_NONE
,
753 BRW_MATH_DATA_VECTOR
,
754 BRW_MATH_PRECISION_FULL
);
757 static void emit_lrp(struct brw_wm_compile
*c
,
758 struct prog_instruction
*inst
)
760 struct brw_compile
*p
= &c
->func
;
761 GLuint mask
= inst
->DstReg
.WriteMask
;
762 struct brw_reg dst
, tmp1
, tmp2
, src0
, src1
, src2
;
764 for (i
= 0; i
< 4; i
++) {
766 dst
= get_dst_reg(c
, inst
, i
, 1);
767 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
769 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
771 if (src1
.nr
== dst
.nr
) {
773 brw_MOV(p
, tmp1
, src1
);
777 src2
= get_src_reg(c
, &inst
->SrcReg
[2], i
, 1);
778 if (src2
.nr
== dst
.nr
) {
780 brw_MOV(p
, tmp2
, src2
);
784 brw_ADD(p
, dst
, negate(src0
), brw_imm_f(1.0));
785 brw_MUL(p
, brw_null_reg(), dst
, tmp2
);
786 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
787 brw_MAC(p
, dst
, src0
, tmp1
);
788 brw_set_saturate(p
, 0);
794 static void emit_kil(struct brw_wm_compile
*c
)
796 struct brw_compile
*p
= &c
->func
;
797 struct brw_reg depth
= retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW
);
798 brw_push_insn_state(p
);
799 brw_set_mask_control(p
, BRW_MASK_DISABLE
);
800 brw_NOT(p
, c
->emit_mask_reg
, brw_mask_reg(1)); //IMASK
801 brw_AND(p
, depth
, c
->emit_mask_reg
, depth
);
802 brw_pop_insn_state(p
);
805 static void emit_mad(struct brw_wm_compile
*c
,
806 struct prog_instruction
*inst
)
808 struct brw_compile
*p
= &c
->func
;
809 GLuint mask
= inst
->DstReg
.WriteMask
;
810 struct brw_reg dst
, src0
, src1
, src2
;
813 for (i
= 0; i
< 4; i
++) {
815 dst
= get_dst_reg(c
, inst
, i
, 1);
816 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
817 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
818 src2
= get_src_reg(c
, &inst
->SrcReg
[2], i
, 1);
819 brw_MUL(p
, dst
, src0
, src1
);
821 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
822 brw_ADD(p
, dst
, dst
, src2
);
823 brw_set_saturate(p
, 0);
828 static void emit_sop(struct brw_wm_compile
*c
,
829 struct prog_instruction
*inst
, GLuint cond
)
831 struct brw_compile
*p
= &c
->func
;
832 GLuint mask
= inst
->DstReg
.WriteMask
;
833 struct brw_reg dst
, src0
, src1
;
836 brw_push_insn_state(p
);
837 for (i
= 0; i
< 4; i
++) {
839 dst
= get_dst_reg(c
, inst
, i
, 1);
840 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
841 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
842 brw_CMP(p
, brw_null_reg(), cond
, src0
, src1
);
843 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
844 brw_MOV(p
, dst
, brw_imm_f(0.0));
845 brw_set_predicate_control(p
, BRW_PREDICATE_NORMAL
);
846 brw_MOV(p
, dst
, brw_imm_f(1.0));
849 brw_pop_insn_state(p
);
852 static void emit_slt(struct brw_wm_compile
*c
,
853 struct prog_instruction
*inst
)
855 emit_sop(c
, inst
, BRW_CONDITIONAL_L
);
858 static void emit_sle(struct brw_wm_compile
*c
,
859 struct prog_instruction
*inst
)
861 emit_sop(c
, inst
, BRW_CONDITIONAL_LE
);
864 static void emit_sgt(struct brw_wm_compile
*c
,
865 struct prog_instruction
*inst
)
867 emit_sop(c
, inst
, BRW_CONDITIONAL_G
);
870 static void emit_sge(struct brw_wm_compile
*c
,
871 struct prog_instruction
*inst
)
873 emit_sop(c
, inst
, BRW_CONDITIONAL_GE
);
876 static void emit_seq(struct brw_wm_compile
*c
,
877 struct prog_instruction
*inst
)
879 emit_sop(c
, inst
, BRW_CONDITIONAL_EQ
);
882 static void emit_sne(struct brw_wm_compile
*c
,
883 struct prog_instruction
*inst
)
885 emit_sop(c
, inst
, BRW_CONDITIONAL_NEQ
);
888 static void emit_ddx(struct brw_wm_compile
*c
,
889 struct prog_instruction
*inst
)
891 struct brw_compile
*p
= &c
->func
;
892 GLuint mask
= inst
->DstReg
.WriteMask
;
893 struct brw_reg interp
[4];
895 struct brw_reg src0
, w
;
897 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
898 w
= get_src_reg(c
, &inst
->SrcReg
[1], 3, 1);
900 interp
[0] = brw_vec1_grf(nr
, 0);
901 interp
[1] = brw_vec1_grf(nr
, 4);
902 interp
[2] = brw_vec1_grf(nr
+1, 0);
903 interp
[3] = brw_vec1_grf(nr
+1, 4);
904 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
905 for(i
= 0; i
< 4; i
++ ) {
907 dst
= get_dst_reg(c
, inst
, i
, 1);
908 brw_MOV(p
, dst
, interp
[i
]);
909 brw_MUL(p
, dst
, dst
, w
);
912 brw_set_saturate(p
, 0);
915 static void emit_ddy(struct brw_wm_compile
*c
,
916 struct prog_instruction
*inst
)
918 struct brw_compile
*p
= &c
->func
;
919 GLuint mask
= inst
->DstReg
.WriteMask
;
920 struct brw_reg interp
[4];
922 struct brw_reg src0
, w
;
925 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
927 w
= get_src_reg(c
, &inst
->SrcReg
[1], 3, 1);
928 interp
[0] = brw_vec1_grf(nr
, 0);
929 interp
[1] = brw_vec1_grf(nr
, 4);
930 interp
[2] = brw_vec1_grf(nr
+1, 0);
931 interp
[3] = brw_vec1_grf(nr
+1, 4);
932 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
933 for(i
= 0; i
< 4; i
++ ) {
935 dst
= get_dst_reg(c
, inst
, i
, 1);
936 brw_MOV(p
, dst
, suboffset(interp
[i
], 1));
937 brw_MUL(p
, dst
, dst
, w
);
940 brw_set_saturate(p
, 0);
943 static void emit_wpos_xy(struct brw_wm_compile
*c
,
944 struct prog_instruction
*inst
)
946 struct brw_compile
*p
= &c
->func
;
947 GLuint mask
= inst
->DstReg
.WriteMask
;
948 struct brw_reg src0
[2], dst
[2];
950 dst
[0] = get_dst_reg(c
, inst
, 0, 1);
951 dst
[1] = get_dst_reg(c
, inst
, 1, 1);
953 src0
[0] = get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
954 src0
[1] = get_src_reg(c
, &inst
->SrcReg
[0], 1, 1);
956 /* Calc delta X,Y by subtracting origin in r1 from the pixel
959 if (mask
& WRITEMASK_X
) {
962 retype(src0
[0], BRW_REGISTER_TYPE_UW
));
965 if (mask
& WRITEMASK_Y
) {
966 /* TODO -- window_height - Y */
969 retype(src0
[1], BRW_REGISTER_TYPE_UW
));
975 BIAS on SIMD8 not workind yet...
977 static void emit_txb(struct brw_wm_compile
*c
,
978 struct prog_instruction
*inst
)
980 struct brw_compile
*p
= &c
->func
;
981 struct brw_reg dst
[4], src
[4], payload_reg
;
983 payload_reg
= get_reg(c
, PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
, 0, 1, 0, 0);
984 for (i
= 0; i
< 4; i
++)
985 dst
[i
] = get_dst_reg(c
, inst
, i
, 1);
986 for (i
= 0; i
< 4; i
++)
987 src
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
989 switch (inst
->TexSrcTarget
) {
990 case TEXTURE_1D_INDEX
:
991 brw_MOV(p
, brw_message_reg(2), src
[0]);
992 brw_MOV(p
, brw_message_reg(3), brw_imm_f(0));
993 brw_MOV(p
, brw_message_reg(4), brw_imm_f(0));
995 case TEXTURE_2D_INDEX
:
996 case TEXTURE_RECT_INDEX
:
997 brw_MOV(p
, brw_message_reg(2), src
[0]);
998 brw_MOV(p
, brw_message_reg(3), src
[1]);
999 brw_MOV(p
, brw_message_reg(4), brw_imm_f(0));
1002 brw_MOV(p
, brw_message_reg(2), src
[0]);
1003 brw_MOV(p
, brw_message_reg(3), src
[1]);
1004 brw_MOV(p
, brw_message_reg(4), src
[2]);
1007 brw_MOV(p
, brw_message_reg(5), src
[3]);
1008 brw_MOV(p
, brw_message_reg(6), brw_imm_f(0));
1010 retype(vec8(dst
[0]), BRW_REGISTER_TYPE_UW
),
1012 retype(payload_reg
, BRW_REGISTER_TYPE_UW
),
1013 inst
->TexSrcUnit
+ 1, /* surface */
1014 inst
->TexSrcUnit
, /* sampler */
1015 inst
->DstReg
.WriteMask
,
1016 BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS
,
1022 static void emit_tex(struct brw_wm_compile
*c
,
1023 struct prog_instruction
*inst
)
1025 struct brw_compile
*p
= &c
->func
;
1026 struct brw_reg dst
[4], src
[4], payload_reg
;
1030 GLboolean shadow
= (c
->key
.shadowtex_mask
& (1<<inst
->TexSrcUnit
)) ? 1 : 0;
1032 payload_reg
= get_reg(c
, PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
, 0, 1, 0, 0);
1034 for (i
= 0; i
< 4; i
++)
1035 dst
[i
] = get_dst_reg(c
, inst
, i
, 1);
1036 for (i
= 0; i
< 4; i
++)
1037 src
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
1040 switch (inst
->TexSrcTarget
) {
1041 case TEXTURE_1D_INDEX
:
1045 case TEXTURE_2D_INDEX
:
1046 case TEXTURE_RECT_INDEX
:
1047 emit
= WRITEMASK_XY
;
1051 emit
= WRITEMASK_XYZ
;
1057 for (i
= 0; i
< nr
; i
++) {
1058 static const GLuint swz
[4] = {0,1,2,2};
1060 brw_MOV(p
, brw_message_reg(msg_len
+1), src
[swz
[i
]]);
1062 brw_MOV(p
, brw_message_reg(msg_len
+1), brw_imm_f(0));
1067 brw_MOV(p
, brw_message_reg(5), brw_imm_f(0));
1068 brw_MOV(p
, brw_message_reg(6), src
[2]);
1072 retype(vec8(dst
[0]), BRW_REGISTER_TYPE_UW
),
1074 retype(payload_reg
, BRW_REGISTER_TYPE_UW
),
1075 inst
->TexSrcUnit
+ 1, /* surface */
1076 inst
->TexSrcUnit
, /* sampler */
1077 inst
->DstReg
.WriteMask
,
1078 BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE
,
1084 brw_MOV(p
, dst
[3], brw_imm_f(1.0));
1087 static void post_wm_emit( struct brw_wm_compile
*c
)
1089 GLuint nr_insns
= c
->fp
->program
.Base
.NumInstructions
;
1090 GLuint insn
, target_insn
;
1091 struct prog_instruction
*inst1
, *inst2
;
1092 struct brw_instruction
*brw_inst1
, *brw_inst2
;
1094 for (insn
= 0; insn
< nr_insns
; insn
++) {
1095 inst1
= &c
->fp
->program
.Base
.Instructions
[insn
];
1096 brw_inst1
= inst1
->Data
;
1097 switch (inst1
->Opcode
) {
1099 target_insn
= inst1
->BranchTarget
;
1100 inst2
= &c
->fp
->program
.Base
.Instructions
[target_insn
];
1101 brw_inst2
= inst2
->Data
;
1102 offset
= brw_inst2
- brw_inst1
;
1103 brw_set_src1(brw_inst1
, brw_imm_d(offset
*16));
1111 static void brw_wm_emit_glsl(struct brw_wm_compile
*c
)
1115 #define MAX_LOOP_DEPTH 32
1116 struct brw_instruction
*if_inst
[MAX_IFSN
], *loop_inst
[MAX_LOOP_DEPTH
];
1117 struct brw_instruction
*inst0
, *inst1
;
1118 int i
, if_insn
= 0, loop_insn
= 0;
1119 struct brw_compile
*p
= &c
->func
;
1120 struct brw_indirect stack_index
= brw_indirect(0, 0);
1122 brw_init_compile(&c
->func
);
1125 brw_set_compression_control(p
, BRW_COMPRESSION_NONE
);
1126 brw_MOV(p
, get_addr_reg(stack_index
), brw_address(c
->stack
));
1128 for (i
= 0; i
< c
->nr_fp_insns
; i
++) {
1129 struct prog_instruction
*inst
= &c
->prog_instructions
[i
];
1130 struct prog_instruction
*orig_inst
;
1132 if ((orig_inst
= inst
->Data
) != 0)
1133 orig_inst
->Data
= current_insn(p
);
1135 if (inst
->CondUpdate
)
1136 brw_set_conditionalmod(p
, BRW_CONDITIONAL_NZ
);
1138 brw_set_conditionalmod(p
, BRW_CONDITIONAL_NONE
);
1140 switch (inst
->Opcode
) {
1142 emit_pixel_xy(c
, inst
);
1145 emit_delta_xy(c
, inst
);
1148 emit_pixel_w(c
, inst
);
1151 emit_linterp(c
, inst
);
1154 emit_pinterp(c
, inst
);
1157 emit_cinterp(c
, inst
);
1160 emit_wpos_xy(c
, inst
);
1163 emit_fb_write(c
, inst
);
1268 assert(if_insn
< MAX_IFSN
);
1269 if_inst
[if_insn
++] = brw_IF(p
, BRW_EXECUTE_8
);
1272 if_inst
[if_insn
-1] = brw_ELSE(p
, if_inst
[if_insn
-1]);
1275 assert(if_insn
> 0);
1276 brw_ENDIF(p
, if_inst
[--if_insn
]);
1282 brw_push_insn_state(p
);
1283 brw_set_mask_control(p
, BRW_MASK_DISABLE
);
1284 brw_set_access_mode(p
, BRW_ALIGN_1
);
1285 brw_ADD(p
, deref_1ud(stack_index
, 0), brw_ip_reg(), brw_imm_d(3*16));
1286 brw_set_access_mode(p
, BRW_ALIGN_16
);
1287 brw_ADD(p
, get_addr_reg(stack_index
),
1288 get_addr_reg(stack_index
), brw_imm_d(4));
1289 orig_inst
= inst
->Data
;
1290 orig_inst
->Data
= &p
->store
[p
->nr_insn
];
1291 brw_ADD(p
, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
1292 brw_pop_insn_state(p
);
1296 brw_push_insn_state(p
);
1297 brw_set_mask_control(p
, BRW_MASK_DISABLE
);
1298 brw_ADD(p
, get_addr_reg(stack_index
),
1299 get_addr_reg(stack_index
), brw_imm_d(-4));
1300 brw_set_access_mode(p
, BRW_ALIGN_1
);
1301 brw_MOV(p
, brw_ip_reg(), deref_1ud(stack_index
, 0));
1302 brw_set_access_mode(p
, BRW_ALIGN_16
);
1303 brw_pop_insn_state(p
);
1306 case OPCODE_BGNLOOP
:
1307 loop_inst
[loop_insn
++] = brw_DO(p
, BRW_EXECUTE_8
);
1311 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
1315 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
1317 case OPCODE_ENDLOOP
:
1319 inst0
= inst1
= brw_WHILE(p
, loop_inst
[loop_insn
]);
1320 /* patch all the BREAK instructions from
1322 while (inst0
> loop_inst
[loop_insn
]) {
1324 if (inst0
->header
.opcode
== BRW_OPCODE_BREAK
) {
1325 inst0
->bits3
.if_else
.jump_count
= inst1
- inst0
+ 1;
1326 inst0
->bits3
.if_else
.pop_count
= 0;
1327 } else if (inst0
->header
.opcode
== BRW_OPCODE_CONTINUE
) {
1328 inst0
->bits3
.if_else
.jump_count
= inst1
- inst0
;
1329 inst0
->bits3
.if_else
.pop_count
= 0;
1334 _mesa_printf("unsupported IR in fragment shader %d\n",
1337 if (inst
->CondUpdate
)
1338 brw_set_predicate_control(p
, BRW_PREDICATE_NORMAL
);
1340 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
1343 for (i
= 0; i
< c
->fp
->program
.Base
.NumInstructions
; i
++)
1344 c
->fp
->program
.Base
.Instructions
[i
].Data
= NULL
;
1347 void brw_wm_glsl_emit(struct brw_wm_compile
*c
)
1351 brw_wm_emit_glsl(c
);
1352 c
->prog_data
.total_grf
= c
->reg_index
;
1353 c
->prog_data
.total_scratch
= 0;