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Merge commit 'origin/gallium-0.1' into gallium-0.2
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm_glsl.c
1 #include "main/macros.h"
2 #include "shader/prog_parameter.h"
3 #include "brw_context.h"
4 #include "brw_eu.h"
5 #include "brw_wm.h"
6
7 enum _subroutine {
8 SUB_NOISE1, SUB_NOISE2, SUB_NOISE3, SUB_NOISE4
9 };
10
11 /* Only guess, need a flag in gl_fragment_program later */
12 GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp)
13 {
14 int i;
15 for (i = 0; i < fp->Base.NumInstructions; i++) {
16 struct prog_instruction *inst = &fp->Base.Instructions[i];
17 switch (inst->Opcode) {
18 case OPCODE_IF:
19 case OPCODE_TRUNC:
20 case OPCODE_ENDIF:
21 case OPCODE_CAL:
22 case OPCODE_BRK:
23 case OPCODE_RET:
24 case OPCODE_DDX:
25 case OPCODE_DDY:
26 case OPCODE_NOISE1:
27 case OPCODE_NOISE2:
28 case OPCODE_NOISE3:
29 case OPCODE_NOISE4:
30 case OPCODE_BGNLOOP:
31 return GL_TRUE;
32 default:
33 break;
34 }
35 }
36 return GL_FALSE;
37 }
38
39 static void set_reg(struct brw_wm_compile *c, int file, int index,
40 int component, struct brw_reg reg)
41 {
42 c->wm_regs[file][index][component].reg = reg;
43 c->wm_regs[file][index][component].inited = GL_TRUE;
44 }
45
46 static int get_scalar_dst_index(struct prog_instruction *inst)
47 {
48 int i;
49 for (i = 0; i < 4; i++)
50 if (inst->DstReg.WriteMask & (1<<i))
51 break;
52 return i;
53 }
54
55 static struct brw_reg alloc_tmp(struct brw_wm_compile *c)
56 {
57 struct brw_reg reg;
58 if(c->tmp_index == c->tmp_max)
59 c->tmp_regs[ c->tmp_max++ ] = c->reg_index++;
60
61 reg = brw_vec8_grf(c->tmp_regs[ c->tmp_index++ ], 0);
62 return reg;
63 }
64
65 static int mark_tmps(struct brw_wm_compile *c)
66 {
67 return c->tmp_index;
68 }
69
70 static struct brw_reg lookup_tmp( struct brw_wm_compile *c, int index )
71 {
72 return brw_vec8_grf( c->tmp_regs[ index ], 0 );
73 }
74
75 static void release_tmps(struct brw_wm_compile *c, int mark)
76 {
77 c->tmp_index = mark;
78 }
79
80 static struct brw_reg
81 get_reg(struct brw_wm_compile *c, int file, int index, int component, int nr, GLuint neg, GLuint abs)
82 {
83 struct brw_reg reg;
84 switch (file) {
85 case PROGRAM_STATE_VAR:
86 case PROGRAM_CONSTANT:
87 case PROGRAM_UNIFORM:
88 file = PROGRAM_STATE_VAR;
89 break;
90 case PROGRAM_UNDEFINED:
91 return brw_null_reg();
92 default:
93 break;
94 }
95
96 if(c->wm_regs[file][index][component].inited)
97 reg = c->wm_regs[file][index][component].reg;
98 else
99 reg = brw_vec8_grf(c->reg_index, 0);
100
101 if(!c->wm_regs[file][index][component].inited) {
102 set_reg(c, file, index, component, reg);
103 c->reg_index++;
104 }
105
106 if (neg & (1<< component)) {
107 reg = negate(reg);
108 }
109 if (abs)
110 reg = brw_abs(reg);
111 return reg;
112 }
113
114 static void prealloc_reg(struct brw_wm_compile *c)
115 {
116 int i, j;
117 struct brw_reg reg;
118 int nr_interp_regs = 0;
119 GLuint inputs = FRAG_BIT_WPOS | c->fp_interp_emitted | c->fp_deriv_emitted;
120
121 for (i = 0; i < 4; i++) {
122 reg = (i < c->key.nr_depth_regs)
123 ? brw_vec8_grf(i*2, 0) : brw_vec8_grf(0, 0);
124 set_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, i, reg);
125 }
126 c->reg_index += 2*c->key.nr_depth_regs;
127 {
128 int nr_params = c->fp->program.Base.Parameters->NumParameters;
129 struct gl_program_parameter_list *plist =
130 c->fp->program.Base.Parameters;
131 int index = 0;
132 c->prog_data.nr_params = 4*nr_params;
133 for (i = 0; i < nr_params; i++) {
134 for (j = 0; j < 4; j++, index++) {
135 reg = brw_vec1_grf(c->reg_index + index/8,
136 index%8);
137 c->prog_data.param[index] =
138 &plist->ParameterValues[i][j];
139 set_reg(c, PROGRAM_STATE_VAR, i, j, reg);
140 }
141 }
142 c->nr_creg = 2*((4*nr_params+15)/16);
143 c->reg_index += c->nr_creg;
144 }
145 for (i = 0; i < FRAG_ATTRIB_MAX; i++) {
146 if (inputs & (1<<i)) {
147 nr_interp_regs++;
148 reg = brw_vec8_grf(c->reg_index, 0);
149 for (j = 0; j < 4; j++)
150 set_reg(c, PROGRAM_PAYLOAD, i, j, reg);
151 c->reg_index += 2;
152
153 }
154 }
155 c->prog_data.first_curbe_grf = c->key.nr_depth_regs * 2;
156 c->prog_data.urb_read_length = nr_interp_regs * 2;
157 c->prog_data.curb_read_length = c->nr_creg;
158 c->emit_mask_reg = brw_uw1_reg(BRW_GENERAL_REGISTER_FILE, c->reg_index, 0);
159 c->reg_index++;
160 c->stack = brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, c->reg_index, 0);
161 c->reg_index += 2;
162 }
163
164 static struct brw_reg get_dst_reg(struct brw_wm_compile *c,
165 struct prog_instruction *inst, int component, int nr)
166 {
167 return get_reg(c, inst->DstReg.File, inst->DstReg.Index, component, nr,
168 0, 0);
169 }
170
171 static struct brw_reg get_src_reg(struct brw_wm_compile *c,
172 struct prog_src_register *src, int index, int nr)
173 {
174 int component = GET_SWZ(src->Swizzle, index);
175 return get_reg(c, src->File, src->Index, component, nr,
176 src->NegateBase, src->Abs);
177 }
178
179 /* Subroutines are minimal support for resusable instruction sequences.
180 They are implemented as simply as possible to minimise overhead: there
181 is no explicit support for communication between the caller and callee
182 other than saving the return address in a temporary register, nor is
183 there any automatic local storage. This implies that great care is
184 required before attempting reentrancy or any kind of nested
185 subroutine invocations. */
186 static void invoke_subroutine( struct brw_wm_compile *c,
187 enum _subroutine subroutine,
188 void (*emit)( struct brw_wm_compile * ) )
189 {
190 struct brw_compile *p = &c->func;
191
192 assert( subroutine < BRW_WM_MAX_SUBROUTINE );
193
194 if( c->subroutines[ subroutine ] ) {
195 /* subroutine previously emitted: reuse existing instructions */
196
197 int mark = mark_tmps( c );
198 struct brw_reg return_address = retype( alloc_tmp( c ),
199 BRW_REGISTER_TYPE_UD );
200 int here = p->nr_insn;
201
202 brw_push_insn_state(p);
203 brw_set_mask_control(p, BRW_MASK_DISABLE);
204 brw_ADD( p, return_address, brw_ip_reg(), brw_imm_ud( 2 << 4 ) );
205
206 brw_ADD( p, brw_ip_reg(), brw_ip_reg(),
207 brw_imm_d( ( c->subroutines[ subroutine ] -
208 here - 1 ) << 4 ) );
209 brw_pop_insn_state(p);
210
211 release_tmps( c, mark );
212 } else {
213 /* previously unused subroutine: emit, and mark for later reuse */
214
215 int mark = mark_tmps( c );
216 struct brw_reg return_address = retype( alloc_tmp( c ),
217 BRW_REGISTER_TYPE_UD );
218 struct brw_instruction *calc;
219 int base = p->nr_insn;
220
221 brw_push_insn_state(p);
222 brw_set_mask_control(p, BRW_MASK_DISABLE);
223 calc = brw_ADD( p, return_address, brw_ip_reg(), brw_imm_ud( 0 ) );
224 brw_pop_insn_state(p);
225
226 c->subroutines[ subroutine ] = p->nr_insn;
227
228 emit( c );
229
230 brw_push_insn_state(p);
231 brw_set_mask_control(p, BRW_MASK_DISABLE);
232 brw_MOV( p, brw_ip_reg(), return_address );
233 brw_pop_insn_state(p);
234
235 brw_set_src1( calc, brw_imm_ud( ( p->nr_insn - base ) << 4 ) );
236
237 release_tmps( c, mark );
238 }
239 }
240
241 static void emit_abs( struct brw_wm_compile *c,
242 struct prog_instruction *inst)
243 {
244 int i;
245 struct brw_compile *p = &c->func;
246 brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
247 for (i = 0; i < 4; i++) {
248 if (inst->DstReg.WriteMask & (1<<i)) {
249 struct brw_reg src, dst;
250 dst = get_dst_reg(c, inst, i, 1);
251 src = get_src_reg(c, &inst->SrcReg[0], i, 1);
252 brw_MOV(p, dst, brw_abs(src));
253 }
254 }
255 brw_set_saturate(p, 0);
256 }
257
258 static void emit_trunc( struct brw_wm_compile *c,
259 struct prog_instruction *inst)
260 {
261 int i;
262 struct brw_compile *p = &c->func;
263 GLuint mask = inst->DstReg.WriteMask;
264 brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
265 for (i = 0; i < 4; i++) {
266 if (mask & (1<<i)) {
267 struct brw_reg src, dst;
268 dst = get_dst_reg(c, inst, i, 1) ;
269 src = get_src_reg(c, &inst->SrcReg[0], i, 1);
270 brw_RNDD(p, dst, src);
271 }
272 }
273 brw_set_saturate(p, 0);
274 }
275
276 static void emit_mov( struct brw_wm_compile *c,
277 struct prog_instruction *inst)
278 {
279 int i;
280 struct brw_compile *p = &c->func;
281 GLuint mask = inst->DstReg.WriteMask;
282 brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
283 for (i = 0; i < 4; i++) {
284 if (mask & (1<<i)) {
285 struct brw_reg src, dst;
286 dst = get_dst_reg(c, inst, i, 1);
287 src = get_src_reg(c, &inst->SrcReg[0], i, 1);
288 brw_MOV(p, dst, src);
289 }
290 }
291 brw_set_saturate(p, 0);
292 }
293
294 static void emit_pixel_xy(struct brw_wm_compile *c,
295 struct prog_instruction *inst)
296 {
297 struct brw_reg r1 = brw_vec1_grf(1, 0);
298 struct brw_reg r1_uw = retype(r1, BRW_REGISTER_TYPE_UW);
299
300 struct brw_reg dst0, dst1;
301 struct brw_compile *p = &c->func;
302 GLuint mask = inst->DstReg.WriteMask;
303
304 dst0 = get_dst_reg(c, inst, 0, 1);
305 dst1 = get_dst_reg(c, inst, 1, 1);
306 /* Calculate pixel centers by adding 1 or 0 to each of the
307 * micro-tile coordinates passed in r1.
308 */
309 if (mask & WRITEMASK_X) {
310 brw_ADD(p,
311 vec8(retype(dst0, BRW_REGISTER_TYPE_UW)),
312 stride(suboffset(r1_uw, 4), 2, 4, 0),
313 brw_imm_v(0x10101010));
314 }
315
316 if (mask & WRITEMASK_Y) {
317 brw_ADD(p,
318 vec8(retype(dst1, BRW_REGISTER_TYPE_UW)),
319 stride(suboffset(r1_uw, 5), 2, 4, 0),
320 brw_imm_v(0x11001100));
321 }
322
323 }
324
325 static void emit_delta_xy(struct brw_wm_compile *c,
326 struct prog_instruction *inst)
327 {
328 struct brw_reg r1 = brw_vec1_grf(1, 0);
329 struct brw_reg dst0, dst1, src0, src1;
330 struct brw_compile *p = &c->func;
331 GLuint mask = inst->DstReg.WriteMask;
332
333 dst0 = get_dst_reg(c, inst, 0, 1);
334 dst1 = get_dst_reg(c, inst, 1, 1);
335 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
336 src1 = get_src_reg(c, &inst->SrcReg[0], 1, 1);
337 /* Calc delta X,Y by subtracting origin in r1 from the pixel
338 * centers.
339 */
340 if (mask & WRITEMASK_X) {
341 brw_ADD(p,
342 dst0,
343 retype(src0, BRW_REGISTER_TYPE_UW),
344 negate(r1));
345 }
346
347 if (mask & WRITEMASK_Y) {
348 brw_ADD(p,
349 dst1,
350 retype(src1, BRW_REGISTER_TYPE_UW),
351 negate(suboffset(r1,1)));
352
353 }
354
355 }
356
357
358 static void fire_fb_write( struct brw_wm_compile *c,
359 GLuint base_reg,
360 GLuint nr,
361 GLuint target,
362 GLuint eot)
363 {
364 struct brw_compile *p = &c->func;
365 /* Pass through control information:
366 */
367 /* mov (8) m1.0<1>:ud r1.0<8;8,1>:ud { Align1 NoMask } */
368 {
369 brw_push_insn_state(p);
370 brw_set_mask_control(p, BRW_MASK_DISABLE); /* ? */
371 brw_MOV(p,
372 brw_message_reg(base_reg + 1),
373 brw_vec8_grf(1, 0));
374 brw_pop_insn_state(p);
375 }
376 /* Send framebuffer write message: */
377 brw_fb_WRITE(p,
378 retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW),
379 base_reg,
380 retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW),
381 target,
382 nr,
383 0,
384 eot);
385 }
386
387 static void emit_fb_write(struct brw_wm_compile *c,
388 struct prog_instruction *inst)
389 {
390 struct brw_compile *p = &c->func;
391 int nr = 2;
392 int channel;
393 GLuint target, eot;
394 struct brw_reg src0;
395
396 /* Reserve a space for AA - may not be needed:
397 */
398 if (c->key.aa_dest_stencil_reg)
399 nr += 1;
400 {
401 brw_push_insn_state(p);
402 for (channel = 0; channel < 4; channel++) {
403 src0 = get_src_reg(c, &inst->SrcReg[0], channel, 1);
404 /* mov (8) m2.0<1>:ud r28.0<8;8,1>:ud { Align1 } */
405 /* mov (8) m6.0<1>:ud r29.0<8;8,1>:ud { Align1 SecHalf } */
406 brw_MOV(p, brw_message_reg(nr + channel), src0);
407 }
408 /* skip over the regs populated above: */
409 nr += 8;
410 brw_pop_insn_state(p);
411 }
412
413 if (c->key.source_depth_to_render_target)
414 {
415 if (c->key.computes_depth) {
416 src0 = get_src_reg(c, &inst->SrcReg[2], 2, 1);
417 brw_MOV(p, brw_message_reg(nr), src0);
418 } else {
419 src0 = get_src_reg(c, &inst->SrcReg[1], 1, 1);
420 brw_MOV(p, brw_message_reg(nr), src0);
421 }
422
423 nr += 2;
424 }
425 target = inst->Sampler >> 1;
426 eot = inst->Sampler & 1;
427 fire_fb_write(c, 0, nr, target, eot);
428 }
429
430 static void emit_pixel_w( struct brw_wm_compile *c,
431 struct prog_instruction *inst)
432 {
433 struct brw_compile *p = &c->func;
434 GLuint mask = inst->DstReg.WriteMask;
435 if (mask & WRITEMASK_W) {
436 struct brw_reg dst, src0, delta0, delta1;
437 struct brw_reg interp3;
438
439 dst = get_dst_reg(c, inst, 3, 1);
440 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
441 delta0 = get_src_reg(c, &inst->SrcReg[1], 0, 1);
442 delta1 = get_src_reg(c, &inst->SrcReg[1], 1, 1);
443
444 interp3 = brw_vec1_grf(src0.nr+1, 4);
445 /* Calc 1/w - just linterp wpos[3] optimized by putting the
446 * result straight into a message reg.
447 */
448 brw_LINE(p, brw_null_reg(), interp3, delta0);
449 brw_MAC(p, brw_message_reg(2), suboffset(interp3, 1), delta1);
450
451 /* Calc w */
452 brw_math_16( p, dst,
453 BRW_MATH_FUNCTION_INV,
454 BRW_MATH_SATURATE_NONE,
455 2, brw_null_reg(),
456 BRW_MATH_PRECISION_FULL);
457 }
458 }
459
460 static void emit_linterp(struct brw_wm_compile *c,
461 struct prog_instruction *inst)
462 {
463 struct brw_compile *p = &c->func;
464 GLuint mask = inst->DstReg.WriteMask;
465 struct brw_reg interp[4];
466 struct brw_reg dst, delta0, delta1;
467 struct brw_reg src0;
468
469 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
470 delta0 = get_src_reg(c, &inst->SrcReg[1], 0, 1);
471 delta1 = get_src_reg(c, &inst->SrcReg[1], 1, 1);
472 GLuint nr = src0.nr;
473 int i;
474
475 interp[0] = brw_vec1_grf(nr, 0);
476 interp[1] = brw_vec1_grf(nr, 4);
477 interp[2] = brw_vec1_grf(nr+1, 0);
478 interp[3] = brw_vec1_grf(nr+1, 4);
479
480 for(i = 0; i < 4; i++ ) {
481 if (mask & (1<<i)) {
482 dst = get_dst_reg(c, inst, i, 1);
483 brw_LINE(p, brw_null_reg(), interp[i], delta0);
484 brw_MAC(p, dst, suboffset(interp[i],1), delta1);
485 }
486 }
487 }
488
489 static void emit_cinterp(struct brw_wm_compile *c,
490 struct prog_instruction *inst)
491 {
492 struct brw_compile *p = &c->func;
493 GLuint mask = inst->DstReg.WriteMask;
494
495 struct brw_reg interp[4];
496 struct brw_reg dst, src0;
497
498 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
499 GLuint nr = src0.nr;
500 int i;
501
502 interp[0] = brw_vec1_grf(nr, 0);
503 interp[1] = brw_vec1_grf(nr, 4);
504 interp[2] = brw_vec1_grf(nr+1, 0);
505 interp[3] = brw_vec1_grf(nr+1, 4);
506
507 for(i = 0; i < 4; i++ ) {
508 if (mask & (1<<i)) {
509 dst = get_dst_reg(c, inst, i, 1);
510 brw_MOV(p, dst, suboffset(interp[i],3));
511 }
512 }
513 }
514
515 static void emit_pinterp(struct brw_wm_compile *c,
516 struct prog_instruction *inst)
517 {
518 struct brw_compile *p = &c->func;
519 GLuint mask = inst->DstReg.WriteMask;
520
521 struct brw_reg interp[4];
522 struct brw_reg dst, delta0, delta1;
523 struct brw_reg src0, w;
524
525 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
526 delta0 = get_src_reg(c, &inst->SrcReg[1], 0, 1);
527 delta1 = get_src_reg(c, &inst->SrcReg[1], 1, 1);
528 w = get_src_reg(c, &inst->SrcReg[2], 3, 1);
529 GLuint nr = src0.nr;
530 int i;
531
532 interp[0] = brw_vec1_grf(nr, 0);
533 interp[1] = brw_vec1_grf(nr, 4);
534 interp[2] = brw_vec1_grf(nr+1, 0);
535 interp[3] = brw_vec1_grf(nr+1, 4);
536
537 for(i = 0; i < 4; i++ ) {
538 if (mask & (1<<i)) {
539 dst = get_dst_reg(c, inst, i, 1);
540 brw_LINE(p, brw_null_reg(), interp[i], delta0);
541 brw_MAC(p, dst, suboffset(interp[i],1),
542 delta1);
543 brw_MUL(p, dst, dst, w);
544 }
545 }
546 }
547
548 static void emit_xpd(struct brw_wm_compile *c,
549 struct prog_instruction *inst)
550 {
551 int i;
552 struct brw_compile *p = &c->func;
553 GLuint mask = inst->DstReg.WriteMask;
554 for (i = 0; i < 4; i++) {
555 GLuint i2 = (i+2)%3;
556 GLuint i1 = (i+1)%3;
557 if (mask & (1<<i)) {
558 struct brw_reg src0, src1, dst;
559 dst = get_dst_reg(c, inst, i, 1);
560 src0 = negate(get_src_reg(c, &inst->SrcReg[0], i2, 1));
561 src1 = get_src_reg(c, &inst->SrcReg[1], i1, 1);
562 brw_MUL(p, brw_null_reg(), src0, src1);
563 src0 = get_src_reg(c, &inst->SrcReg[0], i1, 1);
564 src1 = get_src_reg(c, &inst->SrcReg[1], i2, 1);
565 brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
566 brw_MAC(p, dst, src0, src1);
567 brw_set_saturate(p, 0);
568 }
569 }
570 brw_set_saturate(p, 0);
571 }
572
573 static void emit_dp3(struct brw_wm_compile *c,
574 struct prog_instruction *inst)
575 {
576 struct brw_reg src0[3], src1[3], dst;
577 int i;
578 struct brw_compile *p = &c->func;
579 for (i = 0; i < 3; i++) {
580 src0[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
581 src1[i] = get_src_reg(c, &inst->SrcReg[1], i, 1);
582 }
583
584 dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
585 brw_MUL(p, brw_null_reg(), src0[0], src1[0]);
586 brw_MAC(p, brw_null_reg(), src0[1], src1[1]);
587 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
588 brw_MAC(p, dst, src0[2], src1[2]);
589 brw_set_saturate(p, 0);
590 }
591
592 static void emit_dp4(struct brw_wm_compile *c,
593 struct prog_instruction *inst)
594 {
595 struct brw_reg src0[4], src1[4], dst;
596 int i;
597 struct brw_compile *p = &c->func;
598 for (i = 0; i < 4; i++) {
599 src0[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
600 src1[i] = get_src_reg(c, &inst->SrcReg[1], i, 1);
601 }
602 dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
603 brw_MUL(p, brw_null_reg(), src0[0], src1[0]);
604 brw_MAC(p, brw_null_reg(), src0[1], src1[1]);
605 brw_MAC(p, brw_null_reg(), src0[2], src1[2]);
606 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
607 brw_MAC(p, dst, src0[3], src1[3]);
608 brw_set_saturate(p, 0);
609 }
610
611 static void emit_dph(struct brw_wm_compile *c,
612 struct prog_instruction *inst)
613 {
614 struct brw_reg src0[4], src1[4], dst;
615 int i;
616 struct brw_compile *p = &c->func;
617 for (i = 0; i < 4; i++) {
618 src0[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
619 src1[i] = get_src_reg(c, &inst->SrcReg[1], i, 1);
620 }
621 dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
622 brw_MUL(p, brw_null_reg(), src0[0], src1[0]);
623 brw_MAC(p, brw_null_reg(), src0[1], src1[1]);
624 brw_MAC(p, dst, src0[2], src1[2]);
625 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
626 brw_ADD(p, dst, src0[3], src1[3]);
627 brw_set_saturate(p, 0);
628 }
629
630 static void emit_math1(struct brw_wm_compile *c,
631 struct prog_instruction *inst, GLuint func)
632 {
633 struct brw_compile *p = &c->func;
634 struct brw_reg src0, dst;
635
636 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
637 dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
638 brw_MOV(p, brw_message_reg(2), src0);
639 brw_math(p,
640 dst,
641 func,
642 (inst->SaturateMode != SATURATE_OFF) ? BRW_MATH_SATURATE_SATURATE : BRW_MATH_SATURATE_NONE,
643 2,
644 brw_null_reg(),
645 BRW_MATH_DATA_VECTOR,
646 BRW_MATH_PRECISION_FULL);
647 }
648
649 static void emit_rcp(struct brw_wm_compile *c,
650 struct prog_instruction *inst)
651 {
652 emit_math1(c, inst, BRW_MATH_FUNCTION_INV);
653 }
654
655 static void emit_rsq(struct brw_wm_compile *c,
656 struct prog_instruction *inst)
657 {
658 emit_math1(c, inst, BRW_MATH_FUNCTION_RSQ);
659 }
660
661 static void emit_sin(struct brw_wm_compile *c,
662 struct prog_instruction *inst)
663 {
664 emit_math1(c, inst, BRW_MATH_FUNCTION_SIN);
665 }
666
667 static void emit_cos(struct brw_wm_compile *c,
668 struct prog_instruction *inst)
669 {
670 emit_math1(c, inst, BRW_MATH_FUNCTION_COS);
671 }
672
673 static void emit_ex2(struct brw_wm_compile *c,
674 struct prog_instruction *inst)
675 {
676 emit_math1(c, inst, BRW_MATH_FUNCTION_EXP);
677 }
678
679 static void emit_lg2(struct brw_wm_compile *c,
680 struct prog_instruction *inst)
681 {
682 emit_math1(c, inst, BRW_MATH_FUNCTION_LOG);
683 }
684
685 static void emit_add(struct brw_wm_compile *c,
686 struct prog_instruction *inst)
687 {
688 struct brw_compile *p = &c->func;
689 struct brw_reg src0, src1, dst;
690 GLuint mask = inst->DstReg.WriteMask;
691 int i;
692 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
693 for (i = 0 ; i < 4; i++) {
694 if (mask & (1<<i)) {
695 dst = get_dst_reg(c, inst, i, 1);
696 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
697 src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
698 brw_ADD(p, dst, src0, src1);
699 }
700 }
701 brw_set_saturate(p, 0);
702 }
703
704 static void emit_sub(struct brw_wm_compile *c,
705 struct prog_instruction *inst)
706 {
707 struct brw_compile *p = &c->func;
708 struct brw_reg src0, src1, dst;
709 GLuint mask = inst->DstReg.WriteMask;
710 int i;
711 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
712 for (i = 0 ; i < 4; i++) {
713 if (mask & (1<<i)) {
714 dst = get_dst_reg(c, inst, i, 1);
715 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
716 src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
717 brw_ADD(p, dst, src0, negate(src1));
718 }
719 }
720 brw_set_saturate(p, 0);
721 }
722
723 static void emit_mul(struct brw_wm_compile *c,
724 struct prog_instruction *inst)
725 {
726 struct brw_compile *p = &c->func;
727 struct brw_reg src0, src1, dst;
728 GLuint mask = inst->DstReg.WriteMask;
729 int i;
730 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
731 for (i = 0 ; i < 4; i++) {
732 if (mask & (1<<i)) {
733 dst = get_dst_reg(c, inst, i, 1);
734 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
735 src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
736 brw_MUL(p, dst, src0, src1);
737 }
738 }
739 brw_set_saturate(p, 0);
740 }
741
742 static void emit_frc(struct brw_wm_compile *c,
743 struct prog_instruction *inst)
744 {
745 struct brw_compile *p = &c->func;
746 struct brw_reg src0, dst;
747 GLuint mask = inst->DstReg.WriteMask;
748 int i;
749 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
750 for (i = 0 ; i < 4; i++) {
751 if (mask & (1<<i)) {
752 dst = get_dst_reg(c, inst, i, 1);
753 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
754 brw_FRC(p, dst, src0);
755 }
756 }
757 if (inst->SaturateMode != SATURATE_OFF)
758 brw_set_saturate(p, 0);
759 }
760
761 static void emit_flr(struct brw_wm_compile *c,
762 struct prog_instruction *inst)
763 {
764 struct brw_compile *p = &c->func;
765 struct brw_reg src0, dst;
766 GLuint mask = inst->DstReg.WriteMask;
767 int i;
768 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
769 for (i = 0 ; i < 4; i++) {
770 if (mask & (1<<i)) {
771 dst = get_dst_reg(c, inst, i, 1);
772 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
773 brw_RNDD(p, dst, src0);
774 }
775 }
776 brw_set_saturate(p, 0);
777 }
778
779 static void emit_max(struct brw_wm_compile *c,
780 struct prog_instruction *inst)
781 {
782 struct brw_compile *p = &c->func;
783 GLuint mask = inst->DstReg.WriteMask;
784 struct brw_reg src0, src1, dst;
785 int i;
786 brw_push_insn_state(p);
787 for (i = 0; i < 4; i++) {
788 if (mask & (1<<i)) {
789 dst = get_dst_reg(c, inst, i, 1);
790 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
791 src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
792 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
793 brw_MOV(p, dst, src0);
794 brw_set_saturate(p, 0);
795
796 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, src0, src1);
797 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
798 brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
799 brw_MOV(p, dst, src1);
800 brw_set_saturate(p, 0);
801 brw_set_predicate_control_flag_value(p, 0xff);
802 }
803 }
804 brw_pop_insn_state(p);
805 }
806
807 static void emit_min(struct brw_wm_compile *c,
808 struct prog_instruction *inst)
809 {
810 struct brw_compile *p = &c->func;
811 GLuint mask = inst->DstReg.WriteMask;
812 struct brw_reg src0, src1, dst;
813 int i;
814 brw_push_insn_state(p);
815 for (i = 0; i < 4; i++) {
816 if (mask & (1<<i)) {
817 dst = get_dst_reg(c, inst, i, 1);
818 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
819 src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
820 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
821 brw_MOV(p, dst, src0);
822 brw_set_saturate(p, 0);
823
824 brw_CMP(p, brw_null_reg(), BRW_CONDITIONAL_L, src1, src0);
825 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
826 brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
827 brw_MOV(p, dst, src1);
828 brw_set_saturate(p, 0);
829 brw_set_predicate_control_flag_value(p, 0xff);
830 }
831 }
832 brw_pop_insn_state(p);
833 }
834
835 static void emit_pow(struct brw_wm_compile *c,
836 struct prog_instruction *inst)
837 {
838 struct brw_compile *p = &c->func;
839 struct brw_reg dst, src0, src1;
840 dst = get_dst_reg(c, inst, get_scalar_dst_index(inst), 1);
841 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
842 src1 = get_src_reg(c, &inst->SrcReg[1], 0, 1);
843
844 brw_MOV(p, brw_message_reg(2), src0);
845 brw_MOV(p, brw_message_reg(3), src1);
846
847 brw_math(p,
848 dst,
849 BRW_MATH_FUNCTION_POW,
850 (inst->SaturateMode != SATURATE_OFF) ? BRW_MATH_SATURATE_SATURATE : BRW_MATH_SATURATE_NONE,
851 2,
852 brw_null_reg(),
853 BRW_MATH_DATA_VECTOR,
854 BRW_MATH_PRECISION_FULL);
855 }
856
857 static void emit_lrp(struct brw_wm_compile *c,
858 struct prog_instruction *inst)
859 {
860 struct brw_compile *p = &c->func;
861 GLuint mask = inst->DstReg.WriteMask;
862 struct brw_reg dst, tmp1, tmp2, src0, src1, src2;
863 int i;
864 int mark = mark_tmps(c);
865 for (i = 0; i < 4; i++) {
866 if (mask & (1<<i)) {
867 dst = get_dst_reg(c, inst, i, 1);
868 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
869
870 src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
871
872 if (src1.nr == dst.nr) {
873 tmp1 = alloc_tmp(c);
874 brw_MOV(p, tmp1, src1);
875 } else
876 tmp1 = src1;
877
878 src2 = get_src_reg(c, &inst->SrcReg[2], i, 1);
879 if (src2.nr == dst.nr) {
880 tmp2 = alloc_tmp(c);
881 brw_MOV(p, tmp2, src2);
882 } else
883 tmp2 = src2;
884
885 brw_ADD(p, dst, negate(src0), brw_imm_f(1.0));
886 brw_MUL(p, brw_null_reg(), dst, tmp2);
887 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
888 brw_MAC(p, dst, src0, tmp1);
889 brw_set_saturate(p, 0);
890 }
891 release_tmps(c, mark);
892 }
893 }
894
895 static void emit_kil(struct brw_wm_compile *c)
896 {
897 struct brw_compile *p = &c->func;
898 struct brw_reg depth = retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW);
899 brw_push_insn_state(p);
900 brw_set_mask_control(p, BRW_MASK_DISABLE);
901 brw_NOT(p, c->emit_mask_reg, brw_mask_reg(1)); //IMASK
902 brw_AND(p, depth, c->emit_mask_reg, depth);
903 brw_pop_insn_state(p);
904 }
905
906 static void emit_mad(struct brw_wm_compile *c,
907 struct prog_instruction *inst)
908 {
909 struct brw_compile *p = &c->func;
910 GLuint mask = inst->DstReg.WriteMask;
911 struct brw_reg dst, src0, src1, src2;
912 int i;
913
914 for (i = 0; i < 4; i++) {
915 if (mask & (1<<i)) {
916 dst = get_dst_reg(c, inst, i, 1);
917 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
918 src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
919 src2 = get_src_reg(c, &inst->SrcReg[2], i, 1);
920 brw_MUL(p, dst, src0, src1);
921
922 brw_set_saturate(p, (inst->SaturateMode != SATURATE_OFF) ? 1 : 0);
923 brw_ADD(p, dst, dst, src2);
924 brw_set_saturate(p, 0);
925 }
926 }
927 }
928
929 static void emit_sop(struct brw_wm_compile *c,
930 struct prog_instruction *inst, GLuint cond)
931 {
932 struct brw_compile *p = &c->func;
933 GLuint mask = inst->DstReg.WriteMask;
934 struct brw_reg dst, src0, src1;
935 int i;
936
937 for (i = 0; i < 4; i++) {
938 if (mask & (1<<i)) {
939 dst = get_dst_reg(c, inst, i, 1);
940 src0 = get_src_reg(c, &inst->SrcReg[0], i, 1);
941 src1 = get_src_reg(c, &inst->SrcReg[1], i, 1);
942 brw_push_insn_state(p);
943 brw_CMP(p, brw_null_reg(), cond, src0, src1);
944 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
945 brw_MOV(p, dst, brw_imm_f(0.0));
946 brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
947 brw_MOV(p, dst, brw_imm_f(1.0));
948 brw_pop_insn_state(p);
949 }
950 }
951 }
952
953 static void emit_slt(struct brw_wm_compile *c,
954 struct prog_instruction *inst)
955 {
956 emit_sop(c, inst, BRW_CONDITIONAL_L);
957 }
958
959 static void emit_sle(struct brw_wm_compile *c,
960 struct prog_instruction *inst)
961 {
962 emit_sop(c, inst, BRW_CONDITIONAL_LE);
963 }
964
965 static void emit_sgt(struct brw_wm_compile *c,
966 struct prog_instruction *inst)
967 {
968 emit_sop(c, inst, BRW_CONDITIONAL_G);
969 }
970
971 static void emit_sge(struct brw_wm_compile *c,
972 struct prog_instruction *inst)
973 {
974 emit_sop(c, inst, BRW_CONDITIONAL_GE);
975 }
976
977 static void emit_seq(struct brw_wm_compile *c,
978 struct prog_instruction *inst)
979 {
980 emit_sop(c, inst, BRW_CONDITIONAL_EQ);
981 }
982
983 static void emit_sne(struct brw_wm_compile *c,
984 struct prog_instruction *inst)
985 {
986 emit_sop(c, inst, BRW_CONDITIONAL_NEQ);
987 }
988
989 static void emit_ddx(struct brw_wm_compile *c,
990 struct prog_instruction *inst)
991 {
992 struct brw_compile *p = &c->func;
993 GLuint mask = inst->DstReg.WriteMask;
994 struct brw_reg interp[4];
995 struct brw_reg dst;
996 struct brw_reg src0, w;
997 GLuint nr, i;
998 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
999 w = get_src_reg(c, &inst->SrcReg[1], 3, 1);
1000 nr = src0.nr;
1001 interp[0] = brw_vec1_grf(nr, 0);
1002 interp[1] = brw_vec1_grf(nr, 4);
1003 interp[2] = brw_vec1_grf(nr+1, 0);
1004 interp[3] = brw_vec1_grf(nr+1, 4);
1005 brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
1006 for(i = 0; i < 4; i++ ) {
1007 if (mask & (1<<i)) {
1008 dst = get_dst_reg(c, inst, i, 1);
1009 brw_MOV(p, dst, interp[i]);
1010 brw_MUL(p, dst, dst, w);
1011 }
1012 }
1013 brw_set_saturate(p, 0);
1014 }
1015
1016 static void emit_ddy(struct brw_wm_compile *c,
1017 struct prog_instruction *inst)
1018 {
1019 struct brw_compile *p = &c->func;
1020 GLuint mask = inst->DstReg.WriteMask;
1021 struct brw_reg interp[4];
1022 struct brw_reg dst;
1023 struct brw_reg src0, w;
1024 GLuint nr, i;
1025
1026 src0 = get_src_reg(c, &inst->SrcReg[0], 0, 1);
1027 nr = src0.nr;
1028 w = get_src_reg(c, &inst->SrcReg[1], 3, 1);
1029 interp[0] = brw_vec1_grf(nr, 0);
1030 interp[1] = brw_vec1_grf(nr, 4);
1031 interp[2] = brw_vec1_grf(nr+1, 0);
1032 interp[3] = brw_vec1_grf(nr+1, 4);
1033 brw_set_saturate(p, inst->SaturateMode != SATURATE_OFF);
1034 for(i = 0; i < 4; i++ ) {
1035 if (mask & (1<<i)) {
1036 dst = get_dst_reg(c, inst, i, 1);
1037 brw_MOV(p, dst, suboffset(interp[i], 1));
1038 brw_MUL(p, dst, dst, w);
1039 }
1040 }
1041 brw_set_saturate(p, 0);
1042 }
1043
1044 static __inline struct brw_reg high_words( struct brw_reg reg )
1045 {
1046 return stride( suboffset( retype( reg, BRW_REGISTER_TYPE_W ), 1 ),
1047 0, 8, 2 );
1048 }
1049
1050 static __inline struct brw_reg low_words( struct brw_reg reg )
1051 {
1052 return stride( retype( reg, BRW_REGISTER_TYPE_W ), 0, 8, 2 );
1053 }
1054
1055 static __inline struct brw_reg even_bytes( struct brw_reg reg )
1056 {
1057 return stride( retype( reg, BRW_REGISTER_TYPE_B ), 0, 16, 2 );
1058 }
1059
1060 static __inline struct brw_reg odd_bytes( struct brw_reg reg )
1061 {
1062 return stride( suboffset( retype( reg, BRW_REGISTER_TYPE_B ), 1 ),
1063 0, 16, 2 );
1064 }
1065
1066 /* One-, two- and three-dimensional Perlin noise, similar to the description
1067 in _Improving Noise_, Ken Perlin, Computer Graphics vol. 35 no. 3. */
1068 static void noise1_sub( struct brw_wm_compile *c ) {
1069
1070 struct brw_compile *p = &c->func;
1071 struct brw_reg param,
1072 x0, x1, /* gradients at each end */
1073 t, tmp[ 2 ], /* float temporaries */
1074 itmp[ 5 ]; /* unsigned integer temporaries (aliases of floats above) */
1075 int i;
1076 int mark = mark_tmps( c );
1077
1078 x0 = alloc_tmp( c );
1079 x1 = alloc_tmp( c );
1080 t = alloc_tmp( c );
1081 tmp[ 0 ] = alloc_tmp( c );
1082 tmp[ 1 ] = alloc_tmp( c );
1083 itmp[ 0 ] = retype( tmp[ 0 ], BRW_REGISTER_TYPE_UD );
1084 itmp[ 1 ] = retype( tmp[ 1 ], BRW_REGISTER_TYPE_UD );
1085 itmp[ 2 ] = retype( x0, BRW_REGISTER_TYPE_UD );
1086 itmp[ 3 ] = retype( x1, BRW_REGISTER_TYPE_UD );
1087 itmp[ 4 ] = retype( t, BRW_REGISTER_TYPE_UD );
1088
1089 param = lookup_tmp( c, mark - 2 );
1090
1091 brw_set_access_mode( p, BRW_ALIGN_1 );
1092
1093 brw_MOV( p, itmp[ 2 ], brw_imm_ud( 0xBA97 ) ); /* constant used later */
1094
1095 /* Arrange the two end coordinates into scalars (itmp0/itmp1) to
1096 be hashed. Also compute the remainder (offset within the unit
1097 length), interleaved to reduce register dependency penalties. */
1098 brw_RNDD( p, itmp[ 0 ], param );
1099 brw_FRC( p, param, param );
1100 brw_ADD( p, itmp[ 1 ], itmp[ 0 ], brw_imm_ud( 1 ) );
1101 brw_MOV( p, itmp[ 3 ], brw_imm_ud( 0x79D9 ) ); /* constant used later */
1102 brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xD5B1 ) ); /* constant used later */
1103
1104 /* We're now ready to perform the hashing. The two hashes are
1105 interleaved for performance. The hash function used is
1106 designed to rapidly achieve avalanche and require only 32x16
1107 bit multiplication, and 16-bit swizzles (which we get for
1108 free). We can't use immediate operands in the multiplies,
1109 because immediates are permitted only in src1 and the 16-bit
1110 factor is permitted only in src0. */
1111 for( i = 0; i < 2; i++ )
1112 brw_MUL( p, itmp[ i ], itmp[ 2 ], itmp[ i ] );
1113 for( i = 0; i < 2; i++ )
1114 brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
1115 high_words( itmp[ i ] ) );
1116 for( i = 0; i < 2; i++ )
1117 brw_MUL( p, itmp[ i ], itmp[ 3 ], itmp[ i ] );
1118 for( i = 0; i < 2; i++ )
1119 brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
1120 high_words( itmp[ i ] ) );
1121 for( i = 0; i < 2; i++ )
1122 brw_MUL( p, itmp[ i ], itmp[ 4 ], itmp[ i ] );
1123 for( i = 0; i < 2; i++ )
1124 brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
1125 high_words( itmp[ i ] ) );
1126
1127 /* Now we want to initialise the two gradients based on the
1128 hashes. Format conversion from signed integer to float leaves
1129 everything scaled too high by a factor of pow( 2, 31 ), but
1130 we correct for that right at the end. */
1131 brw_ADD( p, t, param, brw_imm_f( -1.0 ) );
1132 brw_MOV( p, x0, retype( tmp[ 0 ], BRW_REGISTER_TYPE_D ) );
1133 brw_MOV( p, x1, retype( tmp[ 1 ], BRW_REGISTER_TYPE_D ) );
1134
1135 brw_MUL( p, x0, x0, param );
1136 brw_MUL( p, x1, x1, t );
1137
1138 /* We interpolate between the gradients using the polynomial
1139 6t^5 - 15t^4 + 10t^3 (Perlin). */
1140 brw_MUL( p, tmp[ 0 ], param, brw_imm_f( 6.0 ) );
1141 brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( -15.0 ) );
1142 brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
1143 brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( 10.0 ) );
1144 brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
1145 brw_ADD( p, x1, x1, negate( x0 ) ); /* unrelated work to fill the
1146 pipeline */
1147 brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param );
1148 brw_MUL( p, param, tmp[ 0 ], param );
1149 brw_MUL( p, x1, x1, param );
1150 brw_ADD( p, x0, x0, x1 );
1151 /* scale by pow( 2, -30 ), to compensate for the format conversion
1152 above and an extra factor of 2 so that a single gradient covers
1153 the [-1,1] range */
1154 brw_MUL( p, param, x0, brw_imm_f( 0.000000000931322574615478515625 ) );
1155
1156 release_tmps( c, mark );
1157 }
1158
1159 static void emit_noise1( struct brw_wm_compile *c,
1160 struct prog_instruction *inst )
1161 {
1162 struct brw_compile *p = &c->func;
1163 struct brw_reg src, param, dst;
1164 GLuint mask = inst->DstReg.WriteMask;
1165 int i;
1166 int mark = mark_tmps( c );
1167
1168 assert( mark == 0 );
1169
1170 src = get_src_reg( c, inst->SrcReg, 0, 1 );
1171
1172 param = alloc_tmp( c );
1173
1174 brw_MOV( p, param, src );
1175
1176 invoke_subroutine( c, SUB_NOISE1, noise1_sub );
1177
1178 /* Fill in the result: */
1179 brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
1180 for (i = 0 ; i < 4; i++) {
1181 if (mask & (1<<i)) {
1182 dst = get_dst_reg(c, inst, i, 1);
1183 brw_MOV( p, dst, param );
1184 }
1185 }
1186 if( inst->SaturateMode == SATURATE_ZERO_ONE )
1187 brw_set_saturate( p, 0 );
1188
1189 release_tmps( c, mark );
1190 }
1191
1192 static void noise2_sub( struct brw_wm_compile *c ) {
1193
1194 struct brw_compile *p = &c->func;
1195 struct brw_reg param0, param1,
1196 x0y0, x0y1, x1y0, x1y1, /* gradients at each corner */
1197 t, tmp[ 4 ], /* float temporaries */
1198 itmp[ 7 ]; /* unsigned integer temporaries (aliases of floats above) */
1199 int i;
1200 int mark = mark_tmps( c );
1201
1202 x0y0 = alloc_tmp( c );
1203 x0y1 = alloc_tmp( c );
1204 x1y0 = alloc_tmp( c );
1205 x1y1 = alloc_tmp( c );
1206 t = alloc_tmp( c );
1207 for( i = 0; i < 4; i++ ) {
1208 tmp[ i ] = alloc_tmp( c );
1209 itmp[ i ] = retype( tmp[ i ], BRW_REGISTER_TYPE_UD );
1210 }
1211 itmp[ 4 ] = retype( x0y0, BRW_REGISTER_TYPE_UD );
1212 itmp[ 5 ] = retype( x0y1, BRW_REGISTER_TYPE_UD );
1213 itmp[ 6 ] = retype( x1y0, BRW_REGISTER_TYPE_UD );
1214
1215 param0 = lookup_tmp( c, mark - 3 );
1216 param1 = lookup_tmp( c, mark - 2 );
1217
1218 brw_set_access_mode( p, BRW_ALIGN_1 );
1219
1220 /* Arrange the four corner coordinates into scalars (itmp0..itmp3) to
1221 be hashed. Also compute the remainders (offsets within the unit
1222 square), interleaved to reduce register dependency penalties. */
1223 brw_RNDD( p, itmp[ 0 ], param0 );
1224 brw_RNDD( p, itmp[ 1 ], param1 );
1225 brw_FRC( p, param0, param0 );
1226 brw_FRC( p, param1, param1 );
1227 brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xBA97 ) ); /* constant used later */
1228 brw_ADD( p, high_words( itmp[ 0 ] ), high_words( itmp[ 0 ] ),
1229 low_words( itmp[ 1 ] ) );
1230 brw_MOV( p, itmp[ 5 ], brw_imm_ud( 0x79D9 ) ); /* constant used later */
1231 brw_MOV( p, itmp[ 6 ], brw_imm_ud( 0xD5B1 ) ); /* constant used later */
1232 brw_ADD( p, itmp[ 1 ], itmp[ 0 ], brw_imm_ud( 0x10000 ) );
1233 brw_ADD( p, itmp[ 2 ], itmp[ 0 ], brw_imm_ud( 0x1 ) );
1234 brw_ADD( p, itmp[ 3 ], itmp[ 0 ], brw_imm_ud( 0x10001 ) );
1235
1236 /* We're now ready to perform the hashing. The four hashes are
1237 interleaved for performance. The hash function used is
1238 designed to rapidly achieve avalanche and require only 32x16
1239 bit multiplication, and 16-bit swizzles (which we get for
1240 free). We can't use immediate operands in the multiplies,
1241 because immediates are permitted only in src1 and the 16-bit
1242 factor is permitted only in src0. */
1243 for( i = 0; i < 4; i++ )
1244 brw_MUL( p, itmp[ i ], itmp[ 4 ], itmp[ i ] );
1245 for( i = 0; i < 4; i++ )
1246 brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
1247 high_words( itmp[ i ] ) );
1248 for( i = 0; i < 4; i++ )
1249 brw_MUL( p, itmp[ i ], itmp[ 5 ], itmp[ i ] );
1250 for( i = 0; i < 4; i++ )
1251 brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
1252 high_words( itmp[ i ] ) );
1253 for( i = 0; i < 4; i++ )
1254 brw_MUL( p, itmp[ i ], itmp[ 6 ], itmp[ i ] );
1255 for( i = 0; i < 4; i++ )
1256 brw_XOR( p, low_words( itmp[ i ] ), low_words( itmp[ i ] ),
1257 high_words( itmp[ i ] ) );
1258
1259 /* Now we want to initialise the four gradients based on the
1260 hashes. Format conversion from signed integer to float leaves
1261 everything scaled too high by a factor of pow( 2, 15 ), but
1262 we correct for that right at the end. */
1263 brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
1264 brw_MOV( p, x0y0, low_words( tmp[ 0 ] ) );
1265 brw_MOV( p, x0y1, low_words( tmp[ 1 ] ) );
1266 brw_MOV( p, x1y0, low_words( tmp[ 2 ] ) );
1267 brw_MOV( p, x1y1, low_words( tmp[ 3 ] ) );
1268
1269 brw_MOV( p, tmp[ 0 ], high_words( tmp[ 0 ] ) );
1270 brw_MOV( p, tmp[ 1 ], high_words( tmp[ 1 ] ) );
1271 brw_MOV( p, tmp[ 2 ], high_words( tmp[ 2 ] ) );
1272 brw_MOV( p, tmp[ 3 ], high_words( tmp[ 3 ] ) );
1273
1274 brw_MUL( p, x1y0, x1y0, t );
1275 brw_MUL( p, x1y1, x1y1, t );
1276 brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
1277 brw_MUL( p, x0y0, x0y0, param0 );
1278 brw_MUL( p, x0y1, x0y1, param0 );
1279
1280 brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param1 );
1281 brw_MUL( p, tmp[ 2 ], tmp[ 2 ], param1 );
1282 brw_MUL( p, tmp[ 1 ], tmp[ 1 ], t );
1283 brw_MUL( p, tmp[ 3 ], tmp[ 3 ], t );
1284
1285 brw_ADD( p, x0y0, x0y0, tmp[ 0 ] );
1286 brw_ADD( p, x1y0, x1y0, tmp[ 2 ] );
1287 brw_ADD( p, x0y1, x0y1, tmp[ 1 ] );
1288 brw_ADD( p, x1y1, x1y1, tmp[ 3 ] );
1289
1290 /* We interpolate between the gradients using the polynomial
1291 6t^5 - 15t^4 + 10t^3 (Perlin). */
1292 brw_MUL( p, tmp[ 0 ], param0, brw_imm_f( 6.0 ) );
1293 brw_MUL( p, tmp[ 1 ], param1, brw_imm_f( 6.0 ) );
1294 brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( -15.0 ) );
1295 brw_ADD( p, tmp[ 1 ], tmp[ 1 ], brw_imm_f( -15.0 ) );
1296 brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
1297 brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
1298 brw_ADD( p, x0y1, x0y1, negate( x0y0 ) ); /* unrelated work to fill the
1299 pipeline */
1300 brw_ADD( p, tmp[ 0 ], tmp[ 0 ], brw_imm_f( 10.0 ) );
1301 brw_ADD( p, tmp[ 1 ], tmp[ 1 ], brw_imm_f( 10.0 ) );
1302 brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
1303 brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
1304 brw_ADD( p, x1y1, x1y1, negate( x1y0 ) ); /* unrelated work to fill the
1305 pipeline */
1306 brw_MUL( p, tmp[ 0 ], tmp[ 0 ], param0 );
1307 brw_MUL( p, tmp[ 1 ], tmp[ 1 ], param1 );
1308 brw_MUL( p, param0, tmp[ 0 ], param0 );
1309 brw_MUL( p, param1, tmp[ 1 ], param1 );
1310
1311 /* Here we interpolate in the y dimension... */
1312 brw_MUL( p, x0y1, x0y1, param1 );
1313 brw_MUL( p, x1y1, x1y1, param1 );
1314 brw_ADD( p, x0y0, x0y0, x0y1 );
1315 brw_ADD( p, x1y0, x1y0, x1y1 );
1316
1317 /* And now in x. There are horrible register dependencies here,
1318 but we have nothing else to do. */
1319 brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
1320 brw_MUL( p, x1y0, x1y0, param0 );
1321 brw_ADD( p, x0y0, x0y0, x1y0 );
1322
1323 /* scale by pow( 2, -15 ), as described above */
1324 brw_MUL( p, param0, x0y0, brw_imm_f( 0.000030517578125 ) );
1325
1326 release_tmps( c, mark );
1327 }
1328
1329 static void emit_noise2( struct brw_wm_compile *c,
1330 struct prog_instruction *inst )
1331 {
1332 struct brw_compile *p = &c->func;
1333 struct brw_reg src0, src1, param0, param1, dst;
1334 GLuint mask = inst->DstReg.WriteMask;
1335 int i;
1336 int mark = mark_tmps( c );
1337
1338 assert( mark == 0 );
1339
1340 src0 = get_src_reg( c, inst->SrcReg, 0, 1 );
1341 src1 = get_src_reg( c, inst->SrcReg, 1, 1 );
1342
1343 param0 = alloc_tmp( c );
1344 param1 = alloc_tmp( c );
1345
1346 brw_MOV( p, param0, src0 );
1347 brw_MOV( p, param1, src1 );
1348
1349 invoke_subroutine( c, SUB_NOISE2, noise2_sub );
1350
1351 /* Fill in the result: */
1352 brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
1353 for (i = 0 ; i < 4; i++) {
1354 if (mask & (1<<i)) {
1355 dst = get_dst_reg(c, inst, i, 1);
1356 brw_MOV( p, dst, param0 );
1357 }
1358 }
1359 if( inst->SaturateMode == SATURATE_ZERO_ONE )
1360 brw_set_saturate( p, 0 );
1361
1362 release_tmps( c, mark );
1363 }
1364
1365 /* The three-dimensional case is much like the one- and two- versions above,
1366 but since the number of corners is rapidly growing we now pack 16 16-bit
1367 hashes into each register to extract more parallelism from the EUs. */
1368 static void noise3_sub( struct brw_wm_compile *c ) {
1369
1370 struct brw_compile *p = &c->func;
1371 struct brw_reg param0, param1, param2,
1372 x0y0, x0y1, x1y0, x1y1, /* gradients at four of the corners */
1373 xi, yi, zi, /* interpolation coefficients */
1374 t, tmp[ 8 ], /* float temporaries */
1375 itmp[ 8 ], /* unsigned integer temporaries (aliases of floats above) */
1376 wtmp[ 8 ]; /* 16-way unsigned word temporaries (aliases of above) */
1377 int i;
1378 int mark = mark_tmps( c );
1379
1380 x0y0 = alloc_tmp( c );
1381 x0y1 = alloc_tmp( c );
1382 x1y0 = alloc_tmp( c );
1383 x1y1 = alloc_tmp( c );
1384 xi = alloc_tmp( c );
1385 yi = alloc_tmp( c );
1386 zi = alloc_tmp( c );
1387 t = alloc_tmp( c );
1388 for( i = 0; i < 8; i++ ) {
1389 tmp[ i ] = alloc_tmp( c );
1390 itmp[ i ] = retype( tmp[ i ], BRW_REGISTER_TYPE_UD );
1391 wtmp[ i ] = brw_uw16_grf( tmp[ i ].nr, 0 );
1392 }
1393
1394 param0 = lookup_tmp( c, mark - 4 );
1395 param1 = lookup_tmp( c, mark - 3 );
1396 param2 = lookup_tmp( c, mark - 2 );
1397
1398 brw_set_access_mode( p, BRW_ALIGN_1 );
1399
1400 /* Arrange the eight corner coordinates into scalars (itmp0..itmp3) to
1401 be hashed. Also compute the remainders (offsets within the unit
1402 cube), interleaved to reduce register dependency penalties. */
1403 brw_RNDD( p, itmp[ 0 ], param0 );
1404 brw_RNDD( p, itmp[ 1 ], param1 );
1405 brw_RNDD( p, itmp[ 2 ], param2 );
1406 brw_MOV( p, itmp[ 4 ], brw_imm_ud( 0xBC8F ) ); /* constant used later */
1407 brw_MOV( p, itmp[ 5 ], brw_imm_ud( 0xD0BD ) ); /* constant used later */
1408 brw_MOV( p, itmp[ 6 ], brw_imm_ud( 0x9B93 ) ); /* constant used later */
1409 brw_FRC( p, param0, param0 );
1410 brw_FRC( p, param1, param1 );
1411 brw_FRC( p, param2, param2 );
1412 /* Since we now have only 16 bits of precision in the hash, we must
1413 be more careful about thorough mixing to maintain entropy as we
1414 squash the input vector into a small scalar. */
1415 brw_MUL( p, brw_acc_reg(), itmp[ 4 ], itmp[ 0 ] );
1416 brw_MAC( p, brw_acc_reg(), itmp[ 5 ], itmp[ 1 ] );
1417 brw_MAC( p, itmp[ 0 ], itmp[ 6 ], itmp[ 2 ] );
1418 brw_ADD( p, high_words( itmp[ 0 ] ), low_words( itmp[ 0 ] ),
1419 brw_imm_uw( 0xBC8F ) );
1420
1421 /* Temporarily disable the execution mask while we work with ExecSize=16
1422 channels (the mask is set for ExecSize=8 and is probably incorrect).
1423 Although this might cause execution of unwanted channels, the code
1424 writes only to temporary registers and has no side effects, so
1425 disabling the mask is harmless. */
1426 brw_push_insn_state( p );
1427 brw_set_mask_control( p, BRW_MASK_DISABLE );
1428 brw_ADD( p, wtmp[ 1 ], wtmp[ 0 ], brw_imm_uw( 0xD0BD ) );
1429 brw_ADD( p, wtmp[ 2 ], wtmp[ 0 ], brw_imm_uw( 0x9B93 ) );
1430 brw_ADD( p, wtmp[ 3 ], wtmp[ 1 ], brw_imm_uw( 0x9B93 ) );
1431
1432 /* We're now ready to perform the hashing. The eight hashes are
1433 interleaved for performance. The hash function used is
1434 designed to rapidly achieve avalanche and require only 16x16
1435 bit multiplication, and 8-bit swizzles (which we get for
1436 free). */
1437 for( i = 0; i < 4; i++ )
1438 brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0x28D9 ) );
1439 for( i = 0; i < 4; i++ )
1440 brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ),
1441 odd_bytes( wtmp[ i ] ) );
1442 for( i = 0; i < 4; i++ )
1443 brw_MUL( p, wtmp[ i ], wtmp[ i ], brw_imm_uw( 0xC6D5 ) );
1444 for( i = 0; i < 4; i++ )
1445 brw_XOR( p, even_bytes( wtmp[ i ] ), even_bytes( wtmp[ i ] ),
1446 odd_bytes( wtmp[ i ] ) );
1447 brw_pop_insn_state( p );
1448
1449 /* Now we want to initialise the four rear gradients based on the
1450 hashes. Format conversion from signed integer to float leaves
1451 everything scaled too high by a factor of pow( 2, 15 ), but
1452 we correct for that right at the end. */
1453 /* x component */
1454 brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
1455 brw_MOV( p, x0y0, low_words( tmp[ 0 ] ) );
1456 brw_MOV( p, x0y1, low_words( tmp[ 1 ] ) );
1457 brw_MOV( p, x1y0, high_words( tmp[ 0 ] ) );
1458 brw_MOV( p, x1y1, high_words( tmp[ 1 ] ) );
1459
1460 brw_push_insn_state( p );
1461 brw_set_mask_control( p, BRW_MASK_DISABLE );
1462 brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 5 ) );
1463 brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 5 ) );
1464 brw_pop_insn_state( p );
1465
1466 brw_MUL( p, x1y0, x1y0, t );
1467 brw_MUL( p, x1y1, x1y1, t );
1468 brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
1469 brw_MUL( p, x0y0, x0y0, param0 );
1470 brw_MUL( p, x0y1, x0y1, param0 );
1471
1472 /* y component */
1473 brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
1474 brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
1475 brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
1476 brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
1477
1478 brw_push_insn_state( p );
1479 brw_set_mask_control( p, BRW_MASK_DISABLE );
1480 brw_SHL( p, wtmp[ 0 ], wtmp[ 0 ], brw_imm_uw( 5 ) );
1481 brw_SHL( p, wtmp[ 1 ], wtmp[ 1 ], brw_imm_uw( 5 ) );
1482 brw_pop_insn_state( p );
1483
1484 brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
1485 brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
1486 brw_ADD( p, t, param0, brw_imm_f( -1.0 ) );
1487 brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param1 );
1488 brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param1 );
1489
1490 brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
1491 brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
1492 brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
1493 brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
1494
1495 /* z component */
1496 brw_MOV( p, tmp[ 4 ], low_words( tmp[ 0 ] ) );
1497 brw_MOV( p, tmp[ 5 ], low_words( tmp[ 1 ] ) );
1498 brw_MOV( p, tmp[ 6 ], high_words( tmp[ 0 ] ) );
1499 brw_MOV( p, tmp[ 7 ], high_words( tmp[ 1 ] ) );
1500
1501 brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param2 );
1502 brw_MUL( p, tmp[ 5 ], tmp[ 5 ], param2 );
1503 brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param2 );
1504 brw_MUL( p, tmp[ 7 ], tmp[ 7 ], param2 );
1505
1506 brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
1507 brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
1508 brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
1509 brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
1510
1511 /* We interpolate between the gradients using the polynomial
1512 6t^5 - 15t^4 + 10t^3 (Perlin). */
1513 brw_MUL( p, xi, param0, brw_imm_f( 6.0 ) );
1514 brw_MUL( p, yi, param1, brw_imm_f( 6.0 ) );
1515 brw_MUL( p, zi, param2, brw_imm_f( 6.0 ) );
1516 brw_ADD( p, xi, xi, brw_imm_f( -15.0 ) );
1517 brw_ADD( p, yi, yi, brw_imm_f( -15.0 ) );
1518 brw_ADD( p, zi, zi, brw_imm_f( -15.0 ) );
1519 brw_MUL( p, xi, xi, param0 );
1520 brw_MUL( p, yi, yi, param1 );
1521 brw_MUL( p, zi, zi, param2 );
1522 brw_ADD( p, xi, xi, brw_imm_f( 10.0 ) );
1523 brw_ADD( p, yi, yi, brw_imm_f( 10.0 ) );
1524 brw_ADD( p, zi, zi, brw_imm_f( 10.0 ) );
1525 brw_ADD( p, x0y1, x0y1, negate( x0y0 ) ); /* unrelated work */
1526 brw_ADD( p, x1y1, x1y1, negate( x1y0 ) ); /* unrelated work */
1527 brw_MUL( p, xi, xi, param0 );
1528 brw_MUL( p, yi, yi, param1 );
1529 brw_MUL( p, zi, zi, param2 );
1530 brw_MUL( p, xi, xi, param0 );
1531 brw_MUL( p, yi, yi, param1 );
1532 brw_MUL( p, zi, zi, param2 );
1533 brw_MUL( p, xi, xi, param0 );
1534 brw_MUL( p, yi, yi, param1 );
1535 brw_MUL( p, zi, zi, param2 );
1536
1537 /* Here we interpolate in the y dimension... */
1538 brw_MUL( p, x0y1, x0y1, yi );
1539 brw_MUL( p, x1y1, x1y1, yi );
1540 brw_ADD( p, x0y0, x0y0, x0y1 );
1541 brw_ADD( p, x1y0, x1y0, x1y1 );
1542
1543 /* And now in x. Leave the result in tmp[ 0 ] (see below)... */
1544 brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
1545 brw_MUL( p, x1y0, x1y0, xi );
1546 brw_ADD( p, tmp[ 0 ], x0y0, x1y0 );
1547
1548 /* Now do the same thing for the front four gradients... */
1549 /* x component */
1550 brw_MOV( p, x0y0, low_words( tmp[ 2 ] ) );
1551 brw_MOV( p, x0y1, low_words( tmp[ 3 ] ) );
1552 brw_MOV( p, x1y0, high_words( tmp[ 2 ] ) );
1553 brw_MOV( p, x1y1, high_words( tmp[ 3 ] ) );
1554
1555 brw_push_insn_state( p );
1556 brw_set_mask_control( p, BRW_MASK_DISABLE );
1557 brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 5 ) );
1558 brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 5 ) );
1559 brw_pop_insn_state( p );
1560
1561 brw_MUL( p, x1y0, x1y0, t );
1562 brw_MUL( p, x1y1, x1y1, t );
1563 brw_ADD( p, t, param1, brw_imm_f( -1.0 ) );
1564 brw_MUL( p, x0y0, x0y0, param0 );
1565 brw_MUL( p, x0y1, x0y1, param0 );
1566
1567 /* y component */
1568 brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
1569 brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
1570 brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
1571 brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
1572
1573 brw_push_insn_state( p );
1574 brw_set_mask_control( p, BRW_MASK_DISABLE );
1575 brw_SHL( p, wtmp[ 2 ], wtmp[ 2 ], brw_imm_uw( 5 ) );
1576 brw_SHL( p, wtmp[ 3 ], wtmp[ 3 ], brw_imm_uw( 5 ) );
1577 brw_pop_insn_state( p );
1578
1579 brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
1580 brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
1581 brw_ADD( p, t, param2, brw_imm_f( -1.0 ) );
1582 brw_MUL( p, tmp[ 4 ], tmp[ 4 ], param1 );
1583 brw_MUL( p, tmp[ 6 ], tmp[ 6 ], param1 );
1584
1585 brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
1586 brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
1587 brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
1588 brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
1589
1590 /* z component */
1591 brw_MOV( p, tmp[ 4 ], low_words( tmp[ 2 ] ) );
1592 brw_MOV( p, tmp[ 5 ], low_words( tmp[ 3 ] ) );
1593 brw_MOV( p, tmp[ 6 ], high_words( tmp[ 2 ] ) );
1594 brw_MOV( p, tmp[ 7 ], high_words( tmp[ 3 ] ) );
1595
1596 brw_MUL( p, tmp[ 4 ], tmp[ 4 ], t );
1597 brw_MUL( p, tmp[ 5 ], tmp[ 5 ], t );
1598 brw_MUL( p, tmp[ 6 ], tmp[ 6 ], t );
1599 brw_MUL( p, tmp[ 7 ], tmp[ 7 ], t );
1600
1601 brw_ADD( p, x0y0, x0y0, tmp[ 4 ] );
1602 brw_ADD( p, x0y1, x0y1, tmp[ 5 ] );
1603 brw_ADD( p, x1y0, x1y0, tmp[ 6 ] );
1604 brw_ADD( p, x1y1, x1y1, tmp[ 7 ] );
1605
1606 /* The interpolation coefficients are still around from last time, so
1607 again interpolate in the y dimension... */
1608 brw_ADD( p, x0y1, x0y1, negate( x0y0 ) );
1609 brw_ADD( p, x1y1, x1y1, negate( x1y0 ) );
1610 brw_MUL( p, x0y1, x0y1, yi );
1611 brw_MUL( p, x1y1, x1y1, yi );
1612 brw_ADD( p, x0y0, x0y0, x0y1 );
1613 brw_ADD( p, x1y0, x1y0, x1y1 );
1614
1615 /* And now in x. The rear face is in tmp[ 0 ] (see above), so this
1616 time put the front face in tmp[ 1 ] and we're nearly there... */
1617 brw_ADD( p, x1y0, x1y0, negate( x0y0 ) );
1618 brw_MUL( p, x1y0, x1y0, xi );
1619 brw_ADD( p, tmp[ 1 ], x0y0, x1y0 );
1620
1621 /* The final interpolation, in the z dimension: */
1622 brw_ADD( p, tmp[ 1 ], tmp[ 1 ], negate( tmp[ 0 ] ) );
1623 brw_MUL( p, tmp[ 1 ], tmp[ 1 ], zi );
1624 brw_ADD( p, tmp[ 0 ], tmp[ 0 ], tmp[ 1 ] );
1625
1626 /* scale by pow( 2, -15 ), as described above */
1627 brw_MUL( p, param0, tmp[ 0 ], brw_imm_f( 0.000030517578125 ) );
1628
1629 release_tmps( c, mark );
1630 }
1631
1632 static void emit_noise3( struct brw_wm_compile *c,
1633 struct prog_instruction *inst )
1634 {
1635 struct brw_compile *p = &c->func;
1636 struct brw_reg src0, src1, src2, param0, param1, param2, dst;
1637 GLuint mask = inst->DstReg.WriteMask;
1638 int i;
1639 int mark = mark_tmps( c );
1640
1641 assert( mark == 0 );
1642
1643 src0 = get_src_reg( c, inst->SrcReg, 0, 1 );
1644 src1 = get_src_reg( c, inst->SrcReg, 1, 1 );
1645 src2 = get_src_reg( c, inst->SrcReg, 2, 1 );
1646
1647 param0 = alloc_tmp( c );
1648 param1 = alloc_tmp( c );
1649 param2 = alloc_tmp( c );
1650
1651 brw_MOV( p, param0, src0 );
1652 brw_MOV( p, param1, src1 );
1653 brw_MOV( p, param2, src2 );
1654
1655 invoke_subroutine( c, SUB_NOISE3, noise3_sub );
1656
1657 /* Fill in the result: */
1658 brw_set_saturate( p, inst->SaturateMode == SATURATE_ZERO_ONE );
1659 for (i = 0 ; i < 4; i++) {
1660 if (mask & (1<<i)) {
1661 dst = get_dst_reg(c, inst, i, 1);
1662 brw_MOV( p, dst, param0 );
1663 }
1664 }
1665 if( inst->SaturateMode == SATURATE_ZERO_ONE )
1666 brw_set_saturate( p, 0 );
1667
1668 release_tmps( c, mark );
1669 }
1670
1671 static void emit_wpos_xy(struct brw_wm_compile *c,
1672 struct prog_instruction *inst)
1673 {
1674 struct brw_compile *p = &c->func;
1675 GLuint mask = inst->DstReg.WriteMask;
1676 struct brw_reg src0[2], dst[2];
1677
1678 dst[0] = get_dst_reg(c, inst, 0, 1);
1679 dst[1] = get_dst_reg(c, inst, 1, 1);
1680
1681 src0[0] = get_src_reg(c, &inst->SrcReg[0], 0, 1);
1682 src0[1] = get_src_reg(c, &inst->SrcReg[0], 1, 1);
1683
1684 /* Calculate the pixel offset from window bottom left into destination
1685 * X and Y channels.
1686 */
1687 if (mask & WRITEMASK_X) {
1688 /* X' = X - origin_x */
1689 brw_ADD(p,
1690 dst[0],
1691 retype(src0[0], BRW_REGISTER_TYPE_W),
1692 brw_imm_d(0 - c->key.origin_x));
1693 }
1694
1695 if (mask & WRITEMASK_Y) {
1696 /* Y' = height - (Y - origin_y) = height + origin_y - Y */
1697 brw_ADD(p,
1698 dst[1],
1699 negate(retype(src0[1], BRW_REGISTER_TYPE_W)),
1700 brw_imm_d(c->key.origin_y + c->key.drawable_height - 1));
1701 }
1702 }
1703
1704 /* TODO
1705 BIAS on SIMD8 not workind yet...
1706 */
1707 static void emit_txb(struct brw_wm_compile *c,
1708 struct prog_instruction *inst)
1709 {
1710 struct brw_compile *p = &c->func;
1711 struct brw_reg dst[4], src[4], payload_reg;
1712 GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit];
1713
1714 GLuint i;
1715 payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0);
1716 for (i = 0; i < 4; i++)
1717 dst[i] = get_dst_reg(c, inst, i, 1);
1718 for (i = 0; i < 4; i++)
1719 src[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
1720
1721 switch (inst->TexSrcTarget) {
1722 case TEXTURE_1D_INDEX:
1723 brw_MOV(p, brw_message_reg(2), src[0]);
1724 brw_MOV(p, brw_message_reg(3), brw_imm_f(0));
1725 brw_MOV(p, brw_message_reg(4), brw_imm_f(0));
1726 break;
1727 case TEXTURE_2D_INDEX:
1728 case TEXTURE_RECT_INDEX:
1729 brw_MOV(p, brw_message_reg(2), src[0]);
1730 brw_MOV(p, brw_message_reg(3), src[1]);
1731 brw_MOV(p, brw_message_reg(4), brw_imm_f(0));
1732 break;
1733 default:
1734 brw_MOV(p, brw_message_reg(2), src[0]);
1735 brw_MOV(p, brw_message_reg(3), src[1]);
1736 brw_MOV(p, brw_message_reg(4), src[2]);
1737 break;
1738 }
1739 brw_MOV(p, brw_message_reg(5), src[3]);
1740 brw_MOV(p, brw_message_reg(6), brw_imm_f(0));
1741 brw_SAMPLE(p,
1742 retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW),
1743 1,
1744 retype(payload_reg, BRW_REGISTER_TYPE_UW),
1745 unit + MAX_DRAW_BUFFERS, /* surface */
1746 unit, /* sampler */
1747 inst->DstReg.WriteMask,
1748 BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS,
1749 4,
1750 4,
1751 0);
1752 }
1753
1754 static void emit_tex(struct brw_wm_compile *c,
1755 struct prog_instruction *inst)
1756 {
1757 struct brw_compile *p = &c->func;
1758 struct brw_reg dst[4], src[4], payload_reg;
1759 GLuint unit = c->fp->program.Base.SamplerUnits[inst->TexSrcUnit];
1760
1761 GLuint msg_len;
1762 GLuint i, nr;
1763 GLuint emit;
1764 GLboolean shadow = (c->key.shadowtex_mask & (1<<unit)) ? 1 : 0;
1765
1766 payload_reg = get_reg(c, PROGRAM_PAYLOAD, PAYLOAD_DEPTH, 0, 1, 0, 0);
1767
1768 for (i = 0; i < 4; i++)
1769 dst[i] = get_dst_reg(c, inst, i, 1);
1770 for (i = 0; i < 4; i++)
1771 src[i] = get_src_reg(c, &inst->SrcReg[0], i, 1);
1772
1773
1774 switch (inst->TexSrcTarget) {
1775 case TEXTURE_1D_INDEX:
1776 emit = WRITEMASK_X;
1777 nr = 1;
1778 break;
1779 case TEXTURE_2D_INDEX:
1780 case TEXTURE_RECT_INDEX:
1781 emit = WRITEMASK_XY;
1782 nr = 2;
1783 break;
1784 default:
1785 emit = WRITEMASK_XYZ;
1786 nr = 3;
1787 break;
1788 }
1789 msg_len = 1;
1790
1791 for (i = 0; i < nr; i++) {
1792 static const GLuint swz[4] = {0,1,2,2};
1793 if (emit & (1<<i))
1794 brw_MOV(p, brw_message_reg(msg_len+1), src[swz[i]]);
1795 else
1796 brw_MOV(p, brw_message_reg(msg_len+1), brw_imm_f(0));
1797 msg_len += 1;
1798 }
1799
1800 if (shadow) {
1801 brw_MOV(p, brw_message_reg(5), brw_imm_f(0));
1802 brw_MOV(p, brw_message_reg(6), src[2]);
1803 }
1804
1805 brw_SAMPLE(p,
1806 retype(vec8(dst[0]), BRW_REGISTER_TYPE_UW),
1807 1,
1808 retype(payload_reg, BRW_REGISTER_TYPE_UW),
1809 unit + MAX_DRAW_BUFFERS, /* surface */
1810 unit, /* sampler */
1811 inst->DstReg.WriteMask,
1812 BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE,
1813 4,
1814 shadow ? 6 : 4,
1815 0);
1816
1817 if (shadow)
1818 brw_MOV(p, dst[3], brw_imm_f(1.0));
1819 }
1820
1821 static void post_wm_emit( struct brw_wm_compile *c )
1822 {
1823 GLuint nr_insns = c->fp->program.Base.NumInstructions;
1824 GLuint insn, target_insn;
1825 struct prog_instruction *inst1, *inst2;
1826 struct brw_instruction *brw_inst1, *brw_inst2;
1827 int offset;
1828 for (insn = 0; insn < nr_insns; insn++) {
1829 inst1 = &c->fp->program.Base.Instructions[insn];
1830 brw_inst1 = inst1->Data;
1831 switch (inst1->Opcode) {
1832 case OPCODE_CAL:
1833 target_insn = inst1->BranchTarget;
1834 inst2 = &c->fp->program.Base.Instructions[target_insn];
1835 brw_inst2 = inst2->Data;
1836 offset = brw_inst2 - brw_inst1;
1837 brw_set_src1(brw_inst1, brw_imm_d(offset*16));
1838 break;
1839 default:
1840 break;
1841 }
1842 }
1843 }
1844
1845 static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
1846 {
1847 #define MAX_IFSN 32
1848 #define MAX_LOOP_DEPTH 32
1849 struct brw_instruction *if_inst[MAX_IFSN], *loop_inst[MAX_LOOP_DEPTH];
1850 struct brw_instruction *inst0, *inst1;
1851 int i, if_insn = 0, loop_insn = 0;
1852 struct brw_compile *p = &c->func;
1853 struct brw_indirect stack_index = brw_indirect(0, 0);
1854
1855 c->reg_index = 0;
1856 prealloc_reg(c);
1857 brw_set_compression_control(p, BRW_COMPRESSION_NONE);
1858 brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack));
1859
1860 for (i = 0; i < c->nr_fp_insns; i++) {
1861 struct prog_instruction *inst = &c->prog_instructions[i];
1862 struct prog_instruction *orig_inst;
1863
1864 if ((orig_inst = inst->Data) != 0)
1865 orig_inst->Data = current_insn(p);
1866
1867 if (inst->CondUpdate)
1868 brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ);
1869 else
1870 brw_set_conditionalmod(p, BRW_CONDITIONAL_NONE);
1871
1872 switch (inst->Opcode) {
1873 case WM_PIXELXY:
1874 emit_pixel_xy(c, inst);
1875 break;
1876 case WM_DELTAXY:
1877 emit_delta_xy(c, inst);
1878 break;
1879 case WM_PIXELW:
1880 emit_pixel_w(c, inst);
1881 break;
1882 case WM_LINTERP:
1883 emit_linterp(c, inst);
1884 break;
1885 case WM_PINTERP:
1886 emit_pinterp(c, inst);
1887 break;
1888 case WM_CINTERP:
1889 emit_cinterp(c, inst);
1890 break;
1891 case WM_WPOSXY:
1892 emit_wpos_xy(c, inst);
1893 break;
1894 case WM_FB_WRITE:
1895 emit_fb_write(c, inst);
1896 break;
1897 case OPCODE_ABS:
1898 emit_abs(c, inst);
1899 break;
1900 case OPCODE_ADD:
1901 emit_add(c, inst);
1902 break;
1903 case OPCODE_SUB:
1904 emit_sub(c, inst);
1905 break;
1906 case OPCODE_FRC:
1907 emit_frc(c, inst);
1908 break;
1909 case OPCODE_FLR:
1910 emit_flr(c, inst);
1911 break;
1912 case OPCODE_LRP:
1913 emit_lrp(c, inst);
1914 break;
1915 case OPCODE_TRUNC:
1916 emit_trunc(c, inst);
1917 break;
1918 case OPCODE_MOV:
1919 emit_mov(c, inst);
1920 break;
1921 case OPCODE_DP3:
1922 emit_dp3(c, inst);
1923 break;
1924 case OPCODE_DP4:
1925 emit_dp4(c, inst);
1926 break;
1927 case OPCODE_XPD:
1928 emit_xpd(c, inst);
1929 break;
1930 case OPCODE_DPH:
1931 emit_dph(c, inst);
1932 break;
1933 case OPCODE_RCP:
1934 emit_rcp(c, inst);
1935 break;
1936 case OPCODE_RSQ:
1937 emit_rsq(c, inst);
1938 break;
1939 case OPCODE_SIN:
1940 emit_sin(c, inst);
1941 break;
1942 case OPCODE_COS:
1943 emit_cos(c, inst);
1944 break;
1945 case OPCODE_EX2:
1946 emit_ex2(c, inst);
1947 break;
1948 case OPCODE_LG2:
1949 emit_lg2(c, inst);
1950 break;
1951 case OPCODE_MAX:
1952 emit_max(c, inst);
1953 break;
1954 case OPCODE_MIN:
1955 emit_min(c, inst);
1956 break;
1957 case OPCODE_DDX:
1958 emit_ddx(c, inst);
1959 break;
1960 case OPCODE_DDY:
1961 emit_ddy(c, inst);
1962 break;
1963 case OPCODE_SLT:
1964 emit_slt(c, inst);
1965 break;
1966 case OPCODE_SLE:
1967 emit_sle(c, inst);
1968 break;
1969 case OPCODE_SGT:
1970 emit_sgt(c, inst);
1971 break;
1972 case OPCODE_SGE:
1973 emit_sge(c, inst);
1974 break;
1975 case OPCODE_SEQ:
1976 emit_seq(c, inst);
1977 break;
1978 case OPCODE_SNE:
1979 emit_sne(c, inst);
1980 break;
1981 case OPCODE_MUL:
1982 emit_mul(c, inst);
1983 break;
1984 case OPCODE_POW:
1985 emit_pow(c, inst);
1986 break;
1987 case OPCODE_MAD:
1988 emit_mad(c, inst);
1989 break;
1990 case OPCODE_NOISE1:
1991 emit_noise1(c, inst);
1992 break;
1993 case OPCODE_NOISE2:
1994 emit_noise2(c, inst);
1995 break;
1996 case OPCODE_NOISE3:
1997 emit_noise3(c, inst);
1998 break;
1999 /* case OPCODE_NOISE4: */
2000 /* not yet implemented */
2001 case OPCODE_TEX:
2002 emit_tex(c, inst);
2003 break;
2004 case OPCODE_TXB:
2005 emit_txb(c, inst);
2006 break;
2007 case OPCODE_KIL_NV:
2008 emit_kil(c);
2009 break;
2010 case OPCODE_IF:
2011 assert(if_insn < MAX_IFSN);
2012 if_inst[if_insn++] = brw_IF(p, BRW_EXECUTE_8);
2013 break;
2014 case OPCODE_ELSE:
2015 if_inst[if_insn-1] = brw_ELSE(p, if_inst[if_insn-1]);
2016 break;
2017 case OPCODE_ENDIF:
2018 assert(if_insn > 0);
2019 brw_ENDIF(p, if_inst[--if_insn]);
2020 break;
2021 case OPCODE_BGNSUB:
2022 case OPCODE_ENDSUB:
2023 break;
2024 case OPCODE_CAL:
2025 brw_push_insn_state(p);
2026 brw_set_mask_control(p, BRW_MASK_DISABLE);
2027 brw_set_access_mode(p, BRW_ALIGN_1);
2028 brw_ADD(p, deref_1ud(stack_index, 0), brw_ip_reg(), brw_imm_d(3*16));
2029 brw_set_access_mode(p, BRW_ALIGN_16);
2030 brw_ADD(p, get_addr_reg(stack_index),
2031 get_addr_reg(stack_index), brw_imm_d(4));
2032 orig_inst = inst->Data;
2033 orig_inst->Data = &p->store[p->nr_insn];
2034 brw_ADD(p, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
2035 brw_pop_insn_state(p);
2036 break;
2037
2038 case OPCODE_RET:
2039 brw_push_insn_state(p);
2040 brw_set_mask_control(p, BRW_MASK_DISABLE);
2041 brw_ADD(p, get_addr_reg(stack_index),
2042 get_addr_reg(stack_index), brw_imm_d(-4));
2043 brw_set_access_mode(p, BRW_ALIGN_1);
2044 brw_MOV(p, brw_ip_reg(), deref_1ud(stack_index, 0));
2045 brw_set_access_mode(p, BRW_ALIGN_16);
2046 brw_pop_insn_state(p);
2047
2048 break;
2049 case OPCODE_BGNLOOP:
2050 loop_inst[loop_insn++] = brw_DO(p, BRW_EXECUTE_8);
2051 break;
2052 case OPCODE_BRK:
2053 brw_BREAK(p);
2054 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
2055 break;
2056 case OPCODE_CONT:
2057 brw_CONT(p);
2058 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
2059 break;
2060 case OPCODE_ENDLOOP:
2061 loop_insn--;
2062 inst0 = inst1 = brw_WHILE(p, loop_inst[loop_insn]);
2063 /* patch all the BREAK instructions from
2064 last BEGINLOOP */
2065 while (inst0 > loop_inst[loop_insn]) {
2066 inst0--;
2067 if (inst0->header.opcode == BRW_OPCODE_BREAK) {
2068 inst0->bits3.if_else.jump_count = inst1 - inst0 + 1;
2069 inst0->bits3.if_else.pop_count = 0;
2070 } else if (inst0->header.opcode == BRW_OPCODE_CONTINUE) {
2071 inst0->bits3.if_else.jump_count = inst1 - inst0;
2072 inst0->bits3.if_else.pop_count = 0;
2073 }
2074 }
2075 break;
2076 default:
2077 _mesa_printf("unsupported IR in fragment shader %d\n",
2078 inst->Opcode);
2079 }
2080 if (inst->CondUpdate)
2081 brw_set_predicate_control(p, BRW_PREDICATE_NORMAL);
2082 else
2083 brw_set_predicate_control(p, BRW_PREDICATE_NONE);
2084 }
2085 post_wm_emit(c);
2086 for (i = 0; i < c->fp->program.Base.NumInstructions; i++)
2087 c->fp->program.Base.Instructions[i].Data = NULL;
2088 }
2089
2090 void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
2091 {
2092 brw_wm_pass_fp(c);
2093 brw_wm_emit_glsl(brw, c);
2094 c->prog_data.total_grf = c->reg_index;
2095 c->prog_data.total_scratch = 0;
2096 }