2 #include "shader/prog_parameter.h"
3 #include "brw_context.h"
7 /* Only guess, need a flag in gl_fragment_program later */
8 GLboolean
brw_wm_is_glsl(const struct gl_fragment_program
*fp
)
11 for (i
= 0; i
< fp
->Base
.NumInstructions
; i
++) {
12 struct prog_instruction
*inst
= &fp
->Base
.Instructions
[i
];
13 switch (inst
->Opcode
) {
31 static void set_reg(struct brw_wm_compile
*c
, int file
, int index
,
32 int component
, struct brw_reg reg
)
34 c
->wm_regs
[file
][index
][component
].reg
= reg
;
35 c
->wm_regs
[file
][index
][component
].inited
= GL_TRUE
;
38 static int get_scalar_dst_index(struct prog_instruction
*inst
)
41 for (i
= 0; i
< 4; i
++)
42 if (inst
->DstReg
.WriteMask
& (1<<i
))
47 static struct brw_reg
alloc_tmp(struct brw_wm_compile
*c
)
50 reg
= brw_vec8_grf(c
->tmp_index
--, 0);
54 static void release_tmps(struct brw_wm_compile
*c
)
60 get_reg(struct brw_wm_compile
*c
, int file
, int index
, int component
, int nr
, GLuint neg
, GLuint abs
)
64 case PROGRAM_STATE_VAR
:
65 case PROGRAM_CONSTANT
:
67 file
= PROGRAM_STATE_VAR
;
69 case PROGRAM_UNDEFINED
:
70 return brw_null_reg();
75 if(c
->wm_regs
[file
][index
][component
].inited
)
76 reg
= c
->wm_regs
[file
][index
][component
].reg
;
78 reg
= brw_vec8_grf(c
->reg_index
, 0);
80 if(!c
->wm_regs
[file
][index
][component
].inited
) {
81 set_reg(c
, file
, index
, component
, reg
);
85 if (neg
& (1<< component
)) {
93 static void prealloc_reg(struct brw_wm_compile
*c
)
97 int nr_interp_regs
= 0;
98 GLuint inputs
= FRAG_BIT_WPOS
| c
->fp_interp_emitted
| c
->fp_deriv_emitted
;
100 for (i
= 0; i
< 4; i
++) {
101 reg
= (i
< c
->key
.nr_depth_regs
)
102 ? brw_vec8_grf(i
*2, 0) : brw_vec8_grf(0, 0);
103 set_reg(c
, PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
, i
, reg
);
105 c
->reg_index
+= 2*c
->key
.nr_depth_regs
;
107 int nr_params
= c
->fp
->program
.Base
.Parameters
->NumParameters
;
108 struct gl_program_parameter_list
*plist
=
109 c
->fp
->program
.Base
.Parameters
;
111 c
->prog_data
.nr_params
= 4*nr_params
;
112 for (i
= 0; i
< nr_params
; i
++) {
113 for (j
= 0; j
< 4; j
++, index
++) {
114 reg
= brw_vec1_grf(c
->reg_index
+ index
/8,
116 c
->prog_data
.param
[index
] =
117 &plist
->ParameterValues
[i
][j
];
118 set_reg(c
, PROGRAM_STATE_VAR
, i
, j
, reg
);
121 c
->nr_creg
= 2*((4*nr_params
+15)/16);
122 c
->reg_index
+= c
->nr_creg
;
124 for (i
= 0; i
< FRAG_ATTRIB_MAX
; i
++) {
125 if (inputs
& (1<<i
)) {
127 reg
= brw_vec8_grf(c
->reg_index
, 0);
128 for (j
= 0; j
< 4; j
++)
129 set_reg(c
, PROGRAM_PAYLOAD
, i
, j
, reg
);
134 c
->prog_data
.first_curbe_grf
= c
->key
.nr_depth_regs
* 2;
135 c
->prog_data
.urb_read_length
= nr_interp_regs
* 2;
136 c
->prog_data
.curb_read_length
= c
->nr_creg
;
137 c
->emit_mask_reg
= brw_uw1_reg(BRW_GENERAL_REGISTER_FILE
, c
->reg_index
, 0);
139 c
->stack
= brw_uw16_reg(BRW_GENERAL_REGISTER_FILE
, c
->reg_index
, 0);
143 static struct brw_reg
get_dst_reg(struct brw_wm_compile
*c
,
144 struct prog_instruction
*inst
, int component
, int nr
)
146 return get_reg(c
, inst
->DstReg
.File
, inst
->DstReg
.Index
, component
, nr
,
150 static struct brw_reg
get_src_reg(struct brw_wm_compile
*c
,
151 struct prog_src_register
*src
, int index
, int nr
)
153 int component
= GET_SWZ(src
->Swizzle
, index
);
154 return get_reg(c
, src
->File
, src
->Index
, component
, nr
,
155 src
->NegateBase
, src
->Abs
);
158 static void emit_abs( struct brw_wm_compile
*c
,
159 struct prog_instruction
*inst
)
162 struct brw_compile
*p
= &c
->func
;
163 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
164 for (i
= 0; i
< 4; i
++) {
165 if (inst
->DstReg
.WriteMask
& (1<<i
)) {
166 struct brw_reg src
, dst
;
167 dst
= get_dst_reg(c
, inst
, i
, 1);
168 src
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
169 brw_MOV(p
, dst
, brw_abs(src
));
172 brw_set_saturate(p
, 0);
175 static void emit_int( struct brw_wm_compile
*c
,
176 struct prog_instruction
*inst
)
179 struct brw_compile
*p
= &c
->func
;
180 GLuint mask
= inst
->DstReg
.WriteMask
;
181 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
182 for (i
= 0; i
< 4; i
++) {
184 struct brw_reg src
, dst
;
185 dst
= get_dst_reg(c
, inst
, i
, 1) ;
186 src
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
187 brw_RNDD(p
, dst
, src
);
190 brw_set_saturate(p
, 0);
193 static void emit_mov( struct brw_wm_compile
*c
,
194 struct prog_instruction
*inst
)
197 struct brw_compile
*p
= &c
->func
;
198 GLuint mask
= inst
->DstReg
.WriteMask
;
199 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
200 for (i
= 0; i
< 4; i
++) {
202 struct brw_reg src
, dst
;
203 dst
= get_dst_reg(c
, inst
, i
, 1);
204 src
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
205 brw_MOV(p
, dst
, src
);
208 brw_set_saturate(p
, 0);
211 static void emit_pixel_xy(struct brw_wm_compile
*c
,
212 struct prog_instruction
*inst
)
214 struct brw_reg r1
= brw_vec1_grf(1, 0);
215 struct brw_reg r1_uw
= retype(r1
, BRW_REGISTER_TYPE_UW
);
217 struct brw_reg dst0
, dst1
;
218 struct brw_compile
*p
= &c
->func
;
219 GLuint mask
= inst
->DstReg
.WriteMask
;
221 dst0
= get_dst_reg(c
, inst
, 0, 1);
222 dst1
= get_dst_reg(c
, inst
, 1, 1);
223 /* Calculate pixel centers by adding 1 or 0 to each of the
224 * micro-tile coordinates passed in r1.
226 if (mask
& WRITEMASK_X
) {
228 vec8(retype(dst0
, BRW_REGISTER_TYPE_UW
)),
229 stride(suboffset(r1_uw
, 4), 2, 4, 0),
230 brw_imm_v(0x10101010));
233 if (mask
& WRITEMASK_Y
) {
235 vec8(retype(dst1
, BRW_REGISTER_TYPE_UW
)),
236 stride(suboffset(r1_uw
, 5), 2, 4, 0),
237 brw_imm_v(0x11001100));
242 static void emit_delta_xy(struct brw_wm_compile
*c
,
243 struct prog_instruction
*inst
)
245 struct brw_reg r1
= brw_vec1_grf(1, 0);
246 struct brw_reg dst0
, dst1
, src0
, src1
;
247 struct brw_compile
*p
= &c
->func
;
248 GLuint mask
= inst
->DstReg
.WriteMask
;
250 dst0
= get_dst_reg(c
, inst
, 0, 1);
251 dst1
= get_dst_reg(c
, inst
, 1, 1);
252 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
253 src1
= get_src_reg(c
, &inst
->SrcReg
[0], 1, 1);
254 /* Calc delta X,Y by subtracting origin in r1 from the pixel
257 if (mask
& WRITEMASK_X
) {
260 retype(src0
, BRW_REGISTER_TYPE_UW
),
264 if (mask
& WRITEMASK_Y
) {
267 retype(src1
, BRW_REGISTER_TYPE_UW
),
268 negate(suboffset(r1
,1)));
275 static void fire_fb_write( struct brw_wm_compile
*c
,
281 struct brw_compile
*p
= &c
->func
;
282 /* Pass through control information:
284 /* mov (8) m1.0<1>:ud r1.0<8;8,1>:ud { Align1 NoMask } */
286 brw_push_insn_state(p
);
287 brw_set_mask_control(p
, BRW_MASK_DISABLE
); /* ? */
289 brw_message_reg(base_reg
+ 1),
291 brw_pop_insn_state(p
);
293 /* Send framebuffer write message: */
295 retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW
),
297 retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW
),
304 static void emit_fb_write(struct brw_wm_compile
*c
,
305 struct prog_instruction
*inst
)
307 struct brw_compile
*p
= &c
->func
;
313 /* Reserve a space for AA - may not be needed:
315 if (c
->key
.aa_dest_stencil_reg
)
318 brw_push_insn_state(p
);
319 for (channel
= 0; channel
< 4; channel
++) {
320 src0
= get_src_reg(c
, &inst
->SrcReg
[0], channel
, 1);
321 /* mov (8) m2.0<1>:ud r28.0<8;8,1>:ud { Align1 } */
322 /* mov (8) m6.0<1>:ud r29.0<8;8,1>:ud { Align1 SecHalf } */
323 brw_MOV(p
, brw_message_reg(nr
+ channel
), src0
);
325 /* skip over the regs populated above: */
327 brw_pop_insn_state(p
);
330 if (c
->key
.source_depth_to_render_target
)
332 if (c
->key
.computes_depth
) {
333 src0
= get_src_reg(c
, &inst
->SrcReg
[2], 2, 1);
334 brw_MOV(p
, brw_message_reg(nr
), src0
);
336 src0
= get_src_reg(c
, &inst
->SrcReg
[1], 1, 1);
337 brw_MOV(p
, brw_message_reg(nr
), src0
);
342 target
= inst
->Sampler
>> 1;
343 eot
= inst
->Sampler
& 1;
344 fire_fb_write(c
, 0, nr
, target
, eot
);
347 static void emit_pixel_w( struct brw_wm_compile
*c
,
348 struct prog_instruction
*inst
)
350 struct brw_compile
*p
= &c
->func
;
351 GLuint mask
= inst
->DstReg
.WriteMask
;
352 if (mask
& WRITEMASK_W
) {
353 struct brw_reg dst
, src0
, delta0
, delta1
;
354 struct brw_reg interp3
;
356 dst
= get_dst_reg(c
, inst
, 3, 1);
357 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
358 delta0
= get_src_reg(c
, &inst
->SrcReg
[1], 0, 1);
359 delta1
= get_src_reg(c
, &inst
->SrcReg
[1], 1, 1);
361 interp3
= brw_vec1_grf(src0
.nr
+1, 4);
362 /* Calc 1/w - just linterp wpos[3] optimized by putting the
363 * result straight into a message reg.
365 brw_LINE(p
, brw_null_reg(), interp3
, delta0
);
366 brw_MAC(p
, brw_message_reg(2), suboffset(interp3
, 1), delta1
);
370 BRW_MATH_FUNCTION_INV
,
371 BRW_MATH_SATURATE_NONE
,
373 BRW_MATH_PRECISION_FULL
);
377 static void emit_linterp(struct brw_wm_compile
*c
,
378 struct prog_instruction
*inst
)
380 struct brw_compile
*p
= &c
->func
;
381 GLuint mask
= inst
->DstReg
.WriteMask
;
382 struct brw_reg interp
[4];
383 struct brw_reg dst
, delta0
, delta1
;
386 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
387 delta0
= get_src_reg(c
, &inst
->SrcReg
[1], 0, 1);
388 delta1
= get_src_reg(c
, &inst
->SrcReg
[1], 1, 1);
392 interp
[0] = brw_vec1_grf(nr
, 0);
393 interp
[1] = brw_vec1_grf(nr
, 4);
394 interp
[2] = brw_vec1_grf(nr
+1, 0);
395 interp
[3] = brw_vec1_grf(nr
+1, 4);
397 for(i
= 0; i
< 4; i
++ ) {
399 dst
= get_dst_reg(c
, inst
, i
, 1);
400 brw_LINE(p
, brw_null_reg(), interp
[i
], delta0
);
401 brw_MAC(p
, dst
, suboffset(interp
[i
],1), delta1
);
406 static void emit_cinterp(struct brw_wm_compile
*c
,
407 struct prog_instruction
*inst
)
409 struct brw_compile
*p
= &c
->func
;
410 GLuint mask
= inst
->DstReg
.WriteMask
;
412 struct brw_reg interp
[4];
413 struct brw_reg dst
, src0
;
415 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
419 interp
[0] = brw_vec1_grf(nr
, 0);
420 interp
[1] = brw_vec1_grf(nr
, 4);
421 interp
[2] = brw_vec1_grf(nr
+1, 0);
422 interp
[3] = brw_vec1_grf(nr
+1, 4);
424 for(i
= 0; i
< 4; i
++ ) {
426 dst
= get_dst_reg(c
, inst
, i
, 1);
427 brw_MOV(p
, dst
, suboffset(interp
[i
],3));
432 static void emit_pinterp(struct brw_wm_compile
*c
,
433 struct prog_instruction
*inst
)
435 struct brw_compile
*p
= &c
->func
;
436 GLuint mask
= inst
->DstReg
.WriteMask
;
438 struct brw_reg interp
[4];
439 struct brw_reg dst
, delta0
, delta1
;
440 struct brw_reg src0
, w
;
442 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
443 delta0
= get_src_reg(c
, &inst
->SrcReg
[1], 0, 1);
444 delta1
= get_src_reg(c
, &inst
->SrcReg
[1], 1, 1);
445 w
= get_src_reg(c
, &inst
->SrcReg
[2], 3, 1);
449 interp
[0] = brw_vec1_grf(nr
, 0);
450 interp
[1] = brw_vec1_grf(nr
, 4);
451 interp
[2] = brw_vec1_grf(nr
+1, 0);
452 interp
[3] = brw_vec1_grf(nr
+1, 4);
454 for(i
= 0; i
< 4; i
++ ) {
456 dst
= get_dst_reg(c
, inst
, i
, 1);
457 brw_LINE(p
, brw_null_reg(), interp
[i
], delta0
);
458 brw_MAC(p
, dst
, suboffset(interp
[i
],1),
460 brw_MUL(p
, dst
, dst
, w
);
465 static void emit_xpd(struct brw_wm_compile
*c
,
466 struct prog_instruction
*inst
)
469 struct brw_compile
*p
= &c
->func
;
470 GLuint mask
= inst
->DstReg
.WriteMask
;
471 for (i
= 0; i
< 4; i
++) {
475 struct brw_reg src0
, src1
, dst
;
476 dst
= get_dst_reg(c
, inst
, i
, 1);
477 src0
= negate(get_src_reg(c
, &inst
->SrcReg
[0], i2
, 1));
478 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i1
, 1);
479 brw_MUL(p
, brw_null_reg(), src0
, src1
);
480 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i1
, 1);
481 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i2
, 1);
482 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
483 brw_MAC(p
, dst
, src0
, src1
);
484 brw_set_saturate(p
, 0);
487 brw_set_saturate(p
, 0);
490 static void emit_dp3(struct brw_wm_compile
*c
,
491 struct prog_instruction
*inst
)
493 struct brw_reg src0
[3], src1
[3], dst
;
495 struct brw_compile
*p
= &c
->func
;
496 for (i
= 0; i
< 3; i
++) {
497 src0
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
498 src1
[i
] = get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
501 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
502 brw_MUL(p
, brw_null_reg(), src0
[0], src1
[0]);
503 brw_MAC(p
, brw_null_reg(), src0
[1], src1
[1]);
504 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
505 brw_MAC(p
, dst
, src0
[2], src1
[2]);
506 brw_set_saturate(p
, 0);
509 static void emit_dp4(struct brw_wm_compile
*c
,
510 struct prog_instruction
*inst
)
512 struct brw_reg src0
[4], src1
[4], dst
;
514 struct brw_compile
*p
= &c
->func
;
515 for (i
= 0; i
< 4; i
++) {
516 src0
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
517 src1
[i
] = get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
519 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
520 brw_MUL(p
, brw_null_reg(), src0
[0], src1
[0]);
521 brw_MAC(p
, brw_null_reg(), src0
[1], src1
[1]);
522 brw_MAC(p
, brw_null_reg(), src0
[2], src1
[2]);
523 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
524 brw_MAC(p
, dst
, src0
[3], src1
[3]);
525 brw_set_saturate(p
, 0);
528 static void emit_dph(struct brw_wm_compile
*c
,
529 struct prog_instruction
*inst
)
531 struct brw_reg src0
[4], src1
[4], dst
;
533 struct brw_compile
*p
= &c
->func
;
534 for (i
= 0; i
< 4; i
++) {
535 src0
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
536 src1
[i
] = get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
538 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
539 brw_MUL(p
, brw_null_reg(), src0
[0], src1
[0]);
540 brw_MAC(p
, brw_null_reg(), src0
[1], src1
[1]);
541 brw_MAC(p
, dst
, src0
[2], src1
[2]);
542 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
543 brw_ADD(p
, dst
, src0
[3], src1
[3]);
544 brw_set_saturate(p
, 0);
547 static void emit_math1(struct brw_wm_compile
*c
,
548 struct prog_instruction
*inst
, GLuint func
)
550 struct brw_compile
*p
= &c
->func
;
551 struct brw_reg src0
, dst
;
553 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
554 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
555 brw_MOV(p
, brw_message_reg(2), src0
);
559 (inst
->SaturateMode
!= SATURATE_OFF
) ? BRW_MATH_SATURATE_SATURATE
: BRW_MATH_SATURATE_NONE
,
562 BRW_MATH_DATA_VECTOR
,
563 BRW_MATH_PRECISION_FULL
);
566 static void emit_rcp(struct brw_wm_compile
*c
,
567 struct prog_instruction
*inst
)
569 emit_math1(c
, inst
, BRW_MATH_FUNCTION_INV
);
572 static void emit_rsq(struct brw_wm_compile
*c
,
573 struct prog_instruction
*inst
)
575 emit_math1(c
, inst
, BRW_MATH_FUNCTION_RSQ
);
578 static void emit_sin(struct brw_wm_compile
*c
,
579 struct prog_instruction
*inst
)
581 emit_math1(c
, inst
, BRW_MATH_FUNCTION_SIN
);
584 static void emit_cos(struct brw_wm_compile
*c
,
585 struct prog_instruction
*inst
)
587 emit_math1(c
, inst
, BRW_MATH_FUNCTION_COS
);
590 static void emit_ex2(struct brw_wm_compile
*c
,
591 struct prog_instruction
*inst
)
593 emit_math1(c
, inst
, BRW_MATH_FUNCTION_EXP
);
596 static void emit_lg2(struct brw_wm_compile
*c
,
597 struct prog_instruction
*inst
)
599 emit_math1(c
, inst
, BRW_MATH_FUNCTION_LOG
);
602 static void emit_add(struct brw_wm_compile
*c
,
603 struct prog_instruction
*inst
)
605 struct brw_compile
*p
= &c
->func
;
606 struct brw_reg src0
, src1
, dst
;
607 GLuint mask
= inst
->DstReg
.WriteMask
;
609 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
610 for (i
= 0 ; i
< 4; i
++) {
612 dst
= get_dst_reg(c
, inst
, i
, 1);
613 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
614 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
615 brw_ADD(p
, dst
, src0
, src1
);
618 brw_set_saturate(p
, 0);
621 static void emit_sub(struct brw_wm_compile
*c
,
622 struct prog_instruction
*inst
)
624 struct brw_compile
*p
= &c
->func
;
625 struct brw_reg src0
, src1
, dst
;
626 GLuint mask
= inst
->DstReg
.WriteMask
;
628 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
629 for (i
= 0 ; i
< 4; i
++) {
631 dst
= get_dst_reg(c
, inst
, i
, 1);
632 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
633 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
634 brw_ADD(p
, dst
, src0
, negate(src1
));
637 brw_set_saturate(p
, 0);
640 static void emit_mul(struct brw_wm_compile
*c
,
641 struct prog_instruction
*inst
)
643 struct brw_compile
*p
= &c
->func
;
644 struct brw_reg src0
, src1
, dst
;
645 GLuint mask
= inst
->DstReg
.WriteMask
;
647 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
648 for (i
= 0 ; i
< 4; i
++) {
650 dst
= get_dst_reg(c
, inst
, i
, 1);
651 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
652 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
653 brw_MUL(p
, dst
, src0
, src1
);
656 brw_set_saturate(p
, 0);
659 static void emit_frc(struct brw_wm_compile
*c
,
660 struct prog_instruction
*inst
)
662 struct brw_compile
*p
= &c
->func
;
663 struct brw_reg src0
, dst
;
664 GLuint mask
= inst
->DstReg
.WriteMask
;
666 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
667 for (i
= 0 ; i
< 4; i
++) {
669 dst
= get_dst_reg(c
, inst
, i
, 1);
670 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
671 brw_FRC(p
, dst
, src0
);
674 if (inst
->SaturateMode
!= SATURATE_OFF
)
675 brw_set_saturate(p
, 0);
678 static void emit_flr(struct brw_wm_compile
*c
,
679 struct prog_instruction
*inst
)
681 struct brw_compile
*p
= &c
->func
;
682 struct brw_reg src0
, dst
;
683 GLuint mask
= inst
->DstReg
.WriteMask
;
685 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
686 for (i
= 0 ; i
< 4; i
++) {
688 dst
= get_dst_reg(c
, inst
, i
, 1);
689 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
690 brw_RNDD(p
, dst
, src0
);
693 brw_set_saturate(p
, 0);
696 static void emit_max(struct brw_wm_compile
*c
,
697 struct prog_instruction
*inst
)
699 struct brw_compile
*p
= &c
->func
;
700 GLuint mask
= inst
->DstReg
.WriteMask
;
701 struct brw_reg src0
, src1
, dst
;
703 brw_push_insn_state(p
);
704 for (i
= 0; i
< 4; i
++) {
706 dst
= get_dst_reg(c
, inst
, i
, 1);
707 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
708 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
709 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
710 brw_MOV(p
, dst
, src0
);
711 brw_set_saturate(p
, 0);
713 brw_CMP(p
, brw_null_reg(), BRW_CONDITIONAL_L
, src0
, src1
);
714 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
715 brw_set_predicate_control(p
, BRW_PREDICATE_NORMAL
);
716 brw_MOV(p
, dst
, src1
);
717 brw_set_saturate(p
, 0);
718 brw_set_predicate_control_flag_value(p
, 0xff);
721 brw_pop_insn_state(p
);
724 static void emit_min(struct brw_wm_compile
*c
,
725 struct prog_instruction
*inst
)
727 struct brw_compile
*p
= &c
->func
;
728 GLuint mask
= inst
->DstReg
.WriteMask
;
729 struct brw_reg src0
, src1
, dst
;
731 brw_push_insn_state(p
);
732 for (i
= 0; i
< 4; i
++) {
734 dst
= get_dst_reg(c
, inst
, i
, 1);
735 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
736 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
737 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
738 brw_MOV(p
, dst
, src0
);
739 brw_set_saturate(p
, 0);
741 brw_CMP(p
, brw_null_reg(), BRW_CONDITIONAL_L
, src1
, src0
);
742 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
743 brw_set_predicate_control(p
, BRW_PREDICATE_NORMAL
);
744 brw_MOV(p
, dst
, src1
);
745 brw_set_saturate(p
, 0);
746 brw_set_predicate_control_flag_value(p
, 0xff);
749 brw_pop_insn_state(p
);
752 static void emit_pow(struct brw_wm_compile
*c
,
753 struct prog_instruction
*inst
)
755 struct brw_compile
*p
= &c
->func
;
756 struct brw_reg dst
, src0
, src1
;
757 dst
= get_dst_reg(c
, inst
, get_scalar_dst_index(inst
), 1);
758 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
759 src1
= get_src_reg(c
, &inst
->SrcReg
[1], 0, 1);
761 brw_MOV(p
, brw_message_reg(2), src0
);
762 brw_MOV(p
, brw_message_reg(3), src1
);
766 BRW_MATH_FUNCTION_POW
,
767 (inst
->SaturateMode
!= SATURATE_OFF
) ? BRW_MATH_SATURATE_SATURATE
: BRW_MATH_SATURATE_NONE
,
770 BRW_MATH_DATA_VECTOR
,
771 BRW_MATH_PRECISION_FULL
);
774 static void emit_lrp(struct brw_wm_compile
*c
,
775 struct prog_instruction
*inst
)
777 struct brw_compile
*p
= &c
->func
;
778 GLuint mask
= inst
->DstReg
.WriteMask
;
779 struct brw_reg dst
, tmp1
, tmp2
, src0
, src1
, src2
;
781 for (i
= 0; i
< 4; i
++) {
783 dst
= get_dst_reg(c
, inst
, i
, 1);
784 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
786 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
788 if (src1
.nr
== dst
.nr
) {
790 brw_MOV(p
, tmp1
, src1
);
794 src2
= get_src_reg(c
, &inst
->SrcReg
[2], i
, 1);
795 if (src2
.nr
== dst
.nr
) {
797 brw_MOV(p
, tmp2
, src2
);
801 brw_ADD(p
, dst
, negate(src0
), brw_imm_f(1.0));
802 brw_MUL(p
, brw_null_reg(), dst
, tmp2
);
803 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
804 brw_MAC(p
, dst
, src0
, tmp1
);
805 brw_set_saturate(p
, 0);
811 static void emit_kil(struct brw_wm_compile
*c
)
813 struct brw_compile
*p
= &c
->func
;
814 struct brw_reg depth
= retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UW
);
815 brw_push_insn_state(p
);
816 brw_set_mask_control(p
, BRW_MASK_DISABLE
);
817 brw_NOT(p
, c
->emit_mask_reg
, brw_mask_reg(1)); //IMASK
818 brw_AND(p
, depth
, c
->emit_mask_reg
, depth
);
819 brw_pop_insn_state(p
);
822 static void emit_mad(struct brw_wm_compile
*c
,
823 struct prog_instruction
*inst
)
825 struct brw_compile
*p
= &c
->func
;
826 GLuint mask
= inst
->DstReg
.WriteMask
;
827 struct brw_reg dst
, src0
, src1
, src2
;
830 for (i
= 0; i
< 4; i
++) {
832 dst
= get_dst_reg(c
, inst
, i
, 1);
833 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
834 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
835 src2
= get_src_reg(c
, &inst
->SrcReg
[2], i
, 1);
836 brw_MUL(p
, dst
, src0
, src1
);
838 brw_set_saturate(p
, (inst
->SaturateMode
!= SATURATE_OFF
) ? 1 : 0);
839 brw_ADD(p
, dst
, dst
, src2
);
840 brw_set_saturate(p
, 0);
845 static void emit_sop(struct brw_wm_compile
*c
,
846 struct prog_instruction
*inst
, GLuint cond
)
848 struct brw_compile
*p
= &c
->func
;
849 GLuint mask
= inst
->DstReg
.WriteMask
;
850 struct brw_reg dst
, src0
, src1
;
853 brw_push_insn_state(p
);
854 for (i
= 0; i
< 4; i
++) {
856 dst
= get_dst_reg(c
, inst
, i
, 1);
857 src0
= get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
858 src1
= get_src_reg(c
, &inst
->SrcReg
[1], i
, 1);
859 brw_CMP(p
, brw_null_reg(), cond
, src0
, src1
);
860 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
861 brw_MOV(p
, dst
, brw_imm_f(0.0));
862 brw_set_predicate_control(p
, BRW_PREDICATE_NORMAL
);
863 brw_MOV(p
, dst
, brw_imm_f(1.0));
866 brw_pop_insn_state(p
);
869 static void emit_slt(struct brw_wm_compile
*c
,
870 struct prog_instruction
*inst
)
872 emit_sop(c
, inst
, BRW_CONDITIONAL_L
);
875 static void emit_sle(struct brw_wm_compile
*c
,
876 struct prog_instruction
*inst
)
878 emit_sop(c
, inst
, BRW_CONDITIONAL_LE
);
881 static void emit_sgt(struct brw_wm_compile
*c
,
882 struct prog_instruction
*inst
)
884 emit_sop(c
, inst
, BRW_CONDITIONAL_G
);
887 static void emit_sge(struct brw_wm_compile
*c
,
888 struct prog_instruction
*inst
)
890 emit_sop(c
, inst
, BRW_CONDITIONAL_GE
);
893 static void emit_seq(struct brw_wm_compile
*c
,
894 struct prog_instruction
*inst
)
896 emit_sop(c
, inst
, BRW_CONDITIONAL_EQ
);
899 static void emit_sne(struct brw_wm_compile
*c
,
900 struct prog_instruction
*inst
)
902 emit_sop(c
, inst
, BRW_CONDITIONAL_NEQ
);
905 static void emit_ddx(struct brw_wm_compile
*c
,
906 struct prog_instruction
*inst
)
908 struct brw_compile
*p
= &c
->func
;
909 GLuint mask
= inst
->DstReg
.WriteMask
;
910 struct brw_reg interp
[4];
912 struct brw_reg src0
, w
;
914 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
915 w
= get_src_reg(c
, &inst
->SrcReg
[1], 3, 1);
917 interp
[0] = brw_vec1_grf(nr
, 0);
918 interp
[1] = brw_vec1_grf(nr
, 4);
919 interp
[2] = brw_vec1_grf(nr
+1, 0);
920 interp
[3] = brw_vec1_grf(nr
+1, 4);
921 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
922 for(i
= 0; i
< 4; i
++ ) {
924 dst
= get_dst_reg(c
, inst
, i
, 1);
925 brw_MOV(p
, dst
, interp
[i
]);
926 brw_MUL(p
, dst
, dst
, w
);
929 brw_set_saturate(p
, 0);
932 static void emit_ddy(struct brw_wm_compile
*c
,
933 struct prog_instruction
*inst
)
935 struct brw_compile
*p
= &c
->func
;
936 GLuint mask
= inst
->DstReg
.WriteMask
;
937 struct brw_reg interp
[4];
939 struct brw_reg src0
, w
;
942 src0
= get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
944 w
= get_src_reg(c
, &inst
->SrcReg
[1], 3, 1);
945 interp
[0] = brw_vec1_grf(nr
, 0);
946 interp
[1] = brw_vec1_grf(nr
, 4);
947 interp
[2] = brw_vec1_grf(nr
+1, 0);
948 interp
[3] = brw_vec1_grf(nr
+1, 4);
949 brw_set_saturate(p
, inst
->SaturateMode
!= SATURATE_OFF
);
950 for(i
= 0; i
< 4; i
++ ) {
952 dst
= get_dst_reg(c
, inst
, i
, 1);
953 brw_MOV(p
, dst
, suboffset(interp
[i
], 1));
954 brw_MUL(p
, dst
, dst
, w
);
957 brw_set_saturate(p
, 0);
960 static void emit_wpos_xy(struct brw_wm_compile
*c
,
961 struct prog_instruction
*inst
)
963 struct brw_compile
*p
= &c
->func
;
964 GLuint mask
= inst
->DstReg
.WriteMask
;
965 struct brw_reg src0
[2], dst
[2];
967 dst
[0] = get_dst_reg(c
, inst
, 0, 1);
968 dst
[1] = get_dst_reg(c
, inst
, 1, 1);
970 src0
[0] = get_src_reg(c
, &inst
->SrcReg
[0], 0, 1);
971 src0
[1] = get_src_reg(c
, &inst
->SrcReg
[0], 1, 1);
973 /* Calculate the pixel offset from window bottom left into destination
976 if (mask
& WRITEMASK_X
) {
977 /* X' = X - origin_x */
980 retype(src0
[0], BRW_REGISTER_TYPE_W
),
981 brw_imm_d(- c
->key
.origin_x
));
984 if (mask
& WRITEMASK_Y
) {
985 /* Y' = height - (Y - origin_y) = height + origin_y - Y */
988 negate(retype(src0
[1], BRW_REGISTER_TYPE_W
)),
989 brw_imm_d(c
->key
.origin_y
+ c
->key
.drawable_height
- 1));
994 BIAS on SIMD8 not workind yet...
996 static void emit_txb(struct brw_wm_compile
*c
,
997 struct prog_instruction
*inst
)
999 struct brw_compile
*p
= &c
->func
;
1000 struct brw_reg dst
[4], src
[4], payload_reg
;
1002 payload_reg
= get_reg(c
, PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
, 0, 1, 0, 0);
1003 for (i
= 0; i
< 4; i
++)
1004 dst
[i
] = get_dst_reg(c
, inst
, i
, 1);
1005 for (i
= 0; i
< 4; i
++)
1006 src
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
1008 switch (inst
->TexSrcTarget
) {
1009 case TEXTURE_1D_INDEX
:
1010 brw_MOV(p
, brw_message_reg(2), src
[0]);
1011 brw_MOV(p
, brw_message_reg(3), brw_imm_f(0));
1012 brw_MOV(p
, brw_message_reg(4), brw_imm_f(0));
1014 case TEXTURE_2D_INDEX
:
1015 case TEXTURE_RECT_INDEX
:
1016 brw_MOV(p
, brw_message_reg(2), src
[0]);
1017 brw_MOV(p
, brw_message_reg(3), src
[1]);
1018 brw_MOV(p
, brw_message_reg(4), brw_imm_f(0));
1021 brw_MOV(p
, brw_message_reg(2), src
[0]);
1022 brw_MOV(p
, brw_message_reg(3), src
[1]);
1023 brw_MOV(p
, brw_message_reg(4), src
[2]);
1026 brw_MOV(p
, brw_message_reg(5), src
[3]);
1027 brw_MOV(p
, brw_message_reg(6), brw_imm_f(0));
1029 retype(vec8(dst
[0]), BRW_REGISTER_TYPE_UW
),
1031 retype(payload_reg
, BRW_REGISTER_TYPE_UW
),
1032 inst
->TexSrcUnit
+ MAX_DRAW_BUFFERS
, /* surface */
1033 inst
->TexSrcUnit
, /* sampler */
1034 inst
->DstReg
.WriteMask
,
1035 BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS
,
1041 static void emit_tex(struct brw_wm_compile
*c
,
1042 struct prog_instruction
*inst
)
1044 struct brw_compile
*p
= &c
->func
;
1045 struct brw_reg dst
[4], src
[4], payload_reg
;
1049 GLboolean shadow
= (c
->key
.shadowtex_mask
& (1<<inst
->TexSrcUnit
)) ? 1 : 0;
1051 payload_reg
= get_reg(c
, PROGRAM_PAYLOAD
, PAYLOAD_DEPTH
, 0, 1, 0, 0);
1053 for (i
= 0; i
< 4; i
++)
1054 dst
[i
] = get_dst_reg(c
, inst
, i
, 1);
1055 for (i
= 0; i
< 4; i
++)
1056 src
[i
] = get_src_reg(c
, &inst
->SrcReg
[0], i
, 1);
1059 switch (inst
->TexSrcTarget
) {
1060 case TEXTURE_1D_INDEX
:
1064 case TEXTURE_2D_INDEX
:
1065 case TEXTURE_RECT_INDEX
:
1066 emit
= WRITEMASK_XY
;
1070 emit
= WRITEMASK_XYZ
;
1076 for (i
= 0; i
< nr
; i
++) {
1077 static const GLuint swz
[4] = {0,1,2,2};
1079 brw_MOV(p
, brw_message_reg(msg_len
+1), src
[swz
[i
]]);
1081 brw_MOV(p
, brw_message_reg(msg_len
+1), brw_imm_f(0));
1086 brw_MOV(p
, brw_message_reg(5), brw_imm_f(0));
1087 brw_MOV(p
, brw_message_reg(6), src
[2]);
1091 retype(vec8(dst
[0]), BRW_REGISTER_TYPE_UW
),
1093 retype(payload_reg
, BRW_REGISTER_TYPE_UW
),
1094 inst
->TexSrcUnit
+ MAX_DRAW_BUFFERS
, /* surface */
1095 inst
->TexSrcUnit
, /* sampler */
1096 inst
->DstReg
.WriteMask
,
1097 BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE
,
1103 brw_MOV(p
, dst
[3], brw_imm_f(1.0));
1106 static void post_wm_emit( struct brw_wm_compile
*c
)
1108 GLuint nr_insns
= c
->fp
->program
.Base
.NumInstructions
;
1109 GLuint insn
, target_insn
;
1110 struct prog_instruction
*inst1
, *inst2
;
1111 struct brw_instruction
*brw_inst1
, *brw_inst2
;
1113 for (insn
= 0; insn
< nr_insns
; insn
++) {
1114 inst1
= &c
->fp
->program
.Base
.Instructions
[insn
];
1115 brw_inst1
= inst1
->Data
;
1116 switch (inst1
->Opcode
) {
1118 target_insn
= inst1
->BranchTarget
;
1119 inst2
= &c
->fp
->program
.Base
.Instructions
[target_insn
];
1120 brw_inst2
= inst2
->Data
;
1121 offset
= brw_inst2
- brw_inst1
;
1122 brw_set_src1(brw_inst1
, brw_imm_d(offset
*16));
1130 static void brw_wm_emit_glsl(struct brw_context
*brw
, struct brw_wm_compile
*c
)
1133 #define MAX_LOOP_DEPTH 32
1134 struct brw_instruction
*if_inst
[MAX_IFSN
], *loop_inst
[MAX_LOOP_DEPTH
];
1135 struct brw_instruction
*inst0
, *inst1
;
1136 int i
, if_insn
= 0, loop_insn
= 0;
1137 struct brw_compile
*p
= &c
->func
;
1138 struct brw_indirect stack_index
= brw_indirect(0, 0);
1142 brw_set_compression_control(p
, BRW_COMPRESSION_NONE
);
1143 brw_MOV(p
, get_addr_reg(stack_index
), brw_address(c
->stack
));
1145 for (i
= 0; i
< c
->nr_fp_insns
; i
++) {
1146 struct prog_instruction
*inst
= &c
->prog_instructions
[i
];
1147 struct prog_instruction
*orig_inst
;
1149 if ((orig_inst
= inst
->Data
) != 0)
1150 orig_inst
->Data
= current_insn(p
);
1152 if (inst
->CondUpdate
)
1153 brw_set_conditionalmod(p
, BRW_CONDITIONAL_NZ
);
1155 brw_set_conditionalmod(p
, BRW_CONDITIONAL_NONE
);
1157 switch (inst
->Opcode
) {
1159 emit_pixel_xy(c
, inst
);
1162 emit_delta_xy(c
, inst
);
1165 emit_pixel_w(c
, inst
);
1168 emit_linterp(c
, inst
);
1171 emit_pinterp(c
, inst
);
1174 emit_cinterp(c
, inst
);
1177 emit_wpos_xy(c
, inst
);
1180 emit_fb_write(c
, inst
);
1285 assert(if_insn
< MAX_IFSN
);
1286 if_inst
[if_insn
++] = brw_IF(p
, BRW_EXECUTE_8
);
1289 if_inst
[if_insn
-1] = brw_ELSE(p
, if_inst
[if_insn
-1]);
1292 assert(if_insn
> 0);
1293 brw_ENDIF(p
, if_inst
[--if_insn
]);
1299 brw_push_insn_state(p
);
1300 brw_set_mask_control(p
, BRW_MASK_DISABLE
);
1301 brw_set_access_mode(p
, BRW_ALIGN_1
);
1302 brw_ADD(p
, deref_1ud(stack_index
, 0), brw_ip_reg(), brw_imm_d(3*16));
1303 brw_set_access_mode(p
, BRW_ALIGN_16
);
1304 brw_ADD(p
, get_addr_reg(stack_index
),
1305 get_addr_reg(stack_index
), brw_imm_d(4));
1306 orig_inst
= inst
->Data
;
1307 orig_inst
->Data
= &p
->store
[p
->nr_insn
];
1308 brw_ADD(p
, brw_ip_reg(), brw_ip_reg(), brw_imm_d(1*16));
1309 brw_pop_insn_state(p
);
1313 brw_push_insn_state(p
);
1314 brw_set_mask_control(p
, BRW_MASK_DISABLE
);
1315 brw_ADD(p
, get_addr_reg(stack_index
),
1316 get_addr_reg(stack_index
), brw_imm_d(-4));
1317 brw_set_access_mode(p
, BRW_ALIGN_1
);
1318 brw_MOV(p
, brw_ip_reg(), deref_1ud(stack_index
, 0));
1319 brw_set_access_mode(p
, BRW_ALIGN_16
);
1320 brw_pop_insn_state(p
);
1323 case OPCODE_BGNLOOP
:
1324 loop_inst
[loop_insn
++] = brw_DO(p
, BRW_EXECUTE_8
);
1328 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
1332 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
1334 case OPCODE_ENDLOOP
:
1336 inst0
= inst1
= brw_WHILE(p
, loop_inst
[loop_insn
]);
1337 /* patch all the BREAK instructions from
1339 while (inst0
> loop_inst
[loop_insn
]) {
1341 if (inst0
->header
.opcode
== BRW_OPCODE_BREAK
) {
1342 inst0
->bits3
.if_else
.jump_count
= inst1
- inst0
+ 1;
1343 inst0
->bits3
.if_else
.pop_count
= 0;
1344 } else if (inst0
->header
.opcode
== BRW_OPCODE_CONTINUE
) {
1345 inst0
->bits3
.if_else
.jump_count
= inst1
- inst0
;
1346 inst0
->bits3
.if_else
.pop_count
= 0;
1351 _mesa_printf("unsupported IR in fragment shader %d\n",
1354 if (inst
->CondUpdate
)
1355 brw_set_predicate_control(p
, BRW_PREDICATE_NORMAL
);
1357 brw_set_predicate_control(p
, BRW_PREDICATE_NONE
);
1360 for (i
= 0; i
< c
->fp
->program
.Base
.NumInstructions
; i
++)
1361 c
->fp
->program
.Base
.Instructions
[i
].Data
= NULL
;
1364 void brw_wm_glsl_emit(struct brw_context
*brw
, struct brw_wm_compile
*c
)
1368 brw_wm_emit_glsl(brw
, c
);
1369 c
->prog_data
.total_grf
= c
->reg_index
;
1370 c
->prog_data
.total_scratch
= 0;