src/mesa/drivers/dri/i965/brw_wm_pass1.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_wm.h"
  35
  36
  37 static GLuint get_tracked_mask(struct brw_wm_compile *c,
  38                                struct brw_wm_instruction *inst)
  39 {
  40    GLuint i;
  41    for (i = 0; i < 4; i++) {
  42       if (inst->writemask & (1<<i)) {
  43          if (!inst->dst[i]->contributes_to_output) {
  44             inst->writemask &= ~(1<<i);
  45             inst->dst[i] = 0;
  46          }
  47       }
  48    }
  49
  50    return inst->writemask;
  51 }
  52
  53 /* Remove a reference from a value's usage chain.
  54  */
  55 static void unlink_ref(struct brw_wm_ref *ref)
  56 {
  57    struct brw_wm_value *value = ref->value;
  58
  59    if (ref == value->lastuse) {
  60       value->lastuse = ref->prevuse;
  61    }
  62    else {
  63       struct brw_wm_ref *i = value->lastuse;
  64       while (i->prevuse != ref) i = i->prevuse;
  65       i->prevuse = ref->prevuse;
  66    }
  67 }
  68
  69 static void track_arg(struct brw_wm_compile *c,
  70                       struct brw_wm_instruction *inst,
  71                       GLuint arg,
  72                       GLuint readmask)
  73 {
  74    GLuint i;
  75
  76    for (i = 0; i < 4; i++) {
  77       struct brw_wm_ref *ref = inst->src[arg][i];
  78       if (ref) {
  79          if (readmask & (1<<i)) {
  80             ref->value->contributes_to_output = 1;
  81          }
  82          else {
  83             unlink_ref(ref);
  84             inst->src[arg][i] = NULL;
  85          }
  86       }
  87    }
  88 }
  89
  90 static GLuint get_texcoord_mask( GLuint tex_idx )
  91 {
  92    switch (tex_idx) {
  93    case TEXTURE_1D_INDEX:
  94       return WRITEMASK_X;
  95    case TEXTURE_2D_INDEX:
  96       return WRITEMASK_XY;
  97    case TEXTURE_3D_INDEX:
  98       return WRITEMASK_XYZ;
  99    case TEXTURE_CUBE_INDEX:
 100       return WRITEMASK_XYZ;
 101    case TEXTURE_RECT_INDEX:
 102       return WRITEMASK_XY;
 103    default: return 0;
 104    }
 105 }
 106
 107
 108 /* Step two: Basically this is dead code elimination.
 109  *
 110  * Iterate backwards over instructions, noting which values
 111  * contribute to the final result.  Adjust writemasks to only
 112  * calculate these values.
 113  */
 114 void brw_wm_pass1( struct brw_wm_compile *c )
 115 {
 116    GLint insn;
 117
 118    for (insn = c->nr_insns-1; insn >= 0; insn--) {
 119       struct brw_wm_instruction *inst = &c->instruction[insn];
 120       GLuint writemask;
 121       GLuint read0, read1, read2;
 122
 123       if (inst->opcode == OPCODE_KIL) {
 124          track_arg(c, inst, 0, WRITEMASK_XYZW); /* All args contribute to final */
 125          continue;
 126       }
 127
 128       if (inst->opcode == WM_FB_WRITE) {
 129          track_arg(c, inst, 0, WRITEMASK_XYZW);
 130          track_arg(c, inst, 1, WRITEMASK_XYZW);
 131          if (c->key.source_depth_to_render_target &&
 132              c->key.computes_depth)
 133             track_arg(c, inst, 2, WRITEMASK_Z);
 134          else
 135             track_arg(c, inst, 2, 0);
 136          continue;
 137       }
 138
 139       /* Lookup all the registers which were written by this
 140        * instruction and get a mask of those that contribute to the output:
 141        */
 142       writemask = get_tracked_mask(c, inst);
 143       if (!writemask) {
 144          GLuint arg;
 145          for (arg = 0; arg < 3; arg++)
 146             track_arg(c, inst, arg, 0);
 147          continue;
 148       }
 149
 150       read0 = 0;
 151       read1 = 0;
 152       read2 = 0;
 153
 154       /* Mark all inputs which contribute to the marked outputs:
 155        */
 156       switch (inst->opcode) {
 157       case OPCODE_ABS:
 158       case OPCODE_FLR:
 159       case OPCODE_FRC:
 160       case OPCODE_MOV:
 161       case OPCODE_SWZ:
 162       case OPCODE_TRUNC:
 163          read0 = writemask;
 164          break;
 165
 166       case OPCODE_SUB:
 167       case OPCODE_SLT:
 168       case OPCODE_SLE:
 169       case OPCODE_SGE:
 170       case OPCODE_SGT:
 171       case OPCODE_SEQ:
 172       case OPCODE_SNE:
 173       case OPCODE_ADD:
 174       case OPCODE_MAX:
 175       case OPCODE_MIN:
 176       case OPCODE_MUL:
 177          read0 = writemask;
 178          read1 = writemask;
 179          break;
 180
 181       case OPCODE_DDX:
 182       case OPCODE_DDY:
 183          read0 = writemask;
 184          break;
 185
 186       case OPCODE_MAD:
 187       case OPCODE_CMP:
 188       case OPCODE_LRP:
 189          read0 = writemask;
 190          read1 = writemask;
 191          read2 = writemask;
 192          break;
 193
 194       case OPCODE_XPD:
 195          if (writemask & WRITEMASK_X) read0 |= WRITEMASK_YZ;
 196          if (writemask & WRITEMASK_Y) read0 |= WRITEMASK_XZ;
 197          if (writemask & WRITEMASK_Z) read0 |= WRITEMASK_XY;
 198          read1 = read0;
 199          break;
 200
 201       case OPCODE_COS:
 202       case OPCODE_EX2:
 203       case OPCODE_LG2:
 204       case OPCODE_RCP:
 205       case OPCODE_RSQ:
 206       case OPCODE_SIN:
 207       case OPCODE_SCS:
 208       case WM_CINTERP:
 209       case WM_PIXELXY:
 210          read0 = WRITEMASK_X;
 211          break;
 212
 213       case OPCODE_POW:
 214          read0 = WRITEMASK_X;
 215          read1 = WRITEMASK_X;
 216          break;
 217
 218       case OPCODE_TEX:
 219       case OPCODE_TXP:
 220          read0 = get_texcoord_mask(inst->tex_idx);
 221
 222          if (inst->tex_shadow)
 223             read0 |= WRITEMASK_Z;
 224          break;
 225
 226       case OPCODE_TXB:
 227          /* Shadow ignored for txb.
 228           */
 229          read0 = get_texcoord_mask(inst->tex_idx) | WRITEMASK_W;
 230          break;
 231
 232       case WM_WPOSXY:
 233          read0 = writemask & WRITEMASK_XY;
 234          break;
 235
 236       case WM_DELTAXY:
 237          read0 = writemask & WRITEMASK_XY;
 238          read1 = WRITEMASK_X;
 239          break;
 240
 241       case WM_PIXELW:
 242          read0 = WRITEMASK_X;
 243          read1 = WRITEMASK_XY;
 244          break;
 245
 246       case WM_LINTERP:
 247          read0 = WRITEMASK_X;
 248          read1 = WRITEMASK_XY;
 249          break;
 250
 251       case WM_PINTERP:
 252          read0 = WRITEMASK_X; /* interpolant */
 253          read1 = WRITEMASK_XY; /* deltas */
 254          read2 = WRITEMASK_W; /* pixel w */
 255          break;
 256
 257       case OPCODE_DP3:
 258          read0 = WRITEMASK_XYZ;
 259          read1 = WRITEMASK_XYZ;
 260          break;
 261
 262       case OPCODE_DPH:
 263          read0 = WRITEMASK_XYZ;
 264          read1 = WRITEMASK_XYZW;
 265          break;
 266
 267       case OPCODE_DP4:
 268          read0 = WRITEMASK_XYZW;
 269          read1 = WRITEMASK_XYZW;
 270          break;
 271
 272       case OPCODE_LIT:
 273          read0 = WRITEMASK_XYW;
 274          break;
 275
 276       case OPCODE_DST:
 277       case WM_FRONTFACING:
 278       case OPCODE_KIL_NV:
 279       default:
 280          break;
 281       }
 282
 283       track_arg(c, inst, 0, read0);
 284       track_arg(c, inst, 1, read1);
 285       track_arg(c, inst, 2, read2);
 286    }
 287
 288    if (INTEL_DEBUG & DEBUG_WM) {
 289       brw_wm_print_program(c, "pass1");
 290    }
 291 }