src/mesa/drivers/dri/i965/brw_wm_pass1.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "brw_context.h"
  34 #include "brw_wm.h"
  35
  36
  37 static GLuint get_tracked_mask(struct brw_wm_compile *c,
  38                                struct brw_wm_instruction *inst)
  39 {
  40    GLuint i;
  41    for (i = 0; i < 4; i++) {
  42       if (inst->writemask & (1<<i)) {
  43          if (!inst->dst[i]->contributes_to_output) {
  44             inst->writemask &= ~(1<<i);
  45             inst->dst[i] = 0;
  46          }
  47       }
  48    }
  49
  50    return inst->writemask;
  51 }
  52
  53 /* Remove a reference from a value's usage chain.
  54  */
  55 static void unlink_ref(struct brw_wm_ref *ref)
  56 {
  57    struct brw_wm_value *value = ref->value;
  58
  59    if (ref == value->lastuse) {
  60       value->lastuse = ref->prevuse;
  61    }
  62    else {
  63       struct brw_wm_ref *i = value->lastuse;
  64       while (i->prevuse != ref) i = i->prevuse;
  65       i->prevuse = ref->prevuse;
  66    }
  67 }
  68
  69 static void track_arg(struct brw_wm_compile *c,
  70                       struct brw_wm_instruction *inst,
  71                       GLuint arg,
  72                       GLuint readmask)
  73 {
  74    GLuint i;
  75
  76    for (i = 0; i < 4; i++) {
  77       struct brw_wm_ref *ref = inst->src[arg][i];
  78       if (ref) {
  79          if (readmask & (1<<i)) {
  80             ref->value->contributes_to_output = 1;
  81          }
  82          else {
  83             unlink_ref(ref);
  84             inst->src[arg][i] = NULL;
  85          }
  86       }
  87    }
  88 }
  89
  90 static GLuint get_texcoord_mask( GLuint tex_idx )
  91 {
  92    switch (tex_idx) {
  93    case TEXTURE_1D_INDEX:
  94       return WRITEMASK_X;
  95    case TEXTURE_2D_INDEX:
  96    case TEXTURE_1D_ARRAY_INDEX:
  97       return WRITEMASK_XY;
  98    case TEXTURE_3D_INDEX:
  99    case TEXTURE_2D_ARRAY_INDEX:
 100       return WRITEMASK_XYZ;
 101    case TEXTURE_CUBE_INDEX:
 102       return WRITEMASK_XYZ;
 103    case TEXTURE_RECT_INDEX:
 104       return WRITEMASK_XY;
 105    default: return 0;
 106    }
 107 }
 108
 109
 110 /* Step two: Basically this is dead code elimination.
 111  *
 112  * Iterate backwards over instructions, noting which values
 113  * contribute to the final result.  Adjust writemasks to only
 114  * calculate these values.
 115  */
 116 void brw_wm_pass1( struct brw_wm_compile *c )
 117 {
 118    GLint insn;
 119
 120    for (insn = c->nr_insns-1; insn >= 0; insn--) {
 121       struct brw_wm_instruction *inst = &c->instruction[insn];
 122       GLuint writemask;
 123       GLuint read0, read1, read2;
 124
 125       if (inst->opcode == OPCODE_KIL) {
 126          track_arg(c, inst, 0, WRITEMASK_XYZW); /* All args contribute to final */
 127          continue;
 128       }
 129
 130       if (inst->opcode == WM_FB_WRITE) {
 131          track_arg(c, inst, 0, WRITEMASK_XYZW);
 132          track_arg(c, inst, 1, WRITEMASK_XYZW);
 133          if (c->source_depth_to_render_target && c->computes_depth)
 134             track_arg(c, inst, 2, WRITEMASK_Z);
 135          else
 136             track_arg(c, inst, 2, 0);
 137          continue;
 138       }
 139
 140       /* Lookup all the registers which were written by this
 141        * instruction and get a mask of those that contribute to the output:
 142        */
 143       writemask = get_tracked_mask(c, inst);
 144       if (!writemask) {
 145          GLuint arg;
 146          for (arg = 0; arg < 3; arg++)
 147             track_arg(c, inst, arg, 0);
 148          continue;
 149       }
 150
 151       read0 = 0;
 152       read1 = 0;
 153       read2 = 0;
 154
 155       /* Mark all inputs which contribute to the marked outputs:
 156        */
 157       switch (inst->opcode) {
 158       case OPCODE_ABS:
 159       case OPCODE_FLR:
 160       case OPCODE_FRC:
 161       case OPCODE_MOV:
 162       case OPCODE_SSG:
 163       case OPCODE_SWZ:
 164       case OPCODE_TRUNC:
 165          read0 = writemask;
 166          break;
 167
 168       case OPCODE_SUB:
 169       case OPCODE_SLT:
 170       case OPCODE_SLE:
 171       case OPCODE_SGE:
 172       case OPCODE_SGT:
 173       case OPCODE_SEQ:
 174       case OPCODE_SNE:
 175       case OPCODE_ADD:
 176       case OPCODE_MAX:
 177       case OPCODE_MIN:
 178       case OPCODE_MUL:
 179          read0 = writemask;
 180          read1 = writemask;
 181          break;
 182
 183       case OPCODE_DDX:
 184       case OPCODE_DDY:
 185          read0 = writemask;
 186          break;
 187
 188       case OPCODE_MAD:
 189       case OPCODE_CMP:
 190       case OPCODE_LRP:
 191          read0 = writemask;
 192          read1 = writemask;
 193          read2 = writemask;
 194          break;
 195
 196       case OPCODE_XPD:
 197          if (writemask & WRITEMASK_X) read0 |= WRITEMASK_YZ;
 198          if (writemask & WRITEMASK_Y) read0 |= WRITEMASK_XZ;
 199          if (writemask & WRITEMASK_Z) read0 |= WRITEMASK_XY;
 200          read1 = read0;
 201          break;
 202
 203       case OPCODE_COS:
 204       case OPCODE_EX2:
 205       case OPCODE_LG2:
 206       case OPCODE_RCP:
 207       case OPCODE_RSQ:
 208       case OPCODE_SIN:
 209       case OPCODE_SCS:
 210       case WM_CINTERP:
 211       case WM_PIXELXY:
 212          read0 = WRITEMASK_X;
 213          break;
 214
 215       case OPCODE_POW:
 216          read0 = WRITEMASK_X;
 217          read1 = WRITEMASK_X;
 218          break;
 219
 220       case OPCODE_TEX:
 221       case OPCODE_TXP:
 222          read0 = get_texcoord_mask(inst->tex_idx);
 223
 224          if (inst->tex_shadow)
 225             read0 |= WRITEMASK_Z;
 226          break;
 227
 228       case OPCODE_TXB:
 229          /* Shadow ignored for txb.
 230           */
 231          read0 = get_texcoord_mask(inst->tex_idx) | WRITEMASK_W;
 232          break;
 233
 234       case WM_WPOSXY:
 235          read0 = writemask & WRITEMASK_XY;
 236          break;
 237
 238       case WM_DELTAXY:
 239          read0 = writemask & WRITEMASK_XY;
 240          read1 = WRITEMASK_X;
 241          break;
 242
 243       case WM_PIXELW:
 244          read0 = WRITEMASK_X;
 245          read1 = WRITEMASK_XY;
 246          break;
 247
 248       case WM_LINTERP:
 249          read0 = WRITEMASK_X;
 250          read1 = WRITEMASK_XY;
 251          break;
 252
 253       case WM_PINTERP:
 254          read0 = WRITEMASK_X; /* interpolant */
 255          read1 = WRITEMASK_XY; /* deltas */
 256          read2 = WRITEMASK_W; /* pixel w */
 257          break;
 258
 259       case OPCODE_DP2:
 260          read0 = WRITEMASK_XY;
 261          read1 = WRITEMASK_XY;
 262          break;
 263
 264       case OPCODE_DP3:
 265          read0 = WRITEMASK_XYZ;
 266          read1 = WRITEMASK_XYZ;
 267          break;
 268
 269       case OPCODE_DPH:
 270          read0 = WRITEMASK_XYZ;
 271          read1 = WRITEMASK_XYZW;
 272          break;
 273
 274       case OPCODE_DP4:
 275          read0 = WRITEMASK_XYZW;
 276          read1 = WRITEMASK_XYZW;
 277          break;
 278
 279       case OPCODE_LIT:
 280          read0 = WRITEMASK_XYW;
 281          break;
 282
 283       case OPCODE_DST:
 284       case WM_FRONTFACING:
 285       default:
 286          break;
 287       }
 288
 289       track_arg(c, inst, 0, read0);
 290       track_arg(c, inst, 1, read1);
 291       track_arg(c, inst, 2, read2);
 292    }
 293
 294    if (unlikely(INTEL_DEBUG & DEBUG_WM)) {
 295       brw_wm_print_program(c, "pass1");
 296    }
 297 }