intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm_sampler_state.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "brw_defines.h"
36
37 #include "main/macros.h"
38
39
40
41 /* Samplers aren't strictly wm state from the hardware's perspective,
42 * but that is the only situation in which we use them in this driver.
43 */
44
45
46
47 /* The brw (and related graphics cores) do not support GL_CLAMP. The
48 * Intel drivers for "other operating systems" implement GL_CLAMP as
49 * GL_CLAMP_TO_EDGE, so the same is done here.
50 */
51 static GLuint translate_wrap_mode( GLenum wrap )
52 {
53 switch( wrap ) {
54 case GL_REPEAT:
55 return BRW_TEXCOORDMODE_WRAP;
56 case GL_CLAMP:
57 return BRW_TEXCOORDMODE_CLAMP;
58 case GL_CLAMP_TO_EDGE:
59 return BRW_TEXCOORDMODE_CLAMP; /* conform likes it this way */
60 case GL_CLAMP_TO_BORDER:
61 return BRW_TEXCOORDMODE_CLAMP_BORDER;
62 case GL_MIRRORED_REPEAT:
63 return BRW_TEXCOORDMODE_MIRROR;
64 default:
65 return BRW_TEXCOORDMODE_WRAP;
66 }
67 }
68
69 static drm_intel_bo *upload_default_color( struct brw_context *brw,
70 const GLfloat *color )
71 {
72 struct intel_context *intel = &brw->intel;
73
74 if (intel->gen >= 5) {
75 struct gen5_sampler_default_color sdc;
76
77 memset(&sdc, 0, sizeof(sdc));
78
79 UNCLAMPED_FLOAT_TO_UBYTE(sdc.ub[0], color[0]);
80 UNCLAMPED_FLOAT_TO_UBYTE(sdc.ub[1], color[1]);
81 UNCLAMPED_FLOAT_TO_UBYTE(sdc.ub[2], color[2]);
82 UNCLAMPED_FLOAT_TO_UBYTE(sdc.ub[3], color[3]);
83
84 UNCLAMPED_FLOAT_TO_USHORT(sdc.us[0], color[0]);
85 UNCLAMPED_FLOAT_TO_USHORT(sdc.us[1], color[1]);
86 UNCLAMPED_FLOAT_TO_USHORT(sdc.us[2], color[2]);
87 UNCLAMPED_FLOAT_TO_USHORT(sdc.us[3], color[3]);
88
89 UNCLAMPED_FLOAT_TO_SHORT(sdc.s[0], color[0]);
90 UNCLAMPED_FLOAT_TO_SHORT(sdc.s[1], color[1]);
91 UNCLAMPED_FLOAT_TO_SHORT(sdc.s[2], color[2]);
92 UNCLAMPED_FLOAT_TO_SHORT(sdc.s[3], color[3]);
93
94 /* XXX: Fill in half floats */
95 /* XXX: Fill in signed bytes */
96
97 COPY_4V(sdc.f, color);
98
99 return brw_cache_data(&brw->cache, BRW_SAMPLER_DEFAULT_COLOR,
100 &sdc, sizeof(sdc));
101 } else {
102 struct brw_sampler_default_color sdc;
103
104 COPY_4V(sdc.color, color);
105
106 return brw_cache_data(&brw->cache, BRW_SAMPLER_DEFAULT_COLOR,
107 &sdc, sizeof(sdc));
108 }
109 }
110
111
112 struct wm_sampler_key {
113 int sampler_count;
114
115 struct wm_sampler_entry {
116 GLenum tex_target;
117 GLenum wrap_r, wrap_s, wrap_t;
118 float maxlod, minlod;
119 float lod_bias;
120 float max_aniso;
121 GLenum minfilter, magfilter;
122 GLenum comparemode, comparefunc;
123
124 /** If target is cubemap, take context setting.
125 */
126 GLboolean seamless_cube_map;
127 } sampler[BRW_MAX_TEX_UNIT];
128 };
129
130 /**
131 * Sets the sampler state for a single unit based off of the sampler key
132 * entry.
133 */
134 static void brw_update_sampler_state(struct brw_context *brw,
135 struct wm_sampler_entry *key,
136 drm_intel_bo *sdc_bo,
137 struct brw_sampler_state *sampler)
138 {
139 struct intel_context *intel = &brw->intel;
140
141 memset(sampler, 0, sizeof(*sampler));
142
143 switch (key->minfilter) {
144 case GL_NEAREST:
145 sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST;
146 sampler->ss0.mip_filter = BRW_MIPFILTER_NONE;
147 break;
148 case GL_LINEAR:
149 sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR;
150 sampler->ss0.mip_filter = BRW_MIPFILTER_NONE;
151 break;
152 case GL_NEAREST_MIPMAP_NEAREST:
153 sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST;
154 sampler->ss0.mip_filter = BRW_MIPFILTER_NEAREST;
155 break;
156 case GL_LINEAR_MIPMAP_NEAREST:
157 sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR;
158 sampler->ss0.mip_filter = BRW_MIPFILTER_NEAREST;
159 break;
160 case GL_NEAREST_MIPMAP_LINEAR:
161 sampler->ss0.min_filter = BRW_MAPFILTER_NEAREST;
162 sampler->ss0.mip_filter = BRW_MIPFILTER_LINEAR;
163 break;
164 case GL_LINEAR_MIPMAP_LINEAR:
165 sampler->ss0.min_filter = BRW_MAPFILTER_LINEAR;
166 sampler->ss0.mip_filter = BRW_MIPFILTER_LINEAR;
167 break;
168 default:
169 break;
170 }
171
172 /* Set Anisotropy:
173 */
174 if (key->max_aniso > 1.0) {
175 sampler->ss0.min_filter = BRW_MAPFILTER_ANISOTROPIC;
176 sampler->ss0.mag_filter = BRW_MAPFILTER_ANISOTROPIC;
177
178 if (key->max_aniso > 2.0) {
179 sampler->ss3.max_aniso = MIN2((key->max_aniso - 2) / 2,
180 BRW_ANISORATIO_16);
181 }
182 }
183 else {
184 switch (key->magfilter) {
185 case GL_NEAREST:
186 sampler->ss0.mag_filter = BRW_MAPFILTER_NEAREST;
187 break;
188 case GL_LINEAR:
189 sampler->ss0.mag_filter = BRW_MAPFILTER_LINEAR;
190 break;
191 default:
192 break;
193 }
194 }
195
196 sampler->ss1.r_wrap_mode = translate_wrap_mode(key->wrap_r);
197 sampler->ss1.s_wrap_mode = translate_wrap_mode(key->wrap_s);
198 sampler->ss1.t_wrap_mode = translate_wrap_mode(key->wrap_t);
199
200 if (intel->gen >= 6 &&
201 sampler->ss0.min_filter != sampler->ss0.mag_filter)
202 sampler->ss0.min_mag_neq = 1;
203
204 /* Cube-maps on 965 and later must use the same wrap mode for all 3
205 * coordinate dimensions. Futher, only CUBE and CLAMP are valid.
206 */
207 if (key->tex_target == GL_TEXTURE_CUBE_MAP) {
208 if (key->seamless_cube_map &&
209 (key->minfilter != GL_NEAREST || key->magfilter != GL_NEAREST)) {
210 sampler->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CUBE;
211 sampler->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CUBE;
212 sampler->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CUBE;
213 } else {
214 sampler->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
215 sampler->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
216 sampler->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
217 }
218 } else if (key->tex_target == GL_TEXTURE_1D) {
219 /* There's a bug in 1D texture sampling - it actually pays
220 * attention to the wrap_t value, though it should not.
221 * Override the wrap_t value here to GL_REPEAT to keep
222 * any nonexistent border pixels from floating in.
223 */
224 sampler->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
225 }
226
227
228 /* Set shadow function:
229 */
230 if (key->comparemode == GL_COMPARE_R_TO_TEXTURE_ARB) {
231 /* Shadowing is "enabled" by emitting a particular sampler
232 * message (sample_c). So need to recompile WM program when
233 * shadow comparison is enabled on each/any texture unit.
234 */
235 sampler->ss0.shadow_function =
236 intel_translate_shadow_compare_func(key->comparefunc);
237 }
238
239 /* Set LOD bias:
240 */
241 sampler->ss0.lod_bias = S_FIXED(CLAMP(key->lod_bias, -16, 15), 6);
242
243 sampler->ss0.lod_preclamp = 1; /* OpenGL mode */
244 sampler->ss0.default_color_mode = 0; /* OpenGL/DX10 mode */
245
246 /* Set BaseMipLevel, MaxLOD, MinLOD:
247 *
248 * XXX: I don't think that using firstLevel, lastLevel works,
249 * because we always setup the surface state as if firstLevel ==
250 * level zero. Probably have to subtract firstLevel from each of
251 * these:
252 */
253 sampler->ss0.base_level = U_FIXED(0, 1);
254
255 sampler->ss1.max_lod = U_FIXED(CLAMP(key->maxlod, 0, 13), 6);
256 sampler->ss1.min_lod = U_FIXED(CLAMP(key->minlod, 0, 13), 6);
257
258 sampler->ss2.default_color_pointer = sdc_bo->offset >> 5; /* reloc */
259 }
260
261
262 /** Sets up the cache key for sampler state for all texture units */
263 static void
264 brw_wm_sampler_populate_key(struct brw_context *brw,
265 struct wm_sampler_key *key)
266 {
267 struct gl_context *ctx = &brw->intel.ctx;
268 int unit;
269 char *last_entry_end = ((char*)&key->sampler_count) +
270 sizeof(key->sampler_count);
271
272 key->sampler_count = 0;
273
274 for (unit = 0; unit < BRW_MAX_TEX_UNIT; unit++) {
275 if (ctx->Texture.Unit[unit]._ReallyEnabled) {
276 struct wm_sampler_entry *entry = &key->sampler[unit];
277 struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit];
278 struct gl_texture_object *texObj = texUnit->_Current;
279 struct gl_texture_image *firstImage =
280 texObj->Image[0][texObj->BaseLevel];
281
282 memset(last_entry_end, 0,
283 (char*)entry - last_entry_end + sizeof(*entry));
284 last_entry_end = ((char*)entry) + sizeof(*entry);
285
286 entry->tex_target = texObj->Target;
287
288 entry->seamless_cube_map = (texObj->Target == GL_TEXTURE_CUBE_MAP)
289 ? ctx->Texture.CubeMapSeamless : GL_FALSE;
290
291 entry->wrap_r = texObj->WrapR;
292 entry->wrap_s = texObj->WrapS;
293 entry->wrap_t = texObj->WrapT;
294
295 entry->maxlod = texObj->MaxLod;
296 entry->minlod = texObj->MinLod;
297 entry->lod_bias = texUnit->LodBias + texObj->LodBias;
298 entry->max_aniso = texObj->MaxAnisotropy;
299 entry->minfilter = texObj->MinFilter;
300 entry->magfilter = texObj->MagFilter;
301 entry->comparemode = texObj->CompareMode;
302 entry->comparefunc = texObj->CompareFunc;
303
304 drm_intel_bo_unreference(brw->wm.sdc_bo[unit]);
305 if (firstImage->_BaseFormat == GL_DEPTH_COMPONENT) {
306 float bordercolor[4] = {
307 texObj->BorderColor.f[0],
308 texObj->BorderColor.f[0],
309 texObj->BorderColor.f[0],
310 texObj->BorderColor.f[0]
311 };
312 /* GL specs that border color for depth textures is taken from the
313 * R channel, while the hardware uses A. Spam R into all the
314 * channels for safety.
315 */
316 brw->wm.sdc_bo[unit] = upload_default_color(brw, bordercolor);
317 } else {
318 brw->wm.sdc_bo[unit] = upload_default_color(brw,
319 texObj->BorderColor.f);
320 }
321 key->sampler_count = unit + 1;
322 }
323 }
324 struct wm_sampler_entry *entry = &key->sampler[key->sampler_count];
325 memset(last_entry_end, 0, (char*)entry - last_entry_end);
326 }
327
328 /* All samplers must be uploaded in a single contiguous array, which
329 * complicates various things. However, this is still too confusing -
330 * FIXME: simplify all the different new texture state flags.
331 */
332 static void upload_wm_samplers( struct brw_context *brw )
333 {
334 struct gl_context *ctx = &brw->intel.ctx;
335 struct wm_sampler_key key;
336 int i, sampler_key_size;
337
338 brw_wm_sampler_populate_key(brw, &key);
339
340 if (brw->wm.sampler_count != key.sampler_count) {
341 brw->wm.sampler_count = key.sampler_count;
342 brw->state.dirty.cache |= CACHE_NEW_SAMPLER;
343 }
344
345 drm_intel_bo_unreference(brw->wm.sampler_bo);
346 brw->wm.sampler_bo = NULL;
347 if (brw->wm.sampler_count == 0)
348 return;
349
350 /* Only include the populated portion of the key in the search. */
351 sampler_key_size = offsetof(struct wm_sampler_key,
352 sampler[key.sampler_count]);
353 brw->wm.sampler_bo = brw_search_cache(&brw->cache, BRW_SAMPLER,
354 &key, sampler_key_size,
355 brw->wm.sdc_bo, key.sampler_count,
356 NULL);
357
358 /* If we didnt find it in the cache, compute the state and put it in the
359 * cache.
360 */
361 if (brw->wm.sampler_bo == NULL) {
362 struct brw_sampler_state sampler[BRW_MAX_TEX_UNIT];
363
364 memset(sampler, 0, sizeof(sampler));
365 for (i = 0; i < key.sampler_count; i++) {
366 if (brw->wm.sdc_bo[i] == NULL)
367 continue;
368
369 brw_update_sampler_state(brw, &key.sampler[i], brw->wm.sdc_bo[i],
370 &sampler[i]);
371 }
372
373 brw->wm.sampler_bo = brw_upload_cache(&brw->cache, BRW_SAMPLER,
374 &key, sampler_key_size,
375 brw->wm.sdc_bo, key.sampler_count,
376 &sampler, sizeof(sampler));
377
378 /* Emit SDC relocations */
379 for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
380 if (!ctx->Texture.Unit[i]._ReallyEnabled)
381 continue;
382
383 drm_intel_bo_emit_reloc(brw->wm.sampler_bo,
384 i * sizeof(struct brw_sampler_state) +
385 offsetof(struct brw_sampler_state, ss2),
386 brw->wm.sdc_bo[i], 0,
387 I915_GEM_DOMAIN_SAMPLER, 0);
388 }
389 }
390 }
391
392 const struct brw_tracked_state brw_wm_samplers = {
393 .dirty = {
394 .mesa = _NEW_TEXTURE,
395 .brw = 0,
396 .cache = 0
397 },
398 .prepare = upload_wm_samplers,
399 };
400
401