2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "brw_defines.h"
37 #include "main/macros.h"
41 /* Samplers aren't strictly wm state from the hardware's perspective,
42 * but that is the only situation in which we use them in this driver.
47 /* The brw (and related graphics cores) do not support GL_CLAMP. The
48 * Intel drivers for "other operating systems" implement GL_CLAMP as
49 * GL_CLAMP_TO_EDGE, so the same is done here.
51 static GLuint
translate_wrap_mode( GLenum wrap
)
55 return BRW_TEXCOORDMODE_WRAP
;
57 return BRW_TEXCOORDMODE_CLAMP
;
58 case GL_CLAMP_TO_EDGE
:
59 return BRW_TEXCOORDMODE_CLAMP
; /* conform likes it this way */
60 case GL_CLAMP_TO_BORDER
:
61 return BRW_TEXCOORDMODE_CLAMP_BORDER
;
62 case GL_MIRRORED_REPEAT
:
63 return BRW_TEXCOORDMODE_MIRROR
;
65 return BRW_TEXCOORDMODE_WRAP
;
69 static drm_intel_bo
*upload_default_color( struct brw_context
*brw
,
70 const GLfloat
*color
)
72 struct brw_sampler_default_color sdc
;
74 COPY_4V(sdc
.color
, color
);
76 return brw_cache_data(&brw
->cache
, BRW_SAMPLER_DEFAULT_COLOR
,
81 struct wm_sampler_key
{
84 struct wm_sampler_entry
{
86 GLenum wrap_r
, wrap_s
, wrap_t
;
90 GLenum minfilter
, magfilter
;
91 GLenum comparemode
, comparefunc
;
93 /** If target is cubemap, take context setting.
95 GLboolean seamless_cube_map
;
96 } sampler
[BRW_MAX_TEX_UNIT
];
100 * Sets the sampler state for a single unit based off of the sampler key
103 static void brw_update_sampler_state(struct brw_context
*brw
,
104 struct wm_sampler_entry
*key
,
105 drm_intel_bo
*sdc_bo
,
106 struct brw_sampler_state
*sampler
)
108 struct intel_context
*intel
= &brw
->intel
;
110 memset(sampler
, 0, sizeof(*sampler
));
112 switch (key
->minfilter
) {
114 sampler
->ss0
.min_filter
= BRW_MAPFILTER_NEAREST
;
115 sampler
->ss0
.mip_filter
= BRW_MIPFILTER_NONE
;
118 sampler
->ss0
.min_filter
= BRW_MAPFILTER_LINEAR
;
119 sampler
->ss0
.mip_filter
= BRW_MIPFILTER_NONE
;
121 case GL_NEAREST_MIPMAP_NEAREST
:
122 sampler
->ss0
.min_filter
= BRW_MAPFILTER_NEAREST
;
123 sampler
->ss0
.mip_filter
= BRW_MIPFILTER_NEAREST
;
125 case GL_LINEAR_MIPMAP_NEAREST
:
126 sampler
->ss0
.min_filter
= BRW_MAPFILTER_LINEAR
;
127 sampler
->ss0
.mip_filter
= BRW_MIPFILTER_NEAREST
;
129 case GL_NEAREST_MIPMAP_LINEAR
:
130 sampler
->ss0
.min_filter
= BRW_MAPFILTER_NEAREST
;
131 sampler
->ss0
.mip_filter
= BRW_MIPFILTER_LINEAR
;
133 case GL_LINEAR_MIPMAP_LINEAR
:
134 sampler
->ss0
.min_filter
= BRW_MAPFILTER_LINEAR
;
135 sampler
->ss0
.mip_filter
= BRW_MIPFILTER_LINEAR
;
143 if (key
->max_aniso
> 1.0) {
144 sampler
->ss0
.min_filter
= BRW_MAPFILTER_ANISOTROPIC
;
145 sampler
->ss0
.mag_filter
= BRW_MAPFILTER_ANISOTROPIC
;
147 if (key
->max_aniso
> 2.0) {
148 sampler
->ss3
.max_aniso
= MIN2((key
->max_aniso
- 2) / 2,
153 switch (key
->magfilter
) {
155 sampler
->ss0
.mag_filter
= BRW_MAPFILTER_NEAREST
;
158 sampler
->ss0
.mag_filter
= BRW_MAPFILTER_LINEAR
;
165 sampler
->ss1
.r_wrap_mode
= translate_wrap_mode(key
->wrap_r
);
166 sampler
->ss1
.s_wrap_mode
= translate_wrap_mode(key
->wrap_s
);
167 sampler
->ss1
.t_wrap_mode
= translate_wrap_mode(key
->wrap_t
);
169 if (intel
->gen
>= 6 &&
170 sampler
->ss0
.min_filter
!= sampler
->ss0
.mag_filter
)
171 sampler
->ss0
.min_mag_neq
= 1;
173 /* Cube-maps on 965 and later must use the same wrap mode for all 3
174 * coordinate dimensions. Futher, only CUBE and CLAMP are valid.
176 if (key
->tex_target
== GL_TEXTURE_CUBE_MAP
) {
177 if (key
->seamless_cube_map
&&
178 (key
->minfilter
!= GL_NEAREST
|| key
->magfilter
!= GL_NEAREST
)) {
179 sampler
->ss1
.r_wrap_mode
= BRW_TEXCOORDMODE_CUBE
;
180 sampler
->ss1
.s_wrap_mode
= BRW_TEXCOORDMODE_CUBE
;
181 sampler
->ss1
.t_wrap_mode
= BRW_TEXCOORDMODE_CUBE
;
183 sampler
->ss1
.r_wrap_mode
= BRW_TEXCOORDMODE_CLAMP
;
184 sampler
->ss1
.s_wrap_mode
= BRW_TEXCOORDMODE_CLAMP
;
185 sampler
->ss1
.t_wrap_mode
= BRW_TEXCOORDMODE_CLAMP
;
187 } else if (key
->tex_target
== GL_TEXTURE_1D
) {
188 /* There's a bug in 1D texture sampling - it actually pays
189 * attention to the wrap_t value, though it should not.
190 * Override the wrap_t value here to GL_REPEAT to keep
191 * any nonexistent border pixels from floating in.
193 sampler
->ss1
.t_wrap_mode
= BRW_TEXCOORDMODE_WRAP
;
197 /* Set shadow function:
199 if (key
->comparemode
== GL_COMPARE_R_TO_TEXTURE_ARB
) {
200 /* Shadowing is "enabled" by emitting a particular sampler
201 * message (sample_c). So need to recompile WM program when
202 * shadow comparison is enabled on each/any texture unit.
204 sampler
->ss0
.shadow_function
=
205 intel_translate_shadow_compare_func(key
->comparefunc
);
210 sampler
->ss0
.lod_bias
= S_FIXED(CLAMP(key
->lod_bias
, -16, 15), 6);
212 sampler
->ss0
.lod_preclamp
= 1; /* OpenGL mode */
213 sampler
->ss0
.default_color_mode
= 0; /* OpenGL/DX10 mode */
215 /* Set BaseMipLevel, MaxLOD, MinLOD:
217 * XXX: I don't think that using firstLevel, lastLevel works,
218 * because we always setup the surface state as if firstLevel ==
219 * level zero. Probably have to subtract firstLevel from each of
222 sampler
->ss0
.base_level
= U_FIXED(0, 1);
224 sampler
->ss1
.max_lod
= U_FIXED(CLAMP(key
->maxlod
, 0, 13), 6);
225 sampler
->ss1
.min_lod
= U_FIXED(CLAMP(key
->minlod
, 0, 13), 6);
227 sampler
->ss2
.default_color_pointer
= sdc_bo
->offset
>> 5; /* reloc */
231 /** Sets up the cache key for sampler state for all texture units */
233 brw_wm_sampler_populate_key(struct brw_context
*brw
,
234 struct wm_sampler_key
*key
)
236 GLcontext
*ctx
= &brw
->intel
.ctx
;
238 char *last_entry_end
= ((char*)&key
->sampler_count
) +
239 sizeof(key
->sampler_count
);
241 key
->sampler_count
= 0;
243 for (unit
= 0; unit
< BRW_MAX_TEX_UNIT
; unit
++) {
244 if (ctx
->Texture
.Unit
[unit
]._ReallyEnabled
) {
245 struct wm_sampler_entry
*entry
= &key
->sampler
[unit
];
246 struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[unit
];
247 struct gl_texture_object
*texObj
= texUnit
->_Current
;
248 struct intel_texture_object
*intelObj
= intel_texture_object(texObj
);
249 struct gl_texture_image
*firstImage
=
250 texObj
->Image
[0][intelObj
->firstLevel
];
252 memset(last_entry_end
, 0,
253 (char*)entry
- last_entry_end
+ sizeof(*entry
));
254 last_entry_end
= ((char*)entry
) + sizeof(*entry
);
256 entry
->tex_target
= texObj
->Target
;
258 entry
->seamless_cube_map
= (texObj
->Target
== GL_TEXTURE_CUBE_MAP
)
259 ? ctx
->Texture
.CubeMapSeamless
: GL_FALSE
;
261 entry
->wrap_r
= texObj
->WrapR
;
262 entry
->wrap_s
= texObj
->WrapS
;
263 entry
->wrap_t
= texObj
->WrapT
;
265 entry
->maxlod
= texObj
->MaxLod
;
266 entry
->minlod
= texObj
->MinLod
;
267 entry
->lod_bias
= texUnit
->LodBias
+ texObj
->LodBias
;
268 entry
->max_aniso
= texObj
->MaxAnisotropy
;
269 entry
->minfilter
= texObj
->MinFilter
;
270 entry
->magfilter
= texObj
->MagFilter
;
271 entry
->comparemode
= texObj
->CompareMode
;
272 entry
->comparefunc
= texObj
->CompareFunc
;
274 drm_intel_bo_unreference(brw
->wm
.sdc_bo
[unit
]);
275 if (firstImage
->_BaseFormat
== GL_DEPTH_COMPONENT
) {
276 float bordercolor
[4] = {
277 texObj
->BorderColor
.f
[0],
278 texObj
->BorderColor
.f
[0],
279 texObj
->BorderColor
.f
[0],
280 texObj
->BorderColor
.f
[0]
282 /* GL specs that border color for depth textures is taken from the
283 * R channel, while the hardware uses A. Spam R into all the
284 * channels for safety.
286 brw
->wm
.sdc_bo
[unit
] = upload_default_color(brw
, bordercolor
);
288 brw
->wm
.sdc_bo
[unit
] = upload_default_color(brw
,
289 texObj
->BorderColor
.f
);
291 key
->sampler_count
= unit
+ 1;
294 struct wm_sampler_entry
*entry
= &key
->sampler
[key
->sampler_count
];
295 memset(last_entry_end
, 0, (char*)entry
- last_entry_end
);
298 /* All samplers must be uploaded in a single contiguous array, which
299 * complicates various things. However, this is still too confusing -
300 * FIXME: simplify all the different new texture state flags.
302 static void upload_wm_samplers( struct brw_context
*brw
)
304 GLcontext
*ctx
= &brw
->intel
.ctx
;
305 struct wm_sampler_key key
;
306 int i
, sampler_key_size
;
308 brw_wm_sampler_populate_key(brw
, &key
);
310 if (brw
->wm
.sampler_count
!= key
.sampler_count
) {
311 brw
->wm
.sampler_count
= key
.sampler_count
;
312 brw
->state
.dirty
.cache
|= CACHE_NEW_SAMPLER
;
315 drm_intel_bo_unreference(brw
->wm
.sampler_bo
);
316 brw
->wm
.sampler_bo
= NULL
;
317 if (brw
->wm
.sampler_count
== 0)
320 /* Only include the populated portion of the key in the search. */
321 sampler_key_size
= offsetof(struct wm_sampler_key
,
322 sampler
[key
.sampler_count
]);
323 brw
->wm
.sampler_bo
= brw_search_cache(&brw
->cache
, BRW_SAMPLER
,
324 &key
, sampler_key_size
,
325 brw
->wm
.sdc_bo
, key
.sampler_count
,
328 /* If we didnt find it in the cache, compute the state and put it in the
331 if (brw
->wm
.sampler_bo
== NULL
) {
332 struct brw_sampler_state sampler
[BRW_MAX_TEX_UNIT
];
334 memset(sampler
, 0, sizeof(sampler
));
335 for (i
= 0; i
< key
.sampler_count
; i
++) {
336 if (brw
->wm
.sdc_bo
[i
] == NULL
)
339 brw_update_sampler_state(brw
, &key
.sampler
[i
], brw
->wm
.sdc_bo
[i
],
343 brw
->wm
.sampler_bo
= brw_upload_cache(&brw
->cache
, BRW_SAMPLER
,
344 &key
, sampler_key_size
,
345 brw
->wm
.sdc_bo
, key
.sampler_count
,
346 &sampler
, sizeof(sampler
));
348 /* Emit SDC relocations */
349 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
350 if (!ctx
->Texture
.Unit
[i
]._ReallyEnabled
)
353 drm_intel_bo_emit_reloc(brw
->wm
.sampler_bo
,
354 i
* sizeof(struct brw_sampler_state
) +
355 offsetof(struct brw_sampler_state
, ss2
),
356 brw
->wm
.sdc_bo
[i
], 0,
357 I915_GEM_DOMAIN_SAMPLER
, 0);
362 const struct brw_tracked_state brw_wm_samplers
= {
364 .mesa
= _NEW_TEXTURE
,
368 .prepare
= upload_wm_samplers
,