src/mesa/drivers/dri/i965/brw_wm_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33
  34 #include "brw_context.h"
  35 #include "brw_state.h"
  36 #include "brw_defines.h"
  37 #include "brw_wm.h"
  38
  39 /***********************************************************************
  40  * WM unit - fragment programs and rasterization
  41  */
  42
  43 struct brw_wm_unit_key {
  44    unsigned int total_grf, total_scratch;
  45    unsigned int urb_entry_read_length;
  46    unsigned int curb_entry_read_length;
  47    unsigned int dispatch_grf_start_reg;
  48
  49    unsigned int curbe_offset;
  50    unsigned int urb_size;
  51
  52    unsigned int max_threads;
  53
  54    unsigned int nr_surfaces, sampler_count;
  55    GLboolean uses_depth, computes_depth, uses_kill, is_glsl;
  56    GLboolean polygon_stipple, stats_wm, line_stipple, offset_enable;
  57    GLfloat offset_units, offset_factor;
  58 };
  59
  60 static void
  61 wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key)
  62 {
  63    GLcontext *ctx = &brw->intel.ctx;
  64    const struct gl_fragment_program *fp = brw->fragment_program;
  65    const struct brw_fragment_program *bfp = (struct brw_fragment_program *) fp;
  66    struct intel_context *intel = &brw->intel;
  67
  68    memset(key, 0, sizeof(*key));
  69
  70    if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
  71       key->max_threads = 1;
  72    else {
  73       /* WM maximum threads is number of EUs times number of threads per EU. */
  74       if (BRW_IS_G4X(brw))
  75          key->max_threads = 10 * 5;
  76       else
  77          key->max_threads = 8 * 4;
  78    }
  79
  80    /* CACHE_NEW_WM_PROG */
  81    key->total_grf = brw->wm.prog_data->total_grf;
  82    key->urb_entry_read_length = brw->wm.prog_data->urb_read_length;
  83    key->curb_entry_read_length = brw->wm.prog_data->curb_read_length;
  84    key->dispatch_grf_start_reg = brw->wm.prog_data->first_curbe_grf;
  85    key->total_scratch = ALIGN(brw->wm.prog_data->total_scratch, 1024);
  86
  87    /* BRW_NEW_URB_FENCE */
  88    key->urb_size = brw->urb.vsize;
  89
  90    /* BRW_NEW_CURBE_OFFSETS */
  91    key->curbe_offset = brw->curbe.wm_start;
  92
  93    /* BRW_NEW_NR_SURFACEs */
  94    key->nr_surfaces = brw->wm.nr_surfaces;
  95
  96    /* CACHE_NEW_SAMPLER */
  97    key->sampler_count = brw->wm.sampler_count;
  98
  99    /* _NEW_POLYGONSTIPPLE */
 100    key->polygon_stipple = ctx->Polygon.StippleFlag;
 101
 102    /* BRW_NEW_FRAGMENT_PROGRAM */
 103    key->uses_depth = (fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
 104
 105    /* as far as we can tell */
 106    key->computes_depth =
 107       (fp->Base.OutputsWritten & (1 << FRAG_RESULT_DEPTH)) != 0;
 108
 109    /* _NEW_COLOR */
 110    key->uses_kill = fp->UsesKill || ctx->Color.AlphaEnabled;
 111    key->is_glsl = bfp->isGLSL;
 112
 113    /* temporary sanity check assertion */
 114    ASSERT(bfp->isGLSL == brw_wm_is_glsl(fp));
 115
 116    /* _NEW_DEPTH */
 117    key->stats_wm = intel->stats_wm;
 118
 119    /* _NEW_LINE */
 120    key->line_stipple = ctx->Line.StippleFlag;
 121
 122    /* _NEW_POLYGON */
 123    key->offset_enable = ctx->Polygon.OffsetFill;
 124    key->offset_units = ctx->Polygon.OffsetUnits;
 125    key->offset_factor = ctx->Polygon.OffsetFactor;
 126 }
 127
 128 /**
 129  * Setup wm hardware state.  See page 225 of Volume 2
 130  */
 131 static dri_bo *
 132 wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
 133                         dri_bo **reloc_bufs)
 134 {
 135    struct brw_wm_unit_state wm;
 136    dri_bo *bo;
 137
 138    memset(&wm, 0, sizeof(wm));
 139
 140    wm.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
 141    wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset >> 6; /* reloc */
 142    wm.thread1.depth_coef_urb_read_offset = 1;
 143    wm.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
 144    wm.thread1.binding_table_entry_count = key->nr_surfaces;
 145
 146    if (key->total_scratch != 0) {
 147       wm.thread2.scratch_space_base_pointer =
 148          brw->wm.scratch_bo->offset >> 10; /* reloc */
 149       wm.thread2.per_thread_scratch_space = key->total_scratch / 1024 - 1;
 150    } else {
 151       wm.thread2.scratch_space_base_pointer = 0;
 152       wm.thread2.per_thread_scratch_space = 0;
 153    }
 154
 155    wm.thread3.dispatch_grf_start_reg = key->dispatch_grf_start_reg;
 156    wm.thread3.urb_entry_read_length = key->urb_entry_read_length;
 157    wm.thread3.urb_entry_read_offset = 0;
 158    wm.thread3.const_urb_entry_read_length = key->curb_entry_read_length;
 159    wm.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
 160
 161    wm.wm4.sampler_count = (key->sampler_count + 1) / 4;
 162    if (brw->wm.sampler_bo != NULL) {
 163       /* reloc */
 164       wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset >> 5;
 165    } else {
 166       wm.wm4.sampler_state_pointer = 0;
 167    }
 168
 169    wm.wm5.program_uses_depth = key->uses_depth;
 170    wm.wm5.program_computes_depth = key->computes_depth;
 171    wm.wm5.program_uses_killpixel = key->uses_kill;
 172
 173    if (key->is_glsl)
 174       wm.wm5.enable_8_pix = 1;
 175    else
 176       wm.wm5.enable_16_pix = 1;
 177
 178    wm.wm5.max_threads = key->max_threads - 1;
 179    wm.wm5.thread_dispatch_enable = 1;   /* AKA: color_write */
 180    wm.wm5.legacy_line_rast = 0;
 181    wm.wm5.legacy_global_depth_bias = 0;
 182    wm.wm5.early_depth_test = 1;         /* never need to disable */
 183    wm.wm5.line_aa_region_width = 0;
 184    wm.wm5.line_endcap_aa_region_width = 1;
 185
 186    wm.wm5.polygon_stipple = key->polygon_stipple;
 187
 188    if (key->offset_enable) {
 189       wm.wm5.depth_offset = 1;
 190       /* Something wierd going on with legacy_global_depth_bias,
 191        * offset_constant, scaling and MRD.  This value passes glean
 192        * but gives some odd results elsewere (eg. the
 193        * quad-offset-units test).
 194        */
 195       wm.global_depth_offset_constant = key->offset_units * 2;
 196
 197       /* This is the only value that passes glean:
 198        */
 199       wm.global_depth_offset_scale = key->offset_factor;
 200    }
 201
 202    wm.wm5.line_stipple = key->line_stipple;
 203
 204    if (INTEL_DEBUG & DEBUG_STATS || key->stats_wm)
 205       wm.wm4.stats_enable = 1;
 206
 207    bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT,
 208                          key, sizeof(*key),
 209                          reloc_bufs, 3,
 210                          &wm, sizeof(wm),
 211                          NULL, NULL);
 212
 213    /* Emit WM program relocation */
 214    dri_bo_emit_reloc(bo,
 215                      I915_GEM_DOMAIN_INSTRUCTION, 0,
 216                      wm.thread0.grf_reg_count << 1,
 217                      offsetof(struct brw_wm_unit_state, thread0),
 218                      brw->wm.prog_bo);
 219
 220    /* Emit scratch space relocation */
 221    if (key->total_scratch != 0) {
 222       dri_bo_emit_reloc(bo,
 223                         0, 0,
 224                         wm.thread2.per_thread_scratch_space,
 225                         offsetof(struct brw_wm_unit_state, thread2),
 226                         brw->wm.scratch_bo);
 227    }
 228
 229    /* Emit sampler state relocation */
 230    if (key->sampler_count != 0) {
 231       dri_bo_emit_reloc(bo,
 232                         I915_GEM_DOMAIN_INSTRUCTION, 0,
 233                         wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
 234                         offsetof(struct brw_wm_unit_state, wm4),
 235                         brw->wm.sampler_bo);
 236    }
 237
 238    return bo;
 239 }
 240
 241
 242 static void upload_wm_unit( struct brw_context *brw )
 243 {
 244    struct intel_context *intel = &brw->intel;
 245    struct brw_wm_unit_key key;
 246    dri_bo *reloc_bufs[3];
 247    wm_unit_populate_key(brw, &key);
 248
 249    /* Allocate the necessary scratch space if we haven't already.  Don't
 250     * bother reducing the allocation later, since we use scratch so
 251     * rarely.
 252     */
 253    assert(key.total_scratch <= 12 * 1024);
 254    if (key.total_scratch) {
 255       GLuint total = key.total_scratch * key.max_threads;
 256
 257       if (brw->wm.scratch_bo && total > brw->wm.scratch_bo->size) {
 258          dri_bo_unreference(brw->wm.scratch_bo);
 259          brw->wm.scratch_bo = NULL;
 260       }
 261       if (brw->wm.scratch_bo == NULL) {
 262          brw->wm.scratch_bo = dri_bo_alloc(intel->bufmgr,
 263                                            "wm scratch",
 264                                            total,
 265                                            4096);
 266       }
 267    }
 268
 269    reloc_bufs[0] = brw->wm.prog_bo;
 270    reloc_bufs[1] = brw->wm.scratch_bo;
 271    reloc_bufs[2] = brw->wm.sampler_bo;
 272
 273    dri_bo_unreference(brw->wm.state_bo);
 274    brw->wm.state_bo = brw_search_cache(&brw->cache, BRW_WM_UNIT,
 275                                        &key, sizeof(key),
 276                                        reloc_bufs, 3,
 277                                        NULL);
 278    if (brw->wm.state_bo == NULL) {
 279       brw->wm.state_bo = wm_unit_create_from_key(brw, &key, reloc_bufs);
 280    }
 281 }
 282
 283 const struct brw_tracked_state brw_wm_unit = {
 284    .dirty = {
 285       .mesa = (_NEW_POLYGON |
 286                _NEW_POLYGONSTIPPLE |
 287                _NEW_LINE |
 288                _NEW_COLOR |
 289                _NEW_DEPTH),
 290
 291       .brw = (BRW_NEW_FRAGMENT_PROGRAM |
 292               BRW_NEW_CURBE_OFFSETS |
 293               BRW_NEW_NR_WM_SURFACES),
 294
 295       .cache = (CACHE_NEW_WM_PROG |
 296                 CACHE_NEW_SAMPLER)
 297    },
 298    .prepare = upload_wm_unit,
 299 };
 300