i965: Update WM maximum threads for G4X.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm_state.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33
34 #include "brw_context.h"
35 #include "brw_state.h"
36 #include "brw_defines.h"
37 #include "brw_wm.h"
38
39 /***********************************************************************
40 * WM unit - fragment programs and rasterization
41 */
42
43 struct brw_wm_unit_key {
44 unsigned int total_grf, total_scratch;
45 unsigned int urb_entry_read_length;
46 unsigned int curb_entry_read_length;
47 unsigned int dispatch_grf_start_reg;
48
49 unsigned int curbe_offset;
50 unsigned int urb_size;
51
52 unsigned int max_threads;
53
54 unsigned int nr_surfaces, sampler_count;
55 GLboolean uses_depth, computes_depth, uses_kill, is_glsl;
56 GLboolean polygon_stipple, stats_wm, line_stipple, offset_enable;
57 GLfloat offset_units, offset_factor;
58 };
59
60 static void
61 wm_unit_populate_key(struct brw_context *brw, struct brw_wm_unit_key *key)
62 {
63 const struct gl_fragment_program *fp = brw->fragment_program;
64 struct intel_context *intel = &brw->intel;
65
66 memset(key, 0, sizeof(*key));
67
68 if (INTEL_DEBUG & DEBUG_SINGLE_THREAD)
69 key->max_threads = 1;
70 else {
71 /* WM maximum threads is number of EUs times number of threads per EU. */
72 if (BRW_IS_G4X(brw))
73 key->max_threads = 10 * 5;
74 else
75 key->max_threads = 8 * 4;
76 }
77
78 /* CACHE_NEW_WM_PROG */
79 key->total_grf = brw->wm.prog_data->total_grf;
80 key->urb_entry_read_length = brw->wm.prog_data->urb_read_length;
81 key->curb_entry_read_length = brw->wm.prog_data->curb_read_length;
82 key->dispatch_grf_start_reg = brw->wm.prog_data->first_curbe_grf;
83 key->total_scratch = ALIGN(brw->wm.prog_data->total_scratch, 1024);
84
85 /* BRW_NEW_URB_FENCE */
86 key->urb_size = brw->urb.vsize;
87
88 /* BRW_NEW_CURBE_OFFSETS */
89 key->curbe_offset = brw->curbe.wm_start;
90
91 /* CACHE_NEW_SURFACE */
92 key->nr_surfaces = brw->wm.nr_surfaces;
93
94 /* CACHE_NEW_SAMPLER */
95 key->sampler_count = brw->wm.sampler_count;
96
97 /* _NEW_POLYGONSTIPPLE */
98 key->polygon_stipple = brw->attribs.Polygon->StippleFlag;
99
100 /* BRW_NEW_FRAGMENT_PROGRAM */
101 key->uses_depth = (fp->Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
102
103 /* as far as we can tell */
104 key->computes_depth =
105 (fp->Base.OutputsWritten & (1 << FRAG_RESULT_DEPR)) != 0;
106
107 /* _NEW_COLOR */
108 key->uses_kill = fp->UsesKill || brw->attribs.Color->AlphaEnabled;
109 key->is_glsl = brw_wm_is_glsl(fp);
110
111 /* XXX: This needs a flag to indicate when it changes. */
112 key->stats_wm = intel->stats_wm;
113
114 /* _NEW_LINE */
115 key->line_stipple = brw->attribs.Line->StippleFlag;
116
117 /* _NEW_POLYGON */
118 key->offset_enable = brw->attribs.Polygon->OffsetFill;
119 key->offset_units = brw->attribs.Polygon->OffsetUnits;
120 key->offset_factor = brw->attribs.Polygon->OffsetFactor;
121 }
122
123 static dri_bo *
124 wm_unit_create_from_key(struct brw_context *brw, struct brw_wm_unit_key *key,
125 dri_bo **reloc_bufs)
126 {
127 struct brw_wm_unit_state wm;
128 dri_bo *bo;
129
130 memset(&wm, 0, sizeof(wm));
131
132 wm.thread0.grf_reg_count = ALIGN(key->total_grf, 16) / 16 - 1;
133 wm.thread0.kernel_start_pointer = brw->wm.prog_bo->offset >> 6; /* reloc */
134 wm.thread1.depth_coef_urb_read_offset = 1;
135 wm.thread1.floating_point_mode = BRW_FLOATING_POINT_NON_IEEE_754;
136 wm.thread1.binding_table_entry_count = key->nr_surfaces;
137
138 if (key->total_scratch != 0) {
139 wm.thread2.scratch_space_base_pointer =
140 brw->wm.scratch_buffer->offset >> 10; /* reloc */
141 wm.thread2.per_thread_scratch_space = key->total_scratch / 1024 - 1;
142 } else {
143 wm.thread2.scratch_space_base_pointer = 0;
144 wm.thread2.per_thread_scratch_space = 0;
145 }
146
147 wm.thread3.dispatch_grf_start_reg = key->dispatch_grf_start_reg;
148 wm.thread3.urb_entry_read_length = key->urb_entry_read_length;
149 wm.thread3.const_urb_entry_read_length = key->curb_entry_read_length;
150 wm.thread3.const_urb_entry_read_offset = key->curbe_offset * 2;
151 wm.thread3.urb_entry_read_offset = 0;
152
153 wm.wm4.sampler_count = (key->sampler_count + 1) / 4;
154 if (brw->wm.sampler_bo != NULL) {
155 /* reloc */
156 wm.wm4.sampler_state_pointer = brw->wm.sampler_bo->offset >> 5;
157 } else {
158 wm.wm4.sampler_state_pointer = 0;
159 }
160
161 wm.wm5.program_uses_depth = key->uses_depth;
162 wm.wm5.program_computes_depth = key->computes_depth;
163 wm.wm5.program_uses_killpixel = key->uses_kill;
164
165 if (key->is_glsl)
166 wm.wm5.enable_8_pix = 1;
167 else
168 wm.wm5.enable_16_pix = 1;
169
170 wm.wm5.max_threads = key->max_threads - 1;
171 wm.wm5.thread_dispatch_enable = 1; /* AKA: color_write */
172 wm.wm5.legacy_line_rast = 0;
173 wm.wm5.legacy_global_depth_bias = 0;
174 wm.wm5.early_depth_test = 1; /* never need to disable */
175 wm.wm5.line_aa_region_width = 0;
176 wm.wm5.line_endcap_aa_region_width = 1;
177
178 wm.wm5.polygon_stipple = key->polygon_stipple;
179
180 if (key->offset_enable) {
181 wm.wm5.depth_offset = 1;
182 /* Something wierd going on with legacy_global_depth_bias,
183 * offset_constant, scaling and MRD. This value passes glean
184 * but gives some odd results elsewere (eg. the
185 * quad-offset-units test).
186 */
187 wm.global_depth_offset_constant = key->offset_units * 2;
188
189 /* This is the only value that passes glean:
190 */
191 wm.global_depth_offset_scale = key->offset_factor;
192 }
193
194 wm.wm5.line_stipple = key->line_stipple;
195
196 if (INTEL_DEBUG & DEBUG_STATS || key->stats_wm)
197 wm.wm4.stats_enable = 1;
198
199 bo = brw_upload_cache(&brw->cache, BRW_WM_UNIT,
200 key, sizeof(*key),
201 reloc_bufs, 3,
202 &wm, sizeof(wm),
203 NULL, NULL);
204
205 /* Emit WM program relocation */
206 dri_bo_emit_reloc(bo,
207 I915_GEM_DOMAIN_INSTRUCTION, 0,
208 wm.thread0.grf_reg_count << 1,
209 offsetof(struct brw_wm_unit_state, thread0),
210 brw->wm.prog_bo);
211
212 /* Emit scratch space relocation */
213 if (key->total_scratch != 0) {
214 dri_bo_emit_reloc(bo,
215 0, 0,
216 wm.thread2.per_thread_scratch_space,
217 offsetof(struct brw_wm_unit_state, thread2),
218 brw->wm.scratch_buffer);
219 }
220
221 /* Emit sampler state relocation */
222 if (key->sampler_count != 0) {
223 dri_bo_emit_reloc(bo,
224 I915_GEM_DOMAIN_INSTRUCTION, 0,
225 wm.wm4.stats_enable | (wm.wm4.sampler_count << 2),
226 offsetof(struct brw_wm_unit_state, wm4),
227 brw->wm.sampler_bo);
228 }
229
230 return bo;
231 }
232
233
234 static void upload_wm_unit( struct brw_context *brw )
235 {
236 struct intel_context *intel = &brw->intel;
237 struct brw_wm_unit_key key;
238 dri_bo *reloc_bufs[3];
239 wm_unit_populate_key(brw, &key);
240
241 /* Allocate the necessary scratch space if we haven't already. Don't
242 * bother reducing the allocation later, since we use scratch so
243 * rarely.
244 */
245 assert(key.total_scratch <= 12 * 1024);
246 if (key.total_scratch) {
247 GLuint total = key.total_scratch * key.max_threads;
248
249 if (brw->wm.scratch_buffer && total > brw->wm.scratch_buffer->size) {
250 dri_bo_unreference(brw->wm.scratch_buffer);
251 brw->wm.scratch_buffer = NULL;
252 }
253 if (brw->wm.scratch_buffer == NULL) {
254 brw->wm.scratch_buffer = dri_bo_alloc(intel->bufmgr,
255 "wm scratch",
256 total,
257 4096);
258 }
259 }
260
261 reloc_bufs[0] = brw->wm.prog_bo;
262 reloc_bufs[1] = brw->wm.scratch_buffer;
263 reloc_bufs[2] = brw->wm.sampler_bo;
264
265 dri_bo_unreference(brw->wm.state_bo);
266 brw->wm.state_bo = brw_search_cache(&brw->cache, BRW_WM_UNIT,
267 &key, sizeof(key),
268 reloc_bufs, 3,
269 NULL);
270 if (brw->wm.state_bo == NULL) {
271 brw->wm.state_bo = wm_unit_create_from_key(brw, &key, reloc_bufs);
272 }
273 }
274
275 const struct brw_tracked_state brw_wm_unit = {
276 .dirty = {
277 .mesa = (_NEW_POLYGON |
278 _NEW_POLYGONSTIPPLE |
279 _NEW_LINE |
280 _NEW_COLOR),
281
282 .brw = (BRW_NEW_FRAGMENT_PROGRAM |
283 BRW_NEW_CURBE_OFFSETS |
284 BRW_NEW_LOCK),
285
286 .cache = (CACHE_NEW_SURFACE |
287 CACHE_NEW_WM_PROG |
288 CACHE_NEW_SAMPLER)
289 },
290 .prepare = upload_wm_unit,
291 };
292