Minor r200 vertex program cleanups. Remove disabled leftovers from r300 vertex progra...
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm_surface_state.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "mtypes.h"
34 #include "texformat.h"
35 #include "texstore.h"
36
37 #include "intel_mipmap_tree.h"
38 #include "intel_batchbuffer.h"
39 #include "intel_tex.h"
40
41
42 #include "brw_context.h"
43 #include "brw_state.h"
44 #include "brw_defines.h"
45
46
47 static GLuint translate_tex_target( GLenum target )
48 {
49 switch (target) {
50 case GL_TEXTURE_1D:
51 return BRW_SURFACE_1D;
52
53 case GL_TEXTURE_RECTANGLE_NV:
54 return BRW_SURFACE_2D;
55
56 case GL_TEXTURE_2D:
57 return BRW_SURFACE_2D;
58
59 case GL_TEXTURE_3D:
60 return BRW_SURFACE_3D;
61
62 case GL_TEXTURE_CUBE_MAP:
63 return BRW_SURFACE_CUBE;
64
65 default:
66 assert(0);
67 return 0;
68 }
69 }
70
71
72 static GLuint translate_tex_format( GLuint mesa_format )
73 {
74 switch( mesa_format ) {
75 case MESA_FORMAT_L8:
76 return BRW_SURFACEFORMAT_L8_UNORM;
77
78 case MESA_FORMAT_I8:
79 return BRW_SURFACEFORMAT_I8_UNORM;
80
81 case MESA_FORMAT_A8:
82 return BRW_SURFACEFORMAT_A8_UNORM;
83
84 case MESA_FORMAT_AL88:
85 return BRW_SURFACEFORMAT_L8A8_UNORM;
86
87 case MESA_FORMAT_RGB888:
88 return BRW_SURFACEFORMAT_R8G8B8_UNORM;
89
90 case MESA_FORMAT_ARGB8888:
91 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
92
93 case MESA_FORMAT_RGBA8888_REV:
94 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
95
96 case MESA_FORMAT_YCBCR_REV:
97 return BRW_SURFACEFORMAT_YCRCB_NORMAL;
98
99 case MESA_FORMAT_YCBCR:
100 return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
101
102 case MESA_FORMAT_RGB_FXT1:
103 case MESA_FORMAT_RGBA_FXT1:
104 return BRW_SURFACEFORMAT_FXT1;
105
106 case MESA_FORMAT_Z16:
107 return BRW_SURFACEFORMAT_L16_UNORM;
108
109 case MESA_FORMAT_RGBA_DXT1:
110 case MESA_FORMAT_RGB_DXT1:
111 return BRW_SURFACEFORMAT_DXT1_RGB;
112
113 default:
114 assert(0);
115 return 0;
116 }
117 }
118
119 static
120 void brw_update_texture_surface( GLcontext *ctx,
121 GLuint unit,
122 struct brw_surface_state *surf )
123 {
124 struct intel_context *intel = intel_context(ctx);
125 struct brw_context *brw = brw_context(ctx);
126 struct gl_texture_object *tObj = brw->attribs.Texture->Unit[unit]._Current;
127 struct intel_texture_object *intelObj = intel_texture_object(tObj);
128 struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
129
130 memset(surf, 0, sizeof(*surf));
131
132 surf->ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
133 surf->ss0.surface_type = translate_tex_target(tObj->Target);
134 surf->ss0.surface_format = translate_tex_format(firstImage->TexFormat->MesaFormat);
135
136 /* This is ok for all textures with channel width 8bit or less:
137 */
138 /* surf->ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
139
140 surf->ss1.base_addr = bmBufferOffset(intel,
141 intelObj->mt->region->buffer);
142
143 surf->ss2.mip_count = intelObj->lastLevel - intelObj->firstLevel;
144 surf->ss2.width = firstImage->Width - 1;
145 surf->ss2.height = firstImage->Height - 1;
146
147 surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
148 surf->ss3.tiled_surface = intelObj->mt->region->tiled; /* always zero */
149 surf->ss3.pitch = (intelObj->mt->pitch * intelObj->mt->cpp) - 1;
150 surf->ss3.depth = firstImage->Depth - 1;
151
152 surf->ss4.min_lod = 0;
153
154 if (tObj->Target == GL_TEXTURE_CUBE_MAP) {
155 surf->ss0.cube_pos_x = 1;
156 surf->ss0.cube_pos_y = 1;
157 surf->ss0.cube_pos_z = 1;
158 surf->ss0.cube_neg_x = 1;
159 surf->ss0.cube_neg_y = 1;
160 surf->ss0.cube_neg_z = 1;
161 }
162 }
163
164
165
166 #define OFFSET(TYPE, FIELD) ( (GLuint)&(((TYPE *)0)->FIELD) )
167
168
169 static void upload_wm_surfaces(struct brw_context *brw )
170 {
171 GLcontext *ctx = &brw->intel.ctx;
172 struct intel_context *intel = &brw->intel;
173 struct brw_surface_binding_table bind;
174 GLuint i;
175
176 memcpy(&bind, &brw->wm.bind, sizeof(bind));
177
178 {
179 struct brw_surface_state surf;
180 struct intel_region *region = brw->state.draw_region;
181
182 memset(&surf, 0, sizeof(surf));
183
184 if (region->cpp == 4)
185 surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
186 else
187 surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
188
189 surf.ss0.surface_type = BRW_SURFACE_2D;
190
191 /* _NEW_COLOR */
192 surf.ss0.color_blend = (!brw->attribs.Color->_LogicOpEnabled &&
193 brw->attribs.Color->BlendEnabled);
194
195
196 surf.ss0.writedisable_red = !brw->attribs.Color->ColorMask[0];
197 surf.ss0.writedisable_green = !brw->attribs.Color->ColorMask[1];
198 surf.ss0.writedisable_blue = !brw->attribs.Color->ColorMask[2];
199 surf.ss0.writedisable_alpha = !brw->attribs.Color->ColorMask[3];
200
201 surf.ss1.base_addr = bmBufferOffset(&brw->intel, region->buffer);
202
203
204 surf.ss2.width = region->pitch - 1; /* XXX: not really! */
205 surf.ss2.height = region->height - 1;
206 surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
207 surf.ss3.tiled_surface = region->tiled;
208 surf.ss3.pitch = (region->pitch * region->cpp) - 1;
209
210 brw->wm.bind.surf_ss_offset[0] = brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf );
211 brw->wm.nr_surfaces = 1;
212 }
213
214
215 for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
216 struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i];
217
218 /* _NEW_TEXTURE, BRW_NEW_TEXDATA
219 */
220 if (texUnit->_ReallyEnabled &&
221 intel_finalize_mipmap_tree(intel,texUnit->_Current)) {
222
223 struct brw_surface_state surf;
224
225 brw_update_texture_surface(ctx, i, &surf);
226
227 brw->wm.bind.surf_ss_offset[i+1] = brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf );
228 brw->wm.nr_surfaces = i+2;
229 }
230 else {
231 brw->wm.bind.surf_ss_offset[i+1] = 0;
232 }
233 }
234
235 brw->wm.bind_ss_offset = brw_cache_data( &brw->cache[BRW_SS_SURF_BIND],
236 &brw->wm.bind );
237 }
238
239 const struct brw_tracked_state brw_wm_surfaces = {
240 .dirty = {
241 .mesa = _NEW_COLOR | _NEW_TEXTURE | _NEW_BUFFERS,
242 .brw = (BRW_NEW_CONTEXT |
243 BRW_NEW_FENCE), /* required for bmBufferOffset */
244 .cache = 0
245 },
246 .update = upload_wm_surfaces
247 };
248
249
250