src/mesa/drivers/dri/i965/brw_wm_surface_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/mtypes.h"
  34 #include "main/texformat.h"
  35 #include "main/texstore.h"
  36
  37 #include "intel_mipmap_tree.h"
  38 #include "intel_batchbuffer.h"
  39 #include "intel_tex.h"
  40
  41
  42 #include "brw_context.h"
  43 #include "brw_state.h"
  44 #include "brw_defines.h"
  45
  46
  47 static GLuint translate_tex_target( GLenum target )
  48 {
  49    switch (target) {
  50    case GL_TEXTURE_1D:
  51       return BRW_SURFACE_1D;
  52
  53    case GL_TEXTURE_RECTANGLE_NV:
  54       return BRW_SURFACE_2D;
  55
  56    case GL_TEXTURE_2D:
  57       return BRW_SURFACE_2D;
  58
  59    case GL_TEXTURE_3D:
  60       return BRW_SURFACE_3D;
  61
  62    case GL_TEXTURE_CUBE_MAP:
  63       return BRW_SURFACE_CUBE;
  64
  65    default:
  66       assert(0);
  67       return 0;
  68    }
  69 }
  70
  71
  72 static GLuint translate_tex_format( GLuint mesa_format, GLenum depth_mode )
  73 {
  74    switch( mesa_format ) {
  75    case MESA_FORMAT_L8:
  76       return BRW_SURFACEFORMAT_L8_UNORM;
  77
  78    case MESA_FORMAT_I8:
  79       return BRW_SURFACEFORMAT_I8_UNORM;
  80
  81    case MESA_FORMAT_A8:
  82       return BRW_SURFACEFORMAT_A8_UNORM;
  83
  84    case MESA_FORMAT_AL88:
  85       return BRW_SURFACEFORMAT_L8A8_UNORM;
  86
  87    case MESA_FORMAT_RGB888:
  88       assert(0);                /* not supported for sampling */
  89       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
  90
  91    case MESA_FORMAT_ARGB8888:
  92       return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  93
  94    case MESA_FORMAT_RGBA8888_REV:
  95       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
  96
  97    case MESA_FORMAT_RGB565:
  98       return BRW_SURFACEFORMAT_B5G6R5_UNORM;
  99
 100    case MESA_FORMAT_ARGB1555:
 101       return BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
 102
 103    case MESA_FORMAT_ARGB4444:
 104       return BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
 105
 106    case MESA_FORMAT_YCBCR_REV:
 107       return BRW_SURFACEFORMAT_YCRCB_NORMAL;
 108
 109    case MESA_FORMAT_YCBCR:
 110       return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
 111
 112    case MESA_FORMAT_RGB_FXT1:
 113    case MESA_FORMAT_RGBA_FXT1:
 114       return BRW_SURFACEFORMAT_FXT1;
 115
 116    case MESA_FORMAT_Z16:
 117       if (depth_mode == GL_INTENSITY)
 118           return BRW_SURFACEFORMAT_I16_UNORM;
 119       else if (depth_mode == GL_ALPHA)
 120           return BRW_SURFACEFORMAT_A16_UNORM;
 121       else
 122           return BRW_SURFACEFORMAT_L16_UNORM;
 123
 124    case MESA_FORMAT_RGB_DXT1:
 125        return BRW_SURFACEFORMAT_DXT1_RGB;
 126
 127    case MESA_FORMAT_RGBA_DXT1:
 128        return BRW_SURFACEFORMAT_BC1_UNORM;
 129
 130    case MESA_FORMAT_RGBA_DXT3:
 131        return BRW_SURFACEFORMAT_BC2_UNORM;
 132
 133    case MESA_FORMAT_RGBA_DXT5:
 134        return BRW_SURFACEFORMAT_BC3_UNORM;
 135
 136    case MESA_FORMAT_SRGBA8:
 137       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
 138    case MESA_FORMAT_SRGB_DXT1:
 139       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 140
 141    case MESA_FORMAT_S8_Z24:
 142       return BRW_SURFACEFORMAT_I24X8_UNORM;
 143
 144    default:
 145       assert(0);
 146       return 0;
 147    }
 148 }
 149
 150 struct brw_wm_surface_key {
 151    GLenum target, depthmode;
 152    dri_bo *bo;
 153    GLint format;
 154    GLint first_level, last_level;
 155    GLint width, height, depth;
 156    GLint pitch, cpp;
 157    uint32_t tiling;
 158    GLuint offset;
 159 };
 160
 161 static void
 162 brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling)
 163 {
 164    switch (tiling) {
 165    case I915_TILING_NONE:
 166       surf->ss3.tiled_surface = 0;
 167       surf->ss3.tile_walk = 0;
 168       break;
 169    case I915_TILING_X:
 170       surf->ss3.tiled_surface = 1;
 171       surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 172       break;
 173    case I915_TILING_Y:
 174       surf->ss3.tiled_surface = 1;
 175       surf->ss3.tile_walk = BRW_TILEWALK_YMAJOR;
 176       break;
 177    }
 178 }
 179
 180 static dri_bo *
 181 brw_create_texture_surface( struct brw_context *brw,
 182                             struct brw_wm_surface_key *key )
 183 {
 184    struct brw_surface_state surf;
 185    dri_bo *bo;
 186
 187    memset(&surf, 0, sizeof(surf));
 188
 189    surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 190    surf.ss0.surface_type = translate_tex_target(key->target);
 191
 192    if (key->bo)
 193       surf.ss0.surface_format = translate_tex_format(key->format, key->depthmode);
 194    else {
 195      switch(key->depth) {
 196      case 32: surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; break;
 197      default:
 198      case 24: surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM; break;
 199      case 16: surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; break;
 200      }
 201    }
 202
 203    /* This is ok for all textures with channel width 8bit or less:
 204     */
 205 /*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 206    if (key->bo)
 207      surf.ss1.base_addr = key->bo->offset; /* reloc */
 208    else
 209      surf.ss1.base_addr = key->offset;
 210
 211    surf.ss2.mip_count = key->last_level - key->first_level;
 212    surf.ss2.width = key->width - 1;
 213    surf.ss2.height = key->height - 1;
 214    brw_set_surface_tiling(&surf, key->tiling);
 215    surf.ss3.pitch = (key->pitch * key->cpp) - 1;
 216    surf.ss3.depth = key->depth - 1;
 217
 218    surf.ss4.min_lod = 0;
 219
 220    if (key->target == GL_TEXTURE_CUBE_MAP) {
 221       surf.ss0.cube_pos_x = 1;
 222       surf.ss0.cube_pos_y = 1;
 223       surf.ss0.cube_pos_z = 1;
 224       surf.ss0.cube_neg_x = 1;
 225       surf.ss0.cube_neg_y = 1;
 226       surf.ss0.cube_neg_z = 1;
 227    }
 228
 229    bo = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 230                          key, sizeof(*key),
 231                          &key->bo, key->bo ? 1 : 0,
 232                          &surf, sizeof(surf),
 233                          NULL, NULL);
 234
 235    if (key->bo) {
 236       /* Emit relocation to surface contents */
 237       dri_bo_emit_reloc(bo,
 238                         I915_GEM_DOMAIN_SAMPLER, 0,
 239                         0,
 240                         offsetof(struct brw_surface_state, ss1),
 241                         key->bo);
 242    }
 243    return bo;
 244 }
 245
 246 static void
 247 brw_update_texture_surface( GLcontext *ctx, GLuint unit )
 248 {
 249    struct brw_context *brw = brw_context(ctx);
 250    struct gl_texture_object *tObj = brw->attribs.Texture->Unit[unit]._Current;
 251    struct intel_texture_object *intelObj = intel_texture_object(tObj);
 252    struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
 253    struct brw_wm_surface_key key;
 254
 255    memset(&key, 0, sizeof(key));
 256
 257    if (intelObj->imageOverride) {
 258       key.pitch = intelObj->pitchOverride / intelObj->mt->cpp;
 259       key.depth = intelObj->depthOverride;
 260       key.bo = NULL;
 261       key.offset = intelObj->textureOffset;
 262    } else {
 263       key.format = firstImage->TexFormat->MesaFormat;
 264       key.pitch = intelObj->mt->pitch;
 265       key.depth = firstImage->Depth;
 266       key.bo = intelObj->mt->region->buffer;
 267       key.offset = 0;
 268    }
 269
 270    key.target = tObj->Target;
 271    key.depthmode = tObj->DepthMode;
 272    key.first_level = intelObj->firstLevel;
 273    key.last_level = intelObj->lastLevel;
 274    key.width = firstImage->Width;
 275    key.height = firstImage->Height;
 276    key.cpp = intelObj->mt->cpp;
 277    key.tiling = intelObj->mt->region->tiling;
 278
 279    dri_bo_unreference(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
 280    brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 281                                                                &key, sizeof(key),
 282                                                                &key.bo, key.bo ? 1 : 0,
 283                                                                NULL);
 284    if (brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] == NULL) {
 285       brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_create_texture_surface(brw, &key);
 286    }
 287 }
 288
 289 /**
 290  * Sets up a surface state structure to point at the given region.
 291  * While it is only used for the front/back buffer currently, it should be
 292  * usable for further buffers when doing ARB_draw_buffer support.
 293  */
 294 static void
 295 brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
 296                           unsigned int unit, GLboolean cached)
 297 {
 298    dri_bo *region_bo = NULL;
 299    struct {
 300       unsigned int surface_type;
 301       unsigned int surface_format;
 302       unsigned int width, height, cpp;
 303       GLubyte color_mask[4];
 304       GLboolean color_blend;
 305       uint32_t tiling;
 306    } key;
 307
 308    memset(&key, 0, sizeof(key));
 309
 310    if (region != NULL) {
 311       region_bo = region->buffer;
 312
 313       key.surface_type = BRW_SURFACE_2D;
 314       if (region->cpp == 4)
 315          key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 316       else
 317          key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 318       key.tiling = region->tiling;
 319       key.width = region->pitch; /* XXX: not really! */
 320       key.height = region->height;
 321       key.cpp = region->cpp;
 322    } else {
 323       key.surface_type = BRW_SURFACE_NULL;
 324       key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 325       key.tiling = 0;
 326       key.width = 1;
 327       key.height = 1;
 328       key.cpp = 4;
 329    }
 330    memcpy(key.color_mask, brw->attribs.Color->ColorMask,
 331           sizeof(key.color_mask));
 332    key.color_blend = (!brw->attribs.Color->_LogicOpEnabled &&
 333                       brw->attribs.Color->BlendEnabled);
 334
 335    dri_bo_unreference(brw->wm.surf_bo[unit]);
 336    brw->wm.surf_bo[unit] = NULL;
 337    if (cached)
 338        brw->wm.surf_bo[unit] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 339                &key, sizeof(key),
 340                &region_bo, 1,
 341                NULL);
 342
 343    if (brw->wm.surf_bo[unit] == NULL) {
 344       struct brw_surface_state surf;
 345
 346       memset(&surf, 0, sizeof(surf));
 347
 348       surf.ss0.surface_format = key.surface_format;
 349       surf.ss0.surface_type = key.surface_type;
 350       if (region_bo != NULL)
 351          surf.ss1.base_addr = region_bo->offset; /* reloc */
 352
 353       surf.ss2.width = key.width - 1;
 354       surf.ss2.height = key.height - 1;
 355       brw_set_surface_tiling(&surf, key.tiling);
 356       surf.ss3.pitch = (key.width * key.cpp) - 1;
 357
 358       /* _NEW_COLOR */
 359       surf.ss0.color_blend = key.color_blend;
 360       surf.ss0.writedisable_red =   !key.color_mask[0];
 361       surf.ss0.writedisable_green = !key.color_mask[1];
 362       surf.ss0.writedisable_blue =  !key.color_mask[2];
 363       surf.ss0.writedisable_alpha = !key.color_mask[3];
 364
 365       /* Key size will never match key size for textures, so we're safe. */
 366       brw->wm.surf_bo[unit] = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 367                                               &key, sizeof(key),
 368                                                &region_bo, 1,
 369                                                &surf, sizeof(surf),
 370                                                NULL, NULL);
 371       if (region_bo != NULL) {
 372          /* We might sample from it, and we might render to it, so flag
 373           * them both.  We might be able to figure out from other state
 374           * a more restrictive relocation to emit.
 375           */
 376          dri_bo_emit_reloc(brw->wm.surf_bo[unit],
 377                            I915_GEM_DOMAIN_RENDER |
 378                            I915_GEM_DOMAIN_SAMPLER,
 379                            I915_GEM_DOMAIN_RENDER,
 380                            0,
 381                            offsetof(struct brw_surface_state, ss1),
 382                            region_bo);
 383       }
 384    }
 385 }
 386
 387
 388 /**
 389  * Constructs the binding table for the WM surface state, which maps unit
 390  * numbers to surface state objects.
 391  */
 392 static dri_bo *
 393 brw_wm_get_binding_table(struct brw_context *brw)
 394 {
 395    dri_bo *bind_bo;
 396
 397    bind_bo = brw_search_cache(&brw->cache, BRW_SS_SURF_BIND,
 398                               NULL, 0,
 399                               brw->wm.surf_bo, brw->wm.nr_surfaces,
 400                               NULL);
 401
 402    if (bind_bo == NULL) {
 403       GLuint data_size = brw->wm.nr_surfaces * sizeof(GLuint);
 404       uint32_t *data = malloc(data_size);
 405       int i;
 406
 407       for (i = 0; i < brw->wm.nr_surfaces; i++)
 408          if (brw->wm.surf_bo[i])
 409             data[i] = brw->wm.surf_bo[i]->offset;
 410          else
 411             data[i] = 0;
 412
 413       bind_bo = brw_upload_cache( &brw->cache, BRW_SS_SURF_BIND,
 414                                   NULL, 0,
 415                                   brw->wm.surf_bo, brw->wm.nr_surfaces,
 416                                   data, data_size,
 417                                   NULL, NULL);
 418
 419       /* Emit binding table relocations to surface state */
 420       for (i = 0; i < BRW_WM_MAX_SURF; i++) {
 421          if (brw->wm.surf_bo[i] != NULL) {
 422             dri_bo_emit_reloc(bind_bo,
 423                               I915_GEM_DOMAIN_INSTRUCTION, 0,
 424                               0,
 425                               i * sizeof(GLuint),
 426                               brw->wm.surf_bo[i]);
 427          }
 428       }
 429
 430       free(data);
 431    }
 432
 433    return bind_bo;
 434 }
 435
 436 static void prepare_wm_surfaces(struct brw_context *brw )
 437 {
 438    GLcontext *ctx = &brw->intel.ctx;
 439    struct intel_context *intel = &brw->intel;
 440    GLuint i;
 441    int old_nr_surfaces;
 442
 443    if (brw->state.nr_draw_regions  > 1) {
 444       for (i = 0; i < brw->state.nr_draw_regions; i++) {
 445          brw_update_region_surface(brw, brw->state.draw_regions[i], i,
 446                                    GL_FALSE);
 447       }
 448    }else {
 449       brw_update_region_surface(brw, brw->state.draw_regions[0], 0, GL_TRUE);
 450    }
 451
 452    old_nr_surfaces = brw->wm.nr_surfaces;
 453    brw->wm.nr_surfaces = MAX_DRAW_BUFFERS;
 454
 455    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 456       struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i];
 457
 458       /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
 459       if(texUnit->_ReallyEnabled) {
 460          if (texUnit->_Current == intel->frame_buffer_texobj) {
 461             dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 462             brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = brw->wm.surf_bo[0];
 463             dri_bo_reference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 464             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 465          } else {
 466             brw_update_texture_surface(ctx, i);
 467             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 468          }
 469       } else {
 470          dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 471          brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = NULL;
 472       }
 473
 474    }
 475
 476    dri_bo_unreference(brw->wm.bind_bo);
 477    brw->wm.bind_bo = brw_wm_get_binding_table(brw);
 478
 479    if (brw->wm.nr_surfaces != old_nr_surfaces)
 480       brw->state.dirty.brw |= BRW_NEW_NR_SURFACES;
 481 }
 482
 483
 484 const struct brw_tracked_state brw_wm_surfaces = {
 485    .dirty = {
 486       .mesa = _NEW_COLOR | _NEW_TEXTURE | _NEW_BUFFERS,
 487       .brw = BRW_NEW_CONTEXT,
 488       .cache = 0
 489    },
 490    .prepare = prepare_wm_surfaces,
 491 };
 492
 493
 494