src/mesa/drivers/dri/i965/brw_wm_surface_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "mtypes.h"
  34 #include "texformat.h"
  35 #include "texstore.h"
  36
  37 #include "intel_mipmap_tree.h"
  38 #include "intel_batchbuffer.h"
  39 #include "intel_tex.h"
  40
  41
  42 #include "brw_context.h"
  43 #include "brw_state.h"
  44 #include "brw_defines.h"
  45
  46
  47 static GLuint translate_tex_target( GLenum target )
  48 {
  49    switch (target) {
  50    case GL_TEXTURE_1D:
  51       return BRW_SURFACE_1D;
  52
  53    case GL_TEXTURE_RECTANGLE_NV:
  54       return BRW_SURFACE_2D;
  55
  56    case GL_TEXTURE_2D:
  57       return BRW_SURFACE_2D;
  58
  59    case GL_TEXTURE_3D:
  60       return BRW_SURFACE_3D;
  61
  62    case GL_TEXTURE_CUBE_MAP:
  63       return BRW_SURFACE_CUBE;
  64
  65    default:
  66       assert(0);
  67       return 0;
  68    }
  69 }
  70
  71
  72 static GLuint translate_tex_format( GLuint mesa_format, GLenum depth_mode )
  73 {
  74    switch( mesa_format ) {
  75    case MESA_FORMAT_L8:
  76       return BRW_SURFACEFORMAT_L8_UNORM;
  77
  78    case MESA_FORMAT_I8:
  79       return BRW_SURFACEFORMAT_I8_UNORM;
  80
  81    case MESA_FORMAT_A8:
  82       return BRW_SURFACEFORMAT_A8_UNORM;
  83
  84    case MESA_FORMAT_AL88:
  85       return BRW_SURFACEFORMAT_L8A8_UNORM;
  86
  87    case MESA_FORMAT_RGB888:
  88       assert(0);                /* not supported for sampling */
  89       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
  90
  91    case MESA_FORMAT_ARGB8888:
  92       return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  93
  94    case MESA_FORMAT_RGBA8888_REV:
  95       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
  96
  97    case MESA_FORMAT_RGB565:
  98       return BRW_SURFACEFORMAT_B5G6R5_UNORM;
  99
 100    case MESA_FORMAT_ARGB1555:
 101       return BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
 102
 103    case MESA_FORMAT_ARGB4444:
 104       return BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
 105
 106    case MESA_FORMAT_YCBCR_REV:
 107       return BRW_SURFACEFORMAT_YCRCB_NORMAL;
 108
 109    case MESA_FORMAT_YCBCR:
 110       return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
 111
 112    case MESA_FORMAT_RGB_FXT1:
 113    case MESA_FORMAT_RGBA_FXT1:
 114       return BRW_SURFACEFORMAT_FXT1;
 115
 116    case MESA_FORMAT_Z16:
 117       if (depth_mode == GL_INTENSITY)
 118           return BRW_SURFACEFORMAT_I16_UNORM;
 119       else if (depth_mode == GL_ALPHA)
 120           return BRW_SURFACEFORMAT_A16_UNORM;
 121       else
 122           return BRW_SURFACEFORMAT_L16_UNORM;
 123
 124    case MESA_FORMAT_RGB_DXT1:
 125        return BRW_SURFACEFORMAT_DXT1_RGB;
 126
 127    case MESA_FORMAT_RGBA_DXT1:
 128        return BRW_SURFACEFORMAT_BC1_UNORM;
 129
 130    case MESA_FORMAT_RGBA_DXT3:
 131        return BRW_SURFACEFORMAT_BC2_UNORM;
 132
 133    case MESA_FORMAT_RGBA_DXT5:
 134        return BRW_SURFACEFORMAT_BC3_UNORM;
 135
 136    case MESA_FORMAT_SRGBA8:
 137       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
 138    case MESA_FORMAT_SRGB_DXT1:
 139       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 140
 141    case MESA_FORMAT_Z24_S8:
 142       return BRW_SURFACEFORMAT_I24X8_UNORM;
 143
 144    default:
 145       assert(0);
 146       return 0;
 147    }
 148 }
 149
 150 struct brw_wm_surface_key {
 151    GLenum target, depthmode;
 152    dri_bo *bo;
 153    GLint format;
 154    GLint first_level, last_level;
 155    GLint width, height, depth;
 156    GLint pitch, cpp;
 157    uint32_t tiling;
 158 };
 159
 160 static void
 161 brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling)
 162 {
 163    switch (tiling) {
 164    case I915_TILING_NONE:
 165       surf->ss3.tiled_surface = 0;
 166       surf->ss3.tile_walk = 0;
 167       break;
 168    case I915_TILING_X:
 169       surf->ss3.tiled_surface = 1;
 170       surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 171       break;
 172    case I915_TILING_Y:
 173       surf->ss3.tiled_surface = 1;
 174       surf->ss3.tile_walk = BRW_TILEWALK_YMAJOR;
 175       break;
 176    }
 177 }
 178
 179 static dri_bo *
 180 brw_create_texture_surface( struct brw_context *brw,
 181                             struct brw_wm_surface_key *key )
 182 {
 183    struct brw_surface_state surf;
 184    dri_bo *bo;
 185
 186    memset(&surf, 0, sizeof(surf));
 187
 188    surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 189    surf.ss0.surface_type = translate_tex_target(key->target);
 190    surf.ss0.surface_format = translate_tex_format(key->format, key->depthmode);
 191
 192    /* This is ok for all textures with channel width 8bit or less:
 193     */
 194 /*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 195
 196    surf.ss1.base_addr = key->bo->offset; /* reloc */
 197
 198    surf.ss2.mip_count = key->last_level - key->first_level;
 199    surf.ss2.width = key->width - 1;
 200    surf.ss2.height = key->height - 1;
 201    brw_set_surface_tiling(&surf, key->tiling);
 202    surf.ss3.pitch = (key->pitch * key->cpp) - 1;
 203    surf.ss3.depth = key->depth - 1;
 204
 205    surf.ss4.min_lod = 0;
 206
 207    if (key->target == GL_TEXTURE_CUBE_MAP) {
 208       surf.ss0.cube_pos_x = 1;
 209       surf.ss0.cube_pos_y = 1;
 210       surf.ss0.cube_pos_z = 1;
 211       surf.ss0.cube_neg_x = 1;
 212       surf.ss0.cube_neg_y = 1;
 213       surf.ss0.cube_neg_z = 1;
 214    }
 215
 216    bo = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 217                          key, sizeof(*key),
 218                          &key->bo, 1,
 219                          &surf, sizeof(surf),
 220                          NULL, NULL);
 221
 222    /* Emit relocation to surface contents */
 223    intel_bo_emit_reloc(bo,
 224                        I915_GEM_DOMAIN_SAMPLER, 0,
 225                        0,
 226                        offsetof(struct brw_surface_state, ss1),
 227                        key->bo);
 228
 229    return bo;
 230 }
 231
 232 static int
 233 brw_update_texture_surface( GLcontext *ctx, GLuint unit )
 234 {
 235    struct brw_context *brw = brw_context(ctx);
 236    struct gl_texture_object *tObj = brw->attribs.Texture->Unit[unit]._Current;
 237    struct intel_texture_object *intelObj = intel_texture_object(tObj);
 238    struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
 239    struct brw_wm_surface_key key;
 240    int ret = 0;
 241
 242    memset(&key, 0, sizeof(key));
 243    key.target = tObj->Target;
 244    key.depthmode = tObj->DepthMode;
 245    key.format = firstImage->TexFormat->MesaFormat;
 246    key.bo = intelObj->mt->region->buffer;
 247    key.first_level = intelObj->firstLevel;
 248    key.last_level = intelObj->lastLevel;
 249    key.width = firstImage->Width;
 250    key.height = firstImage->Height;
 251    key.pitch = intelObj->mt->pitch;
 252    key.cpp = intelObj->mt->cpp;
 253    key.depth = firstImage->Depth;
 254    key.tiling = intelObj->mt->region->tiling;
 255
 256    ret |= dri_bufmgr_check_aperture_space(key.bo);
 257
 258    dri_bo_unreference(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
 259    brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 260                                                 &key, sizeof(key),
 261                                                 &key.bo, 1,
 262                                                 NULL);
 263    if (brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] == NULL) {
 264       brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_create_texture_surface(brw, &key);
 265    }
 266
 267    ret |= dri_bufmgr_check_aperture_space(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
 268    return ret;
 269 }
 270
 271 /**
 272  * Sets up a surface state structure to point at the given region.
 273  * While it is only used for the front/back buffer currently, it should be
 274  * usable for further buffers when doing ARB_draw_buffer support.
 275  */
 276 static int
 277 brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
 278                           unsigned int unit, GLboolean cached)
 279 {
 280    dri_bo *region_bo = NULL;
 281    int ret = 0;
 282    struct {
 283       unsigned int surface_type;
 284       unsigned int surface_format;
 285       unsigned int width, height, cpp;
 286       GLubyte color_mask[4];
 287       GLboolean color_blend;
 288       uint32_t tiling;
 289    } key;
 290
 291    memset(&key, 0, sizeof(key));
 292
 293    if (region != NULL) {
 294       region_bo = region->buffer;
 295
 296       key.surface_type = BRW_SURFACE_2D;
 297       if (region->cpp == 4)
 298          key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 299       else
 300          key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 301       key.tiling = region->tiling;
 302       key.width = region->pitch; /* XXX: not really! */
 303       key.height = region->height;
 304       key.cpp = region->cpp;
 305
 306       ret |= dri_bufmgr_check_aperture_space(region->buffer);
 307    } else {
 308       key.surface_type = BRW_SURFACE_NULL;
 309       key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 310       key.tiling = 0;
 311       key.width = 1;
 312       key.height = 1;
 313       key.cpp = 4;
 314    }
 315    memcpy(key.color_mask, brw->attribs.Color->ColorMask,
 316           sizeof(key.color_mask));
 317    key.color_blend = (!brw->attribs.Color->_LogicOpEnabled &&
 318                       brw->attribs.Color->BlendEnabled);
 319
 320    dri_bo_unreference(brw->wm.surf_bo[unit]);
 321    brw->wm.surf_bo[unit] = NULL;
 322    if (cached)
 323        brw->wm.surf_bo[unit] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 324                &key, sizeof(key),
 325                &region_bo, 1,
 326                NULL);
 327
 328    if (brw->wm.surf_bo[unit] == NULL) {
 329       struct brw_surface_state surf;
 330
 331       memset(&surf, 0, sizeof(surf));
 332
 333       surf.ss0.surface_format = key.surface_format;
 334       surf.ss0.surface_type = key.surface_type;
 335       if (region_bo != NULL)
 336          surf.ss1.base_addr = region_bo->offset; /* reloc */
 337
 338       surf.ss2.width = key.width - 1;
 339       surf.ss2.height = key.height - 1;
 340       brw_set_surface_tiling(&surf, key.tiling);
 341       surf.ss3.pitch = (key.width * key.cpp) - 1;
 342
 343       /* _NEW_COLOR */
 344       surf.ss0.color_blend = key.color_blend;
 345       surf.ss0.writedisable_red =   !key.color_mask[0];
 346       surf.ss0.writedisable_green = !key.color_mask[1];
 347       surf.ss0.writedisable_blue =  !key.color_mask[2];
 348       surf.ss0.writedisable_alpha = !key.color_mask[3];
 349
 350       /* Key size will never match key size for textures, so we're safe. */
 351       brw->wm.surf_bo[unit] = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 352                                               &key, sizeof(key),
 353                                                &region_bo, 1,
 354                                                &surf, sizeof(surf),
 355                                                NULL, NULL);
 356       if (region_bo != NULL) {
 357          /* We might sample from it, and we might render to it, so flag
 358           * them both.  We might be able to figure out from other state
 359           * a more restrictive relocation to emit.
 360           */
 361          intel_bo_emit_reloc(brw->wm.surf_bo[unit],
 362                              I915_GEM_DOMAIN_RENDER |
 363                              I915_GEM_DOMAIN_SAMPLER,
 364                              I915_GEM_DOMAIN_RENDER,
 365                              0,
 366                              offsetof(struct brw_surface_state, ss1),
 367                              region_bo);
 368       }
 369    }
 370
 371    ret |= dri_bufmgr_check_aperture_space(brw->wm.surf_bo[unit]);
 372
 373    return ret;
 374 }
 375
 376
 377 /**
 378  * Constructs the binding table for the WM surface state, which maps unit
 379  * numbers to surface state objects.
 380  */
 381 static dri_bo *
 382 brw_wm_get_binding_table(struct brw_context *brw)
 383 {
 384    dri_bo *bind_bo;
 385
 386    bind_bo = brw_search_cache(&brw->cache, BRW_SS_SURF_BIND,
 387                               NULL, 0,
 388                               brw->wm.surf_bo, brw->wm.nr_surfaces,
 389                               NULL);
 390
 391    if (bind_bo == NULL) {
 392       GLuint data_size = brw->wm.nr_surfaces * sizeof(GLuint);
 393       uint32_t *data = malloc(data_size);
 394       int i;
 395
 396       for (i = 0; i < brw->wm.nr_surfaces; i++)
 397          if (brw->wm.surf_bo[i])
 398             data[i] = brw->wm.surf_bo[i]->offset;
 399          else
 400             data[i] = 0;
 401
 402       bind_bo = brw_upload_cache( &brw->cache, BRW_SS_SURF_BIND,
 403                                   NULL, 0,
 404                                   brw->wm.surf_bo, brw->wm.nr_surfaces,
 405                                   data, data_size,
 406                                   NULL, NULL);
 407
 408       /* Emit binding table relocations to surface state */
 409       for (i = 0; i < BRW_WM_MAX_SURF; i++) {
 410          if (brw->wm.surf_bo[i] != NULL) {
 411             intel_bo_emit_reloc(bind_bo,
 412                                 I915_GEM_DOMAIN_INSTRUCTION, 0,
 413                                 0,
 414                                 i * sizeof(GLuint),
 415                                 brw->wm.surf_bo[i]);
 416          }
 417       }
 418
 419       free(data);
 420    }
 421
 422    return bind_bo;
 423 }
 424
 425 static int prepare_wm_surfaces(struct brw_context *brw )
 426 {
 427    GLcontext *ctx = &brw->intel.ctx;
 428    struct intel_context *intel = &brw->intel;
 429    GLuint i, ret;
 430
 431    if (brw->state.nr_draw_regions  > 1) {
 432       for (i = 0; i < brw->state.nr_draw_regions; i++) {
 433          ret = brw_update_region_surface(brw, brw->state.draw_regions[i], i,
 434                                          GL_FALSE);
 435          if (ret)
 436             return ret;
 437       }
 438    }else {
 439       ret = brw_update_region_surface(brw, brw->state.draw_regions[0], 0, GL_TRUE);
 440       if (ret)
 441          return ret;
 442    }
 443
 444    brw->wm.nr_surfaces = MAX_DRAW_BUFFERS;
 445
 446    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 447       struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i];
 448
 449       /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
 450       if(texUnit->_ReallyEnabled) {
 451          if (texUnit->_Current == intel->frame_buffer_texobj) {
 452             dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 453             brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = brw->wm.surf_bo[0];
 454             dri_bo_reference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 455             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 456          } else {
 457             ret = brw_update_texture_surface(ctx, i);
 458             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 459
 460             if (ret)
 461                return ret;
 462          }
 463       } else {
 464          dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 465          brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = NULL;
 466       }
 467
 468    }
 469
 470    dri_bo_unreference(brw->wm.bind_bo);
 471    brw->wm.bind_bo = brw_wm_get_binding_table(brw);
 472
 473    return dri_bufmgr_check_aperture_space(brw->wm.bind_bo);
 474 }
 475
 476
 477 const struct brw_tracked_state brw_wm_surfaces = {
 478    .dirty = {
 479       .mesa = _NEW_COLOR | _NEW_TEXTURE | _NEW_BUFFERS,
 480       .brw = BRW_NEW_CONTEXT,
 481       .cache = 0
 482    },
 483    .prepare = prepare_wm_surfaces,
 484 };
 485
 486
 487