src/mesa/drivers/dri/i965/brw_wm_surface_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/mtypes.h"
  34 #include "main/texformat.h"
  35 #include "main/texstore.h"
  36
  37 #include "intel_mipmap_tree.h"
  38 #include "intel_batchbuffer.h"
  39 #include "intel_tex.h"
  40
  41
  42 #include "brw_context.h"
  43 #include "brw_state.h"
  44 #include "brw_defines.h"
  45
  46
  47 static GLuint translate_tex_target( GLenum target )
  48 {
  49    switch (target) {
  50    case GL_TEXTURE_1D:
  51       return BRW_SURFACE_1D;
  52
  53    case GL_TEXTURE_RECTANGLE_NV:
  54       return BRW_SURFACE_2D;
  55
  56    case GL_TEXTURE_2D:
  57       return BRW_SURFACE_2D;
  58
  59    case GL_TEXTURE_3D:
  60       return BRW_SURFACE_3D;
  61
  62    case GL_TEXTURE_CUBE_MAP:
  63       return BRW_SURFACE_CUBE;
  64
  65    default:
  66       assert(0);
  67       return 0;
  68    }
  69 }
  70
  71
  72 static GLuint translate_tex_format( GLuint mesa_format, GLenum depth_mode )
  73 {
  74    switch( mesa_format ) {
  75    case MESA_FORMAT_L8:
  76       return BRW_SURFACEFORMAT_L8_UNORM;
  77
  78    case MESA_FORMAT_I8:
  79       return BRW_SURFACEFORMAT_I8_UNORM;
  80
  81    case MESA_FORMAT_A8:
  82       return BRW_SURFACEFORMAT_A8_UNORM;
  83
  84    case MESA_FORMAT_AL88:
  85       return BRW_SURFACEFORMAT_L8A8_UNORM;
  86
  87    case MESA_FORMAT_RGB888:
  88       assert(0);                /* not supported for sampling */
  89       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
  90
  91    case MESA_FORMAT_ARGB8888:
  92       return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  93
  94    case MESA_FORMAT_RGBA8888_REV:
  95       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
  96
  97    case MESA_FORMAT_RGB565:
  98       return BRW_SURFACEFORMAT_B5G6R5_UNORM;
  99
 100    case MESA_FORMAT_ARGB1555:
 101       return BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
 102
 103    case MESA_FORMAT_ARGB4444:
 104       return BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
 105
 106    case MESA_FORMAT_YCBCR_REV:
 107       return BRW_SURFACEFORMAT_YCRCB_NORMAL;
 108
 109    case MESA_FORMAT_YCBCR:
 110       return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
 111
 112    case MESA_FORMAT_RGB_FXT1:
 113    case MESA_FORMAT_RGBA_FXT1:
 114       return BRW_SURFACEFORMAT_FXT1;
 115
 116    case MESA_FORMAT_Z16:
 117       if (depth_mode == GL_INTENSITY)
 118           return BRW_SURFACEFORMAT_I16_UNORM;
 119       else if (depth_mode == GL_ALPHA)
 120           return BRW_SURFACEFORMAT_A16_UNORM;
 121       else
 122           return BRW_SURFACEFORMAT_L16_UNORM;
 123
 124    case MESA_FORMAT_RGB_DXT1:
 125        return BRW_SURFACEFORMAT_DXT1_RGB;
 126
 127    case MESA_FORMAT_RGBA_DXT1:
 128        return BRW_SURFACEFORMAT_BC1_UNORM;
 129
 130    case MESA_FORMAT_RGBA_DXT3:
 131        return BRW_SURFACEFORMAT_BC2_UNORM;
 132
 133    case MESA_FORMAT_RGBA_DXT5:
 134        return BRW_SURFACEFORMAT_BC3_UNORM;
 135
 136    case MESA_FORMAT_SRGBA8:
 137       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
 138    case MESA_FORMAT_SRGB_DXT1:
 139       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 140
 141    case MESA_FORMAT_S8_Z24:
 142       /* XXX: these different surface formats don't seem to
 143        * make any difference for shadow sampler/compares.
 144        */
 145       if (depth_mode == GL_INTENSITY)
 146          return BRW_SURFACEFORMAT_I24X8_UNORM;
 147       else if (depth_mode == GL_ALPHA)
 148          return BRW_SURFACEFORMAT_A24X8_UNORM;
 149       else
 150          return BRW_SURFACEFORMAT_L24X8_UNORM;
 151
 152    case MESA_FORMAT_DUDV8:
 153       return BRW_SURFACEFORMAT_R8G8_SNORM;
 154
 155    default:
 156       assert(0);
 157       return 0;
 158    }
 159 }
 160
 161 struct brw_wm_surface_key {
 162    GLenum target, depthmode;
 163    dri_bo *bo;
 164    GLint format;
 165    GLint first_level, last_level;
 166    GLint width, height, depth;
 167    GLint pitch, cpp;
 168    uint32_t tiling;
 169    GLuint offset;
 170 };
 171
 172 static void
 173 brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling)
 174 {
 175    switch (tiling) {
 176    case I915_TILING_NONE:
 177       surf->ss3.tiled_surface = 0;
 178       surf->ss3.tile_walk = 0;
 179       break;
 180    case I915_TILING_X:
 181       surf->ss3.tiled_surface = 1;
 182       surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 183       break;
 184    case I915_TILING_Y:
 185       surf->ss3.tiled_surface = 1;
 186       surf->ss3.tile_walk = BRW_TILEWALK_YMAJOR;
 187       break;
 188    }
 189 }
 190
 191 static dri_bo *
 192 brw_create_texture_surface( struct brw_context *brw,
 193                             struct brw_wm_surface_key *key )
 194 {
 195    struct brw_surface_state surf;
 196    dri_bo *bo;
 197
 198    memset(&surf, 0, sizeof(surf));
 199
 200    surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 201    surf.ss0.surface_type = translate_tex_target(key->target);
 202
 203    if (key->bo)
 204       surf.ss0.surface_format = translate_tex_format(key->format, key->depthmode);
 205    else {
 206       switch (key->depth) {
 207       case 32:
 208          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 209          break;
 210       default:
 211       case 24:
 212          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
 213          break;
 214       case 16:
 215          surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 216          break;
 217       }
 218    }
 219
 220    /* This is ok for all textures with channel width 8bit or less:
 221     */
 222 /*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 223    if (key->bo)
 224       surf.ss1.base_addr = key->bo->offset; /* reloc */
 225    else
 226       surf.ss1.base_addr = key->offset;
 227
 228    surf.ss2.mip_count = key->last_level - key->first_level;
 229    surf.ss2.width = key->width - 1;
 230    surf.ss2.height = key->height - 1;
 231    brw_set_surface_tiling(&surf, key->tiling);
 232    surf.ss3.pitch = (key->pitch * key->cpp) - 1;
 233    surf.ss3.depth = key->depth - 1;
 234
 235    surf.ss4.min_lod = 0;
 236
 237    if (key->target == GL_TEXTURE_CUBE_MAP) {
 238       surf.ss0.cube_pos_x = 1;
 239       surf.ss0.cube_pos_y = 1;
 240       surf.ss0.cube_pos_z = 1;
 241       surf.ss0.cube_neg_x = 1;
 242       surf.ss0.cube_neg_y = 1;
 243       surf.ss0.cube_neg_z = 1;
 244    }
 245
 246    bo = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 247                          key, sizeof(*key),
 248                          &key->bo, key->bo ? 1 : 0,
 249                          &surf, sizeof(surf),
 250                          NULL, NULL);
 251
 252    if (key->bo) {
 253       /* Emit relocation to surface contents */
 254       dri_bo_emit_reloc(bo,
 255                         I915_GEM_DOMAIN_SAMPLER, 0,
 256                         0,
 257                         offsetof(struct brw_surface_state, ss1),
 258                         key->bo);
 259    }
 260    return bo;
 261 }
 262
 263 static void
 264 brw_update_texture_surface( GLcontext *ctx, GLuint unit )
 265 {
 266    struct brw_context *brw = brw_context(ctx);
 267    struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
 268    struct intel_texture_object *intelObj = intel_texture_object(tObj);
 269    struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
 270    struct brw_wm_surface_key key;
 271
 272    memset(&key, 0, sizeof(key));
 273
 274    if (intelObj->imageOverride) {
 275       key.pitch = intelObj->pitchOverride / intelObj->mt->cpp;
 276       key.depth = intelObj->depthOverride;
 277       key.bo = NULL;
 278       key.offset = intelObj->textureOffset;
 279    } else {
 280       key.format = firstImage->TexFormat->MesaFormat;
 281       key.pitch = intelObj->mt->pitch;
 282       key.depth = firstImage->Depth;
 283       key.bo = intelObj->mt->region->buffer;
 284       key.offset = 0;
 285    }
 286
 287    key.target = tObj->Target;
 288    key.depthmode = tObj->DepthMode;
 289    key.first_level = intelObj->firstLevel;
 290    key.last_level = intelObj->lastLevel;
 291    key.width = firstImage->Width;
 292    key.height = firstImage->Height;
 293    key.cpp = intelObj->mt->cpp;
 294    key.tiling = intelObj->mt->region->tiling;
 295
 296    dri_bo_unreference(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
 297    brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 298                                                                &key, sizeof(key),
 299                                                                &key.bo, key.bo ? 1 : 0,
 300                                                                NULL);
 301    if (brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] == NULL) {
 302       brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_create_texture_surface(brw, &key);
 303    }
 304 }
 305
 306 /**
 307  * Sets up a surface state structure to point at the given region.
 308  * While it is only used for the front/back buffer currently, it should be
 309  * usable for further buffers when doing ARB_draw_buffer support.
 310  */
 311 static void
 312 brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
 313                           unsigned int unit, GLboolean cached)
 314 {
 315    GLcontext *ctx = &brw->intel.ctx;
 316    dri_bo *region_bo = NULL;
 317    struct {
 318       unsigned int surface_type;
 319       unsigned int surface_format;
 320       unsigned int width, height, cpp;
 321       GLubyte color_mask[4];
 322       GLboolean color_blend;
 323       uint32_t tiling;
 324    } key;
 325
 326    memset(&key, 0, sizeof(key));
 327
 328    if (region != NULL) {
 329       region_bo = region->buffer;
 330
 331       key.surface_type = BRW_SURFACE_2D;
 332       if (region->cpp == 4)
 333          key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 334       else
 335          key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 336       key.tiling = region->tiling;
 337       key.width = region->pitch; /* XXX: not really! */
 338       key.height = region->height;
 339       key.cpp = region->cpp;
 340    } else {
 341       key.surface_type = BRW_SURFACE_NULL;
 342       key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 343       key.tiling = 0;
 344       key.width = 1;
 345       key.height = 1;
 346       key.cpp = 4;
 347    }
 348    memcpy(key.color_mask, ctx->Color.ColorMask,
 349           sizeof(key.color_mask));
 350    key.color_blend = (!ctx->Color._LogicOpEnabled &&
 351                       ctx->Color.BlendEnabled);
 352
 353    dri_bo_unreference(brw->wm.surf_bo[unit]);
 354    brw->wm.surf_bo[unit] = NULL;
 355    if (cached)
 356        brw->wm.surf_bo[unit] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 357                &key, sizeof(key),
 358                &region_bo, 1,
 359                NULL);
 360
 361    if (brw->wm.surf_bo[unit] == NULL) {
 362       struct brw_surface_state surf;
 363
 364       memset(&surf, 0, sizeof(surf));
 365
 366       surf.ss0.surface_format = key.surface_format;
 367       surf.ss0.surface_type = key.surface_type;
 368       if (region_bo != NULL)
 369          surf.ss1.base_addr = region_bo->offset; /* reloc */
 370
 371       surf.ss2.width = key.width - 1;
 372       surf.ss2.height = key.height - 1;
 373       brw_set_surface_tiling(&surf, key.tiling);
 374       surf.ss3.pitch = (key.width * key.cpp) - 1;
 375
 376       /* _NEW_COLOR */
 377       surf.ss0.color_blend = key.color_blend;
 378       surf.ss0.writedisable_red =   !key.color_mask[0];
 379       surf.ss0.writedisable_green = !key.color_mask[1];
 380       surf.ss0.writedisable_blue =  !key.color_mask[2];
 381       surf.ss0.writedisable_alpha = !key.color_mask[3];
 382
 383       /* Key size will never match key size for textures, so we're safe. */
 384       brw->wm.surf_bo[unit] = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 385                                               &key, sizeof(key),
 386                                                &region_bo, 1,
 387                                                &surf, sizeof(surf),
 388                                                NULL, NULL);
 389       if (region_bo != NULL) {
 390          /* We might sample from it, and we might render to it, so flag
 391           * them both.  We might be able to figure out from other state
 392           * a more restrictive relocation to emit.
 393           */
 394          dri_bo_emit_reloc(brw->wm.surf_bo[unit],
 395                            I915_GEM_DOMAIN_RENDER,
 396                            I915_GEM_DOMAIN_RENDER,
 397                            0,
 398                            offsetof(struct brw_surface_state, ss1),
 399                            region_bo);
 400       }
 401    }
 402 }
 403
 404
 405 /**
 406  * Constructs the binding table for the WM surface state, which maps unit
 407  * numbers to surface state objects.
 408  */
 409 static dri_bo *
 410 brw_wm_get_binding_table(struct brw_context *brw)
 411 {
 412    dri_bo *bind_bo;
 413
 414    bind_bo = brw_search_cache(&brw->cache, BRW_SS_SURF_BIND,
 415                               NULL, 0,
 416                               brw->wm.surf_bo, brw->wm.nr_surfaces,
 417                               NULL);
 418
 419    if (bind_bo == NULL) {
 420       GLuint data_size = brw->wm.nr_surfaces * sizeof(GLuint);
 421       uint32_t *data = malloc(data_size);
 422       int i;
 423
 424       for (i = 0; i < brw->wm.nr_surfaces; i++)
 425          if (brw->wm.surf_bo[i])
 426             data[i] = brw->wm.surf_bo[i]->offset;
 427          else
 428             data[i] = 0;
 429
 430       bind_bo = brw_upload_cache( &brw->cache, BRW_SS_SURF_BIND,
 431                                   NULL, 0,
 432                                   brw->wm.surf_bo, brw->wm.nr_surfaces,
 433                                   data, data_size,
 434                                   NULL, NULL);
 435
 436       /* Emit binding table relocations to surface state */
 437       for (i = 0; i < BRW_WM_MAX_SURF; i++) {
 438          if (brw->wm.surf_bo[i] != NULL) {
 439             dri_bo_emit_reloc(bind_bo,
 440                               I915_GEM_DOMAIN_INSTRUCTION, 0,
 441                               0,
 442                               i * sizeof(GLuint),
 443                               brw->wm.surf_bo[i]);
 444          }
 445       }
 446
 447       free(data);
 448    }
 449
 450    return bind_bo;
 451 }
 452
 453 static void prepare_wm_surfaces(struct brw_context *brw )
 454 {
 455    GLcontext *ctx = &brw->intel.ctx;
 456    struct intel_context *intel = &brw->intel;
 457    GLuint i;
 458    int old_nr_surfaces;
 459
 460    if (brw->state.nr_color_regions  > 1) {
 461       for (i = 0; i < brw->state.nr_color_regions; i++) {
 462          brw_update_region_surface(brw, brw->state.color_regions[i], i,
 463                                    GL_FALSE);
 464       }
 465    } else {
 466       brw_update_region_surface(brw, brw->state.color_regions[0], 0, GL_TRUE);
 467    }
 468
 469    old_nr_surfaces = brw->wm.nr_surfaces;
 470    brw->wm.nr_surfaces = MAX_DRAW_BUFFERS;
 471
 472    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 473       struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i];
 474
 475       /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
 476       if(texUnit->_ReallyEnabled) {
 477          if (texUnit->_Current == intel->frame_buffer_texobj) {
 478             dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 479             brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = brw->wm.surf_bo[0];
 480             dri_bo_reference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 481             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 482          } else {
 483             brw_update_texture_surface(ctx, i);
 484             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 485          }
 486       } else {
 487          dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 488          brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = NULL;
 489       }
 490
 491    }
 492
 493    dri_bo_unreference(brw->wm.bind_bo);
 494    brw->wm.bind_bo = brw_wm_get_binding_table(brw);
 495
 496    if (brw->wm.nr_surfaces != old_nr_surfaces)
 497       brw->state.dirty.brw |= BRW_NEW_NR_SURFACES;
 498 }
 499
 500
 501 const struct brw_tracked_state brw_wm_surfaces = {
 502    .dirty = {
 503       .mesa = _NEW_COLOR | _NEW_TEXTURE | _NEW_BUFFERS,
 504       .brw = BRW_NEW_CONTEXT,
 505       .cache = 0
 506    },
 507    .prepare = prepare_wm_surfaces,
 508 };
 509
 510
 511