src/mesa/drivers/dri/i965/brw_wm_surface_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "mtypes.h"
  34 #include "texformat.h"
  35 #include "texstore.h"
  36
  37 #include "intel_mipmap_tree.h"
  38 #include "intel_batchbuffer.h"
  39 #include "intel_tex.h"
  40
  41
  42 #include "brw_context.h"
  43 #include "brw_state.h"
  44 #include "brw_defines.h"
  45
  46
  47 static GLuint translate_tex_target( GLenum target )
  48 {
  49    switch (target) {
  50    case GL_TEXTURE_1D:
  51       return BRW_SURFACE_1D;
  52
  53    case GL_TEXTURE_RECTANGLE_NV:
  54       return BRW_SURFACE_2D;
  55
  56    case GL_TEXTURE_2D:
  57       return BRW_SURFACE_2D;
  58
  59    case GL_TEXTURE_3D:
  60       return BRW_SURFACE_3D;
  61
  62    case GL_TEXTURE_CUBE_MAP:
  63       return BRW_SURFACE_CUBE;
  64
  65    default:
  66       assert(0);
  67       return 0;
  68    }
  69 }
  70
  71
  72 static GLuint translate_tex_format( GLuint mesa_format )
  73 {
  74    switch( mesa_format ) {
  75    case MESA_FORMAT_L8:
  76       return BRW_SURFACEFORMAT_L8_UNORM;
  77
  78    case MESA_FORMAT_I8:
  79       return BRW_SURFACEFORMAT_I8_UNORM;
  80
  81    case MESA_FORMAT_A8:
  82       return BRW_SURFACEFORMAT_A8_UNORM;
  83
  84    case MESA_FORMAT_AL88:
  85       return BRW_SURFACEFORMAT_L8A8_UNORM;
  86
  87    case MESA_FORMAT_RGB888:
  88       assert(0);                /* not supported for sampling */
  89       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
  90
  91    case MESA_FORMAT_ARGB8888:
  92       return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  93
  94    case MESA_FORMAT_RGBA8888_REV:
  95       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
  96
  97    case MESA_FORMAT_RGB565:
  98       return BRW_SURFACEFORMAT_B5G6R5_UNORM;
  99
 100    case MESA_FORMAT_ARGB1555:
 101       return BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
 102
 103    case MESA_FORMAT_ARGB4444:
 104       return BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
 105
 106    case MESA_FORMAT_YCBCR_REV:
 107       return BRW_SURFACEFORMAT_YCRCB_NORMAL;
 108
 109    case MESA_FORMAT_YCBCR:
 110       return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
 111
 112    case MESA_FORMAT_RGB_FXT1:
 113    case MESA_FORMAT_RGBA_FXT1:
 114       return BRW_SURFACEFORMAT_FXT1;
 115
 116    case MESA_FORMAT_Z16:
 117       return BRW_SURFACEFORMAT_I16_UNORM;
 118
 119    case MESA_FORMAT_RGB_DXT1:
 120        return BRW_SURFACEFORMAT_DXT1_RGB;
 121
 122    case MESA_FORMAT_RGBA_DXT1:
 123        return BRW_SURFACEFORMAT_BC1_UNORM;
 124
 125    case MESA_FORMAT_RGBA_DXT3:
 126        return BRW_SURFACEFORMAT_BC2_UNORM;
 127
 128    case MESA_FORMAT_RGBA_DXT5:
 129        return BRW_SURFACEFORMAT_BC3_UNORM;
 130
 131    case MESA_FORMAT_SRGBA8:
 132       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
 133    case MESA_FORMAT_SRGB_DXT1:
 134       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 135
 136    default:
 137       assert(0);
 138       return 0;
 139    }
 140 }
 141
 142 static
 143 void brw_update_texture_surface( GLcontext *ctx, GLuint unit )
 144 {
 145    struct intel_context *intel = intel_context(ctx);
 146    struct brw_context *brw = brw_context(ctx);
 147    struct gl_texture_object *tObj = brw->attribs.Texture->Unit[unit]._Current;
 148    struct intel_texture_object *intelObj = intel_texture_object(tObj);
 149    struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
 150    struct brw_surface_state surf;
 151
 152    memset(&surf, 0, sizeof(surf));
 153
 154    surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 155    surf.ss0.surface_type = translate_tex_target(tObj->Target);
 156    surf.ss0.surface_format = translate_tex_format(firstImage->TexFormat->MesaFormat);
 157
 158    /* This is ok for all textures with channel width 8bit or less:
 159     */
 160 /*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 161
 162    /* BRW_NEW_LOCK */
 163    surf.ss1.base_addr = bmBufferOffset(intel,
 164                                         intelObj->mt->region->buffer);
 165
 166    surf.ss2.mip_count = intelObj->lastLevel - intelObj->firstLevel;
 167    surf.ss2.width = firstImage->Width - 1;
 168    surf.ss2.height = firstImage->Height - 1;
 169
 170    surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 171    surf.ss3.tiled_surface = intelObj->mt->region->tiled; /* always zero */
 172    surf.ss3.pitch = (intelObj->mt->pitch * intelObj->mt->cpp) - 1;
 173    surf.ss3.depth = firstImage->Depth - 1;
 174
 175    surf.ss4.min_lod = 0;
 176
 177    if (tObj->Target == GL_TEXTURE_CUBE_MAP) {
 178       surf.ss0.cube_pos_x = 1;
 179       surf.ss0.cube_pos_y = 1;
 180       surf.ss0.cube_pos_z = 1;
 181       surf.ss0.cube_neg_x = 1;
 182       surf.ss0.cube_neg_y = 1;
 183       surf.ss0.cube_neg_z = 1;
 184    }
 185
 186    brw->wm.bind.surf_ss_offset[unit + 1] =
 187       brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf );
 188 }
 189
 190
 191
 192 #define OFFSET(TYPE, FIELD) ( (GLuint)&(((TYPE *)0)->FIELD) )
 193
 194
 195 static void upload_wm_surfaces(struct brw_context *brw )
 196 {
 197    GLcontext *ctx = &brw->intel.ctx;
 198    struct intel_context *intel = &brw->intel;
 199    struct brw_surface_binding_table bind;
 200    GLuint i;
 201
 202    memcpy(&bind, &brw->wm.bind, sizeof(bind));
 203
 204    {
 205       struct brw_surface_state surf;
 206       struct intel_region *region = brw->state.draw_region;
 207
 208       memset(&surf, 0, sizeof(surf));
 209
 210       if (region->cpp == 4)
 211          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 212       else
 213          surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 214
 215       surf.ss0.surface_type = BRW_SURFACE_2D;
 216
 217       /* _NEW_COLOR */
 218       surf.ss0.color_blend = (!brw->attribs.Color->_LogicOpEnabled &&
 219                               brw->attribs.Color->BlendEnabled);
 220
 221
 222       surf.ss0.writedisable_red =   !brw->attribs.Color->ColorMask[0];
 223       surf.ss0.writedisable_green = !brw->attribs.Color->ColorMask[1];
 224       surf.ss0.writedisable_blue =  !brw->attribs.Color->ColorMask[2];
 225       surf.ss0.writedisable_alpha = !brw->attribs.Color->ColorMask[3];
 226
 227       /* BRW_NEW_LOCK */
 228       surf.ss1.base_addr = bmBufferOffset(&brw->intel, region->buffer);
 229
 230
 231       surf.ss2.width = region->pitch - 1; /* XXX: not really! */
 232       surf.ss2.height = region->height - 1;
 233       surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 234       surf.ss3.tiled_surface = region->tiled;
 235       surf.ss3.pitch = (region->pitch * region->cpp) - 1;
 236
 237       brw->wm.bind.surf_ss_offset[0] = brw_cache_data( &brw->cache[BRW_SS_SURFACE], &surf );
 238       brw->wm.nr_surfaces = 1;
 239    }
 240
 241
 242    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 243       struct gl_texture_unit *texUnit = &brw->attribs.Texture->Unit[i];
 244
 245       /* _NEW_TEXTURE, BRW_NEW_TEXDATA
 246        */
 247       if (texUnit->_ReallyEnabled &&
 248           intel_finalize_mipmap_tree(intel,texUnit->_Current))
 249       {
 250          brw_update_texture_surface(ctx, i);
 251          brw->wm.nr_surfaces = i+2;
 252       }
 253       else if( texUnit->_ReallyEnabled &&
 254                texUnit->_Current == intel->frame_buffer_texobj )
 255       {
 256          brw->wm.bind.surf_ss_offset[i+1] = brw->wm.bind.surf_ss_offset[0];
 257          brw->wm.nr_surfaces = i+2;
 258       }
 259       else {
 260          brw->wm.bind.surf_ss_offset[i+1] = 0;
 261       }
 262    }
 263
 264    brw->wm.bind_ss_offset = brw_cache_data( &brw->cache[BRW_SS_SURF_BIND],
 265                                             &brw->wm.bind );
 266 }
 267
 268 const struct brw_tracked_state brw_wm_surfaces = {
 269    .dirty = {
 270       .mesa = _NEW_COLOR | _NEW_TEXTURE | _NEW_BUFFERS,
 271       .brw = (BRW_NEW_CONTEXT |
 272               BRW_NEW_LOCK),    /* required for bmBufferOffset */
 273       .cache = 0
 274    },
 275    .update = upload_wm_surfaces
 276 };
 277
 278
 279