2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
34 #include "texformat.h"
37 #include "intel_mipmap_tree.h"
38 #include "intel_batchbuffer.h"
39 #include "intel_tex.h"
42 #include "brw_context.h"
43 #include "brw_state.h"
44 #include "brw_defines.h"
47 static GLuint
translate_tex_target( GLenum target
)
51 return BRW_SURFACE_1D
;
53 case GL_TEXTURE_RECTANGLE_NV
:
54 return BRW_SURFACE_2D
;
57 return BRW_SURFACE_2D
;
60 return BRW_SURFACE_3D
;
62 case GL_TEXTURE_CUBE_MAP
:
63 return BRW_SURFACE_CUBE
;
72 static GLuint
translate_tex_format( GLuint mesa_format
)
74 switch( mesa_format
) {
76 return BRW_SURFACEFORMAT_L8_UNORM
;
79 return BRW_SURFACEFORMAT_I8_UNORM
;
82 return BRW_SURFACEFORMAT_A8_UNORM
;
84 case MESA_FORMAT_AL88
:
85 return BRW_SURFACEFORMAT_L8A8_UNORM
;
87 case MESA_FORMAT_RGB888
:
88 assert(0); /* not supported for sampling */
89 return BRW_SURFACEFORMAT_R8G8B8_UNORM
;
91 case MESA_FORMAT_ARGB8888
:
92 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
94 case MESA_FORMAT_RGBA8888_REV
:
95 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM
;
97 case MESA_FORMAT_RGB565
:
98 return BRW_SURFACEFORMAT_B5G6R5_UNORM
;
100 case MESA_FORMAT_ARGB1555
:
101 return BRW_SURFACEFORMAT_B5G5R5A1_UNORM
;
103 case MESA_FORMAT_ARGB4444
:
104 return BRW_SURFACEFORMAT_B4G4R4A4_UNORM
;
106 case MESA_FORMAT_YCBCR_REV
:
107 return BRW_SURFACEFORMAT_YCRCB_NORMAL
;
109 case MESA_FORMAT_YCBCR
:
110 return BRW_SURFACEFORMAT_YCRCB_SWAPUVY
;
112 case MESA_FORMAT_RGB_FXT1
:
113 case MESA_FORMAT_RGBA_FXT1
:
114 return BRW_SURFACEFORMAT_FXT1
;
116 case MESA_FORMAT_Z16
:
117 return BRW_SURFACEFORMAT_I16_UNORM
;
119 case MESA_FORMAT_RGB_DXT1
:
120 return BRW_SURFACEFORMAT_DXT1_RGB
;
122 case MESA_FORMAT_RGBA_DXT1
:
123 return BRW_SURFACEFORMAT_BC1_UNORM
;
125 case MESA_FORMAT_RGBA_DXT3
:
126 return BRW_SURFACEFORMAT_BC2_UNORM
;
128 case MESA_FORMAT_RGBA_DXT5
:
129 return BRW_SURFACEFORMAT_BC3_UNORM
;
131 case MESA_FORMAT_SRGBA8
:
132 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB
;
133 case MESA_FORMAT_SRGB_DXT1
:
134 return BRW_SURFACEFORMAT_BC1_UNORM_SRGB
;
142 struct brw_wm_surface_key
{
146 GLint first_level
, last_level
;
147 GLint width
, height
, depth
;
153 brw_create_texture_surface( struct brw_context
*brw
,
154 struct brw_wm_surface_key
*key
)
156 struct brw_surface_state surf
;
158 memset(&surf
, 0, sizeof(surf
));
160 surf
.ss0
.mipmap_layout_mode
= BRW_SURFACE_MIPMAPLAYOUT_BELOW
;
161 surf
.ss0
.surface_type
= translate_tex_target(key
->target
);
162 surf
.ss0
.surface_format
= translate_tex_format(key
->format
);
164 /* This is ok for all textures with channel width 8bit or less:
166 /* surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
168 surf
.ss1
.base_addr
= key
->bo
->offset
; /* reloc */
170 surf
.ss2
.mip_count
= key
->last_level
- key
->first_level
;
171 surf
.ss2
.width
= key
->width
- 1;
172 surf
.ss2
.height
= key
->height
- 1;
174 surf
.ss3
.tile_walk
= BRW_TILEWALK_XMAJOR
;
175 surf
.ss3
.tiled_surface
= key
->tiled
; /* always zero */
176 surf
.ss3
.pitch
= (key
->pitch
* key
->cpp
) - 1;
177 surf
.ss3
.depth
= key
->depth
- 1;
179 surf
.ss4
.min_lod
= 0;
181 if (key
->target
== GL_TEXTURE_CUBE_MAP
) {
182 surf
.ss0
.cube_pos_x
= 1;
183 surf
.ss0
.cube_pos_y
= 1;
184 surf
.ss0
.cube_pos_z
= 1;
185 surf
.ss0
.cube_neg_x
= 1;
186 surf
.ss0
.cube_neg_y
= 1;
187 surf
.ss0
.cube_neg_z
= 1;
190 return brw_upload_cache( &brw
->cache
, BRW_SS_SURFACE
,
198 brw_update_texture_surface( GLcontext
*ctx
, GLuint unit
)
200 struct brw_context
*brw
= brw_context(ctx
);
201 struct gl_texture_object
*tObj
= brw
->attribs
.Texture
->Unit
[unit
]._Current
;
202 struct intel_texture_object
*intelObj
= intel_texture_object(tObj
);
203 struct gl_texture_image
*firstImage
= tObj
->Image
[0][intelObj
->firstLevel
];
204 struct brw_wm_surface_key key
;
206 memset(&key
, 0, sizeof(key
));
207 key
.target
= tObj
->Target
;
208 key
.format
= firstImage
->TexFormat
->MesaFormat
;
209 key
.bo
= intelObj
->mt
->region
->buffer
;
210 key
.first_level
= intelObj
->firstLevel
;
211 key
.last_level
= intelObj
->lastLevel
;
212 key
.width
= firstImage
->Width
;
213 key
.height
= firstImage
->Height
;
214 key
.pitch
= intelObj
->mt
->pitch
;
215 key
.cpp
= intelObj
->mt
->cpp
;
216 key
.depth
= firstImage
->Depth
;
217 key
.tiled
= intelObj
->mt
->region
->tiled
;
219 dri_bo_unreference(brw
->wm
.surf_bo
[unit
+ 1]);
220 brw
->wm
.surf_bo
[unit
+ 1] = brw_search_cache(&brw
->cache
, BRW_SS_SURFACE
,
224 if (brw
->wm
.surf_bo
[unit
+ 1] == NULL
)
225 brw
->wm
.surf_bo
[unit
+ 1] = brw_create_texture_surface(brw
, &key
);
228 #define OFFSET(TYPE, FIELD) ( (GLuint)&(((TYPE *)0)->FIELD) )
231 * Constructs the binding table for the WM surface state, which maps unit
232 * numbers to surface state objects.
235 brw_wm_get_binding_table(struct brw_context
*brw
)
239 bind_bo
= brw_search_cache(&brw
->cache
, BRW_SS_SURF_BIND
,
241 brw
->wm
.surf_bo
, brw
->wm
.nr_surfaces
,
244 if (bind_bo
== NULL
) {
245 GLuint data_size
= brw
->wm
.nr_surfaces
* 4;
246 uint32_t *data
= malloc(data_size
);
249 for (i
= 0; i
< brw
->wm
.nr_surfaces
; i
++)
250 data
[i
] = brw
->wm
.surf_bo
[i
]->offset
;
252 bind_bo
= brw_upload_cache( &brw
->cache
, BRW_SS_SURF_BIND
,
254 brw
->wm
.surf_bo
, brw
->wm
.nr_surfaces
,
264 static void upload_wm_surfaces(struct brw_context
*brw
)
266 GLcontext
*ctx
= &brw
->intel
.ctx
;
267 struct intel_context
*intel
= &brw
->intel
;
271 struct brw_surface_state surf
;
272 struct intel_region
*region
= brw
->state
.draw_region
;
274 memset(&surf
, 0, sizeof(surf
));
276 if (region
->cpp
== 4)
277 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
279 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B5G6R5_UNORM
;
281 surf
.ss0
.surface_type
= BRW_SURFACE_2D
;
284 surf
.ss0
.color_blend
= (!brw
->attribs
.Color
->_LogicOpEnabled
&&
285 brw
->attribs
.Color
->BlendEnabled
);
288 surf
.ss0
.writedisable_red
= !brw
->attribs
.Color
->ColorMask
[0];
289 surf
.ss0
.writedisable_green
= !brw
->attribs
.Color
->ColorMask
[1];
290 surf
.ss0
.writedisable_blue
= !brw
->attribs
.Color
->ColorMask
[2];
291 surf
.ss0
.writedisable_alpha
= !brw
->attribs
.Color
->ColorMask
[3];
293 surf
.ss1
.base_addr
= region
->buffer
->offset
; /* reloc */
295 surf
.ss2
.width
= region
->pitch
- 1; /* XXX: not really! */
296 surf
.ss2
.height
= region
->height
- 1;
297 surf
.ss3
.tile_walk
= BRW_TILEWALK_XMAJOR
;
298 surf
.ss3
.tiled_surface
= region
->tiled
;
299 surf
.ss3
.pitch
= (region
->pitch
* region
->cpp
) - 1;
301 /* Key size will never match key size for textures, so we're safe. */
302 dri_bo_unreference(brw
->wm
.surf_bo
[0]);
303 brw
->wm
.surf_bo
[0] = brw_cache_data( &brw
->cache
, BRW_SS_SURFACE
, &surf
,
304 ®ion
->buffer
, 1 );
306 brw
->wm
.nr_surfaces
= 1;
310 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
311 struct gl_texture_unit
*texUnit
= &brw
->attribs
.Texture
->Unit
[i
];
313 /* _NEW_TEXTURE, BRW_NEW_TEXDATA
315 if (texUnit
->_ReallyEnabled
&&
316 intel_finalize_mipmap_tree(intel
, i
))
318 brw_update_texture_surface(ctx
, i
);
319 brw
->wm
.nr_surfaces
= i
+2;
321 else if( texUnit
->_ReallyEnabled
&&
322 texUnit
->_Current
== intel
->frame_buffer_texobj
)
324 dri_bo_unreference(brw
->wm
.surf_bo
[i
+1]);
325 brw
->wm
.surf_bo
[i
+1] = brw
->wm
.surf_bo
[0];
326 dri_bo_reference(brw
->wm
.surf_bo
[i
+1]);
327 brw
->wm
.nr_surfaces
= i
+2;
329 dri_bo_unreference(brw
->wm
.surf_bo
[i
+1]);
330 brw
->wm
.surf_bo
[i
+1] = NULL
;
334 dri_bo_unreference(brw
->wm
.bind_bo
);
335 brw
->wm
.bind_bo
= brw_wm_get_binding_table(brw
);
338 static void emit_reloc_wm_surfaces(struct brw_context
*brw
)
342 /* Emit SS framebuffer relocation */
343 dri_emit_reloc(brw
->wm
.surf_bo
[0],
344 DRM_BO_FLAG_MEM_TT
| DRM_BO_FLAG_READ
| DRM_BO_FLAG_WRITE
,
346 offsetof(struct brw_surface_state
, ss1
),
347 brw
->state
.draw_region
->buffer
);
349 /* Emit SS relocations for texture buffers */
350 for (unit
= 0; unit
< BRW_MAX_TEX_UNIT
; unit
++) {
351 struct gl_texture_unit
*texUnit
= &brw
->attribs
.Texture
->Unit
[unit
];
352 struct gl_texture_object
*tObj
= texUnit
->_Current
;
353 struct intel_texture_object
*intelObj
= intel_texture_object(tObj
);
355 if (texUnit
->_ReallyEnabled
&& intelObj
->mt
!= NULL
) {
356 dri_emit_reloc(brw
->wm
.surf_bo
[unit
+ 1],
357 DRM_BO_FLAG_MEM_TT
| DRM_BO_FLAG_READ
,
359 offsetof(struct brw_surface_state
, ss1
),
360 intelObj
->mt
->region
->buffer
);
364 /* Emit binding table relocations to surface state */
365 for (i
= 0; i
< BRW_WM_MAX_SURF
; i
++) {
366 if (brw
->wm
.surf_bo
[i
] != NULL
) {
367 dri_emit_reloc(brw
->wm
.bind_bo
,
378 const struct brw_tracked_state brw_wm_surfaces
= {
380 .mesa
= _NEW_COLOR
| _NEW_TEXTURE
| _NEW_BUFFERS
,
381 .brw
= BRW_NEW_CONTEXT
,
384 .update
= upload_wm_surfaces
,
385 .emit_reloc
= emit_reloc_wm_surfaces
,