src/mesa/drivers/dri/i965/brw_wm_surface_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/mtypes.h"
  34 #include "main/texformat.h"
  35 #include "main/texstore.h"
  36
  37 #include "intel_mipmap_tree.h"
  38 #include "intel_batchbuffer.h"
  39 #include "intel_tex.h"
  40
  41
  42 #include "brw_context.h"
  43 #include "brw_state.h"
  44 #include "brw_defines.h"
  45
  46
  47 static GLuint translate_tex_target( GLenum target )
  48 {
  49    switch (target) {
  50    case GL_TEXTURE_1D:
  51       return BRW_SURFACE_1D;
  52
  53    case GL_TEXTURE_RECTANGLE_NV:
  54       return BRW_SURFACE_2D;
  55
  56    case GL_TEXTURE_2D:
  57       return BRW_SURFACE_2D;
  58
  59    case GL_TEXTURE_3D:
  60       return BRW_SURFACE_3D;
  61
  62    case GL_TEXTURE_CUBE_MAP:
  63       return BRW_SURFACE_CUBE;
  64
  65    default:
  66       assert(0);
  67       return 0;
  68    }
  69 }
  70
  71
  72 static GLuint translate_tex_format( GLuint mesa_format, GLenum depth_mode )
  73 {
  74    switch( mesa_format ) {
  75    case MESA_FORMAT_L8:
  76       return BRW_SURFACEFORMAT_L8_UNORM;
  77
  78    case MESA_FORMAT_I8:
  79       return BRW_SURFACEFORMAT_I8_UNORM;
  80
  81    case MESA_FORMAT_A8:
  82       return BRW_SURFACEFORMAT_A8_UNORM;
  83
  84    case MESA_FORMAT_AL88:
  85       return BRW_SURFACEFORMAT_L8A8_UNORM;
  86
  87    case MESA_FORMAT_RGB888:
  88       assert(0);                /* not supported for sampling */
  89       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
  90
  91    case MESA_FORMAT_ARGB8888:
  92       return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  93
  94    case MESA_FORMAT_RGBA8888_REV:
  95       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
  96
  97    case MESA_FORMAT_RGB565:
  98       return BRW_SURFACEFORMAT_B5G6R5_UNORM;
  99
 100    case MESA_FORMAT_ARGB1555:
 101       return BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
 102
 103    case MESA_FORMAT_ARGB4444:
 104       return BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
 105
 106    case MESA_FORMAT_YCBCR_REV:
 107       return BRW_SURFACEFORMAT_YCRCB_NORMAL;
 108
 109    case MESA_FORMAT_YCBCR:
 110       return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
 111
 112    case MESA_FORMAT_RGB_FXT1:
 113    case MESA_FORMAT_RGBA_FXT1:
 114       return BRW_SURFACEFORMAT_FXT1;
 115
 116    case MESA_FORMAT_Z16:
 117       if (depth_mode == GL_INTENSITY)
 118           return BRW_SURFACEFORMAT_I16_UNORM;
 119       else if (depth_mode == GL_ALPHA)
 120           return BRW_SURFACEFORMAT_A16_UNORM;
 121       else
 122           return BRW_SURFACEFORMAT_L16_UNORM;
 123
 124    case MESA_FORMAT_RGB_DXT1:
 125        return BRW_SURFACEFORMAT_DXT1_RGB;
 126
 127    case MESA_FORMAT_RGBA_DXT1:
 128        return BRW_SURFACEFORMAT_BC1_UNORM;
 129
 130    case MESA_FORMAT_RGBA_DXT3:
 131        return BRW_SURFACEFORMAT_BC2_UNORM;
 132
 133    case MESA_FORMAT_RGBA_DXT5:
 134        return BRW_SURFACEFORMAT_BC3_UNORM;
 135
 136    case MESA_FORMAT_SRGBA8:
 137       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
 138    case MESA_FORMAT_SRGB_DXT1:
 139       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 140
 141    case MESA_FORMAT_S8_Z24:
 142       /* XXX: these different surface formats don't seem to
 143        * make any difference for shadow sampler/compares.
 144        */
 145       if (depth_mode == GL_INTENSITY)
 146          return BRW_SURFACEFORMAT_I24X8_UNORM;
 147       else if (depth_mode == GL_ALPHA)
 148          return BRW_SURFACEFORMAT_A24X8_UNORM;
 149       else
 150          return BRW_SURFACEFORMAT_L24X8_UNORM;
 151
 152    default:
 153       assert(0);
 154       return 0;
 155    }
 156 }
 157
 158 struct brw_wm_surface_key {
 159    GLenum target, depthmode;
 160    dri_bo *bo;
 161    GLint format;
 162    GLint first_level, last_level;
 163    GLint width, height, depth;
 164    GLint pitch, cpp;
 165    uint32_t tiling;
 166    GLuint offset;
 167 };
 168
 169 static void
 170 brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling)
 171 {
 172    switch (tiling) {
 173    case I915_TILING_NONE:
 174       surf->ss3.tiled_surface = 0;
 175       surf->ss3.tile_walk = 0;
 176       break;
 177    case I915_TILING_X:
 178       surf->ss3.tiled_surface = 1;
 179       surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 180       break;
 181    case I915_TILING_Y:
 182       surf->ss3.tiled_surface = 1;
 183       surf->ss3.tile_walk = BRW_TILEWALK_YMAJOR;
 184       break;
 185    }
 186 }
 187
 188 static dri_bo *
 189 brw_create_texture_surface( struct brw_context *brw,
 190                             struct brw_wm_surface_key *key )
 191 {
 192    struct brw_surface_state surf;
 193    dri_bo *bo;
 194
 195    memset(&surf, 0, sizeof(surf));
 196
 197    surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 198    surf.ss0.surface_type = translate_tex_target(key->target);
 199
 200    if (key->bo)
 201       surf.ss0.surface_format = translate_tex_format(key->format, key->depthmode);
 202    else {
 203       switch (key->depth) {
 204       case 32:
 205          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 206          break;
 207       default:
 208       case 24:
 209          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
 210          break;
 211       case 16:
 212          surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 213          break;
 214       }
 215    }
 216
 217    /* This is ok for all textures with channel width 8bit or less:
 218     */
 219 /*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 220    if (key->bo)
 221       surf.ss1.base_addr = key->bo->offset; /* reloc */
 222    else
 223       surf.ss1.base_addr = key->offset;
 224
 225    surf.ss2.mip_count = key->last_level - key->first_level;
 226    surf.ss2.width = key->width - 1;
 227    surf.ss2.height = key->height - 1;
 228    brw_set_surface_tiling(&surf, key->tiling);
 229    surf.ss3.pitch = (key->pitch * key->cpp) - 1;
 230    surf.ss3.depth = key->depth - 1;
 231
 232    surf.ss4.min_lod = 0;
 233
 234    if (key->target == GL_TEXTURE_CUBE_MAP) {
 235       surf.ss0.cube_pos_x = 1;
 236       surf.ss0.cube_pos_y = 1;
 237       surf.ss0.cube_pos_z = 1;
 238       surf.ss0.cube_neg_x = 1;
 239       surf.ss0.cube_neg_y = 1;
 240       surf.ss0.cube_neg_z = 1;
 241    }
 242
 243    bo = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 244                          key, sizeof(*key),
 245                          &key->bo, key->bo ? 1 : 0,
 246                          &surf, sizeof(surf),
 247                          NULL, NULL);
 248
 249    if (key->bo) {
 250       /* Emit relocation to surface contents */
 251       dri_bo_emit_reloc(bo,
 252                         I915_GEM_DOMAIN_SAMPLER, 0,
 253                         0,
 254                         offsetof(struct brw_surface_state, ss1),
 255                         key->bo);
 256    }
 257    return bo;
 258 }
 259
 260 static void
 261 brw_update_texture_surface( GLcontext *ctx, GLuint unit )
 262 {
 263    struct brw_context *brw = brw_context(ctx);
 264    struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
 265    struct intel_texture_object *intelObj = intel_texture_object(tObj);
 266    struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
 267    struct brw_wm_surface_key key;
 268
 269    memset(&key, 0, sizeof(key));
 270
 271    if (intelObj->imageOverride) {
 272       key.pitch = intelObj->pitchOverride / intelObj->mt->cpp;
 273       key.depth = intelObj->depthOverride;
 274       key.bo = NULL;
 275       key.offset = intelObj->textureOffset;
 276    } else {
 277       key.format = firstImage->TexFormat->MesaFormat;
 278       key.pitch = intelObj->mt->pitch;
 279       key.depth = firstImage->Depth;
 280       key.bo = intelObj->mt->region->buffer;
 281       key.offset = 0;
 282    }
 283
 284    key.target = tObj->Target;
 285    key.depthmode = tObj->DepthMode;
 286    key.first_level = intelObj->firstLevel;
 287    key.last_level = intelObj->lastLevel;
 288    key.width = firstImage->Width;
 289    key.height = firstImage->Height;
 290    key.cpp = intelObj->mt->cpp;
 291    key.tiling = intelObj->mt->region->tiling;
 292
 293    dri_bo_unreference(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
 294    brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 295                                                                &key, sizeof(key),
 296                                                                &key.bo, key.bo ? 1 : 0,
 297                                                                NULL);
 298    if (brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] == NULL) {
 299       brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_create_texture_surface(brw, &key);
 300    }
 301 }
 302
 303 /**
 304  * Sets up a surface state structure to point at the given region.
 305  * While it is only used for the front/back buffer currently, it should be
 306  * usable for further buffers when doing ARB_draw_buffer support.
 307  */
 308 static void
 309 brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
 310                           unsigned int unit, GLboolean cached)
 311 {
 312    GLcontext *ctx = &brw->intel.ctx;
 313    dri_bo *region_bo = NULL;
 314    struct {
 315       unsigned int surface_type;
 316       unsigned int surface_format;
 317       unsigned int width, height, cpp;
 318       GLubyte color_mask[4];
 319       GLboolean color_blend;
 320       uint32_t tiling;
 321    } key;
 322
 323    memset(&key, 0, sizeof(key));
 324
 325    if (region != NULL) {
 326       region_bo = region->buffer;
 327
 328       key.surface_type = BRW_SURFACE_2D;
 329       if (region->cpp == 4)
 330          key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 331       else
 332          key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 333       key.tiling = region->tiling;
 334       key.width = region->pitch; /* XXX: not really! */
 335       key.height = region->height;
 336       key.cpp = region->cpp;
 337    } else {
 338       key.surface_type = BRW_SURFACE_NULL;
 339       key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 340       key.tiling = 0;
 341       key.width = 1;
 342       key.height = 1;
 343       key.cpp = 4;
 344    }
 345    memcpy(key.color_mask, ctx->Color.ColorMask,
 346           sizeof(key.color_mask));
 347    key.color_blend = (!ctx->Color._LogicOpEnabled &&
 348                       ctx->Color.BlendEnabled);
 349
 350    dri_bo_unreference(brw->wm.surf_bo[unit]);
 351    brw->wm.surf_bo[unit] = NULL;
 352    if (cached)
 353        brw->wm.surf_bo[unit] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 354                &key, sizeof(key),
 355                &region_bo, 1,
 356                NULL);
 357
 358    if (brw->wm.surf_bo[unit] == NULL) {
 359       struct brw_surface_state surf;
 360
 361       memset(&surf, 0, sizeof(surf));
 362
 363       surf.ss0.surface_format = key.surface_format;
 364       surf.ss0.surface_type = key.surface_type;
 365       if (region_bo != NULL)
 366          surf.ss1.base_addr = region_bo->offset; /* reloc */
 367
 368       surf.ss2.width = key.width - 1;
 369       surf.ss2.height = key.height - 1;
 370       brw_set_surface_tiling(&surf, key.tiling);
 371       surf.ss3.pitch = (key.width * key.cpp) - 1;
 372
 373       /* _NEW_COLOR */
 374       surf.ss0.color_blend = key.color_blend;
 375       surf.ss0.writedisable_red =   !key.color_mask[0];
 376       surf.ss0.writedisable_green = !key.color_mask[1];
 377       surf.ss0.writedisable_blue =  !key.color_mask[2];
 378       surf.ss0.writedisable_alpha = !key.color_mask[3];
 379
 380       /* Key size will never match key size for textures, so we're safe. */
 381       brw->wm.surf_bo[unit] = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 382                                               &key, sizeof(key),
 383                                                &region_bo, 1,
 384                                                &surf, sizeof(surf),
 385                                                NULL, NULL);
 386       if (region_bo != NULL) {
 387          /* We might sample from it, and we might render to it, so flag
 388           * them both.  We might be able to figure out from other state
 389           * a more restrictive relocation to emit.
 390           */
 391          dri_bo_emit_reloc(brw->wm.surf_bo[unit],
 392                            I915_GEM_DOMAIN_RENDER,
 393                            I915_GEM_DOMAIN_RENDER,
 394                            0,
 395                            offsetof(struct brw_surface_state, ss1),
 396                            region_bo);
 397       }
 398    }
 399 }
 400
 401
 402 /**
 403  * Constructs the binding table for the WM surface state, which maps unit
 404  * numbers to surface state objects.
 405  */
 406 static dri_bo *
 407 brw_wm_get_binding_table(struct brw_context *brw)
 408 {
 409    dri_bo *bind_bo;
 410
 411    bind_bo = brw_search_cache(&brw->cache, BRW_SS_SURF_BIND,
 412                               NULL, 0,
 413                               brw->wm.surf_bo, brw->wm.nr_surfaces,
 414                               NULL);
 415
 416    if (bind_bo == NULL) {
 417       GLuint data_size = brw->wm.nr_surfaces * sizeof(GLuint);
 418       uint32_t *data = malloc(data_size);
 419       int i;
 420
 421       for (i = 0; i < brw->wm.nr_surfaces; i++)
 422          if (brw->wm.surf_bo[i])
 423             data[i] = brw->wm.surf_bo[i]->offset;
 424          else
 425             data[i] = 0;
 426
 427       bind_bo = brw_upload_cache( &brw->cache, BRW_SS_SURF_BIND,
 428                                   NULL, 0,
 429                                   brw->wm.surf_bo, brw->wm.nr_surfaces,
 430                                   data, data_size,
 431                                   NULL, NULL);
 432
 433       /* Emit binding table relocations to surface state */
 434       for (i = 0; i < BRW_WM_MAX_SURF; i++) {
 435          if (brw->wm.surf_bo[i] != NULL) {
 436             dri_bo_emit_reloc(bind_bo,
 437                               I915_GEM_DOMAIN_INSTRUCTION, 0,
 438                               0,
 439                               i * sizeof(GLuint),
 440                               brw->wm.surf_bo[i]);
 441          }
 442       }
 443
 444       free(data);
 445    }
 446
 447    return bind_bo;
 448 }
 449
 450 static void prepare_wm_surfaces(struct brw_context *brw )
 451 {
 452    GLcontext *ctx = &brw->intel.ctx;
 453    struct intel_context *intel = &brw->intel;
 454    GLuint i;
 455    int old_nr_surfaces;
 456
 457    if (brw->state.nr_draw_regions  > 1) {
 458       for (i = 0; i < brw->state.nr_draw_regions; i++) {
 459          brw_update_region_surface(brw, brw->state.draw_regions[i], i,
 460                                    GL_FALSE);
 461       }
 462    }else {
 463       brw_update_region_surface(brw, brw->state.draw_regions[0], 0, GL_TRUE);
 464    }
 465
 466    old_nr_surfaces = brw->wm.nr_surfaces;
 467    brw->wm.nr_surfaces = MAX_DRAW_BUFFERS;
 468
 469    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 470       struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i];
 471
 472       /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
 473       if(texUnit->_ReallyEnabled) {
 474          if (texUnit->_Current == intel->frame_buffer_texobj) {
 475             dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 476             brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = brw->wm.surf_bo[0];
 477             dri_bo_reference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 478             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 479          } else {
 480             brw_update_texture_surface(ctx, i);
 481             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 482          }
 483       } else {
 484          dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 485          brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = NULL;
 486       }
 487
 488    }
 489
 490    dri_bo_unreference(brw->wm.bind_bo);
 491    brw->wm.bind_bo = brw_wm_get_binding_table(brw);
 492
 493    if (brw->wm.nr_surfaces != old_nr_surfaces)
 494       brw->state.dirty.brw |= BRW_NEW_NR_SURFACES;
 495 }
 496
 497
 498 const struct brw_tracked_state brw_wm_surfaces = {
 499    .dirty = {
 500       .mesa = _NEW_COLOR | _NEW_TEXTURE | _NEW_BUFFERS,
 501       .brw = BRW_NEW_CONTEXT,
 502       .cache = 0
 503    },
 504    .prepare = prepare_wm_surfaces,
 505 };
 506
 507
 508