2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "main/mtypes.h"
34 #include "main/texstore.h"
35 #include "shader/prog_parameter.h"
37 #include "intel_mipmap_tree.h"
38 #include "intel_batchbuffer.h"
39 #include "intel_tex.h"
40 #include "intel_fbo.h"
42 #include "brw_context.h"
43 #include "brw_state.h"
44 #include "brw_defines.h"
47 static GLuint
translate_tex_target( GLenum target
)
51 return BRW_SURFACE_1D
;
53 case GL_TEXTURE_RECTANGLE_NV
:
54 return BRW_SURFACE_2D
;
57 return BRW_SURFACE_2D
;
60 return BRW_SURFACE_3D
;
62 case GL_TEXTURE_CUBE_MAP
:
63 return BRW_SURFACE_CUBE
;
72 static GLuint
translate_tex_format( gl_format mesa_format
,
73 GLenum internal_format
,
76 switch( mesa_format
) {
78 return BRW_SURFACEFORMAT_L8_UNORM
;
81 return BRW_SURFACEFORMAT_I8_UNORM
;
84 return BRW_SURFACEFORMAT_A8_UNORM
;
86 case MESA_FORMAT_AL88
:
87 return BRW_SURFACEFORMAT_L8A8_UNORM
;
89 case MESA_FORMAT_AL1616
:
90 return BRW_SURFACEFORMAT_L16A16_UNORM
;
92 case MESA_FORMAT_RGB888
:
93 assert(0); /* not supported for sampling */
94 return BRW_SURFACEFORMAT_R8G8B8_UNORM
;
96 case MESA_FORMAT_ARGB8888
:
97 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
99 case MESA_FORMAT_XRGB8888
:
100 return BRW_SURFACEFORMAT_B8G8R8X8_UNORM
;
102 case MESA_FORMAT_RGBA8888_REV
:
103 _mesa_problem(NULL
, "unexpected format in i965:translate_tex_format()");
104 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM
;
106 case MESA_FORMAT_RGB565
:
107 return BRW_SURFACEFORMAT_B5G6R5_UNORM
;
109 case MESA_FORMAT_ARGB1555
:
110 return BRW_SURFACEFORMAT_B5G5R5A1_UNORM
;
112 case MESA_FORMAT_ARGB4444
:
113 return BRW_SURFACEFORMAT_B4G4R4A4_UNORM
;
115 case MESA_FORMAT_YCBCR_REV
:
116 return BRW_SURFACEFORMAT_YCRCB_NORMAL
;
118 case MESA_FORMAT_YCBCR
:
119 return BRW_SURFACEFORMAT_YCRCB_SWAPUVY
;
121 case MESA_FORMAT_RGB_FXT1
:
122 case MESA_FORMAT_RGBA_FXT1
:
123 return BRW_SURFACEFORMAT_FXT1
;
125 case MESA_FORMAT_Z16
:
126 if (depth_mode
== GL_INTENSITY
)
127 return BRW_SURFACEFORMAT_I16_UNORM
;
128 else if (depth_mode
== GL_ALPHA
)
129 return BRW_SURFACEFORMAT_A16_UNORM
;
131 return BRW_SURFACEFORMAT_L16_UNORM
;
133 case MESA_FORMAT_RGB_DXT1
:
134 return BRW_SURFACEFORMAT_DXT1_RGB
;
136 case MESA_FORMAT_RGBA_DXT1
:
137 return BRW_SURFACEFORMAT_BC1_UNORM
;
139 case MESA_FORMAT_RGBA_DXT3
:
140 return BRW_SURFACEFORMAT_BC2_UNORM
;
142 case MESA_FORMAT_RGBA_DXT5
:
143 return BRW_SURFACEFORMAT_BC3_UNORM
;
145 case MESA_FORMAT_SARGB8
:
146 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB
;
148 case MESA_FORMAT_SLA8
:
149 return BRW_SURFACEFORMAT_L8A8_UNORM_SRGB
;
151 case MESA_FORMAT_SL8
:
152 return BRW_SURFACEFORMAT_L8_UNORM_SRGB
;
154 case MESA_FORMAT_SRGB_DXT1
:
155 return BRW_SURFACEFORMAT_BC1_UNORM_SRGB
;
157 case MESA_FORMAT_S8_Z24
:
158 /* XXX: these different surface formats don't seem to
159 * make any difference for shadow sampler/compares.
161 if (depth_mode
== GL_INTENSITY
)
162 return BRW_SURFACEFORMAT_I24X8_UNORM
;
163 else if (depth_mode
== GL_ALPHA
)
164 return BRW_SURFACEFORMAT_A24X8_UNORM
;
166 return BRW_SURFACEFORMAT_L24X8_UNORM
;
168 case MESA_FORMAT_DUDV8
:
169 return BRW_SURFACEFORMAT_R8G8_SNORM
;
171 case MESA_FORMAT_SIGNED_RGBA8888_REV
:
172 return BRW_SURFACEFORMAT_R8G8B8A8_SNORM
;
181 brw_set_surface_tiling(struct brw_surface_state
*surf
, uint32_t tiling
)
184 case I915_TILING_NONE
:
185 surf
->ss3
.tiled_surface
= 0;
186 surf
->ss3
.tile_walk
= 0;
189 surf
->ss3
.tiled_surface
= 1;
190 surf
->ss3
.tile_walk
= BRW_TILEWALK_XMAJOR
;
193 surf
->ss3
.tiled_surface
= 1;
194 surf
->ss3
.tile_walk
= BRW_TILEWALK_YMAJOR
;
200 brw_create_texture_surface( struct brw_context
*brw
,
201 struct brw_surface_key
*key
)
203 struct brw_surface_state surf
;
206 memset(&surf
, 0, sizeof(surf
));
208 surf
.ss0
.mipmap_layout_mode
= BRW_SURFACE_MIPMAPLAYOUT_BELOW
;
209 surf
.ss0
.surface_type
= translate_tex_target(key
->target
);
211 surf
.ss0
.surface_format
= translate_tex_format(key
->format
,
212 key
->internal_format
,
216 switch (key
->depth
) {
218 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
222 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B8G8R8X8_UNORM
;
225 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B5G6R5_UNORM
;
230 /* This is ok for all textures with channel width 8bit or less:
232 /* surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
234 surf
.ss1
.base_addr
= key
->bo
->offset
; /* reloc */
236 surf
.ss1
.base_addr
= key
->offset
;
238 surf
.ss2
.mip_count
= key
->last_level
- key
->first_level
;
239 surf
.ss2
.width
= key
->width
- 1;
240 surf
.ss2
.height
= key
->height
- 1;
241 brw_set_surface_tiling(&surf
, key
->tiling
);
242 surf
.ss3
.pitch
= (key
->pitch
* key
->cpp
) - 1;
243 surf
.ss3
.depth
= key
->depth
- 1;
245 surf
.ss4
.min_lod
= 0;
247 if (key
->target
== GL_TEXTURE_CUBE_MAP
) {
248 surf
.ss0
.cube_pos_x
= 1;
249 surf
.ss0
.cube_pos_y
= 1;
250 surf
.ss0
.cube_pos_z
= 1;
251 surf
.ss0
.cube_neg_x
= 1;
252 surf
.ss0
.cube_neg_y
= 1;
253 surf
.ss0
.cube_neg_z
= 1;
256 bo
= brw_upload_cache(&brw
->surface_cache
, BRW_SS_SURFACE
,
258 &key
->bo
, key
->bo
? 1 : 0,
263 /* Emit relocation to surface contents */
264 dri_bo_emit_reloc(bo
,
265 I915_GEM_DOMAIN_SAMPLER
, 0,
267 offsetof(struct brw_surface_state
, ss1
),
274 brw_update_texture_surface( GLcontext
*ctx
, GLuint unit
)
276 struct brw_context
*brw
= brw_context(ctx
);
277 struct gl_texture_object
*tObj
= ctx
->Texture
.Unit
[unit
]._Current
;
278 struct intel_texture_object
*intelObj
= intel_texture_object(tObj
);
279 struct gl_texture_image
*firstImage
= tObj
->Image
[0][intelObj
->firstLevel
];
280 struct brw_surface_key key
;
281 const GLuint surf
= SURF_INDEX_TEXTURE(unit
);
283 memset(&key
, 0, sizeof(key
));
285 if (intelObj
->imageOverride
) {
286 key
.pitch
= intelObj
->pitchOverride
/ intelObj
->mt
->cpp
;
287 key
.depth
= intelObj
->depthOverride
;
289 key
.offset
= intelObj
->textureOffset
;
291 key
.format
= firstImage
->TexFormat
;
292 key
.internal_format
= firstImage
->InternalFormat
;
293 key
.pitch
= intelObj
->mt
->pitch
;
294 key
.depth
= firstImage
->Depth
;
295 key
.bo
= intelObj
->mt
->region
->buffer
;
299 key
.target
= tObj
->Target
;
300 key
.depthmode
= tObj
->DepthMode
;
301 key
.first_level
= intelObj
->firstLevel
;
302 key
.last_level
= intelObj
->lastLevel
;
303 key
.width
= firstImage
->Width
;
304 key
.height
= firstImage
->Height
;
305 key
.cpp
= intelObj
->mt
->cpp
;
306 key
.tiling
= intelObj
->mt
->region
->tiling
;
308 dri_bo_unreference(brw
->wm
.surf_bo
[surf
]);
309 brw
->wm
.surf_bo
[surf
] = brw_search_cache(&brw
->surface_cache
,
312 &key
.bo
, key
.bo
? 1 : 0,
314 if (brw
->wm
.surf_bo
[surf
] == NULL
) {
315 brw
->wm
.surf_bo
[surf
] = brw_create_texture_surface(brw
, &key
);
322 * Create the constant buffer surface. Vertex/fragment shader constants will be
323 * read from this buffer with Data Port Read instructions/messages.
326 brw_create_constant_surface( struct brw_context
*brw
,
327 struct brw_surface_key
*key
)
329 const GLint w
= key
->width
- 1;
330 struct brw_surface_state surf
;
333 memset(&surf
, 0, sizeof(surf
));
335 surf
.ss0
.mipmap_layout_mode
= BRW_SURFACE_MIPMAPLAYOUT_BELOW
;
336 surf
.ss0
.surface_type
= BRW_SURFACE_BUFFER
;
337 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
;
341 surf
.ss1
.base_addr
= key
->bo
->offset
; /* reloc */
343 surf
.ss1
.base_addr
= key
->offset
;
345 surf
.ss2
.width
= w
& 0x7f; /* bits 6:0 of size or width */
346 surf
.ss2
.height
= (w
>> 7) & 0x1fff; /* bits 19:7 of size or width */
347 surf
.ss3
.depth
= (w
>> 20) & 0x7f; /* bits 26:20 of size or width */
348 surf
.ss3
.pitch
= (key
->pitch
* key
->cpp
) - 1; /* ignored?? */
349 brw_set_surface_tiling(&surf
, key
->tiling
); /* tiling now allowed */
351 bo
= brw_upload_cache(&brw
->surface_cache
, BRW_SS_SURFACE
,
353 &key
->bo
, key
->bo
? 1 : 0,
358 /* Emit relocation to surface contents. Section 5.1.1 of the gen4
359 * bspec ("Data Cache") says that the data cache does not exist as
360 * a separate cache and is just the sampler cache.
362 dri_bo_emit_reloc(bo
,
363 I915_GEM_DOMAIN_SAMPLER
, 0,
365 offsetof(struct brw_surface_state
, ss1
),
372 /* Creates a new WM constant buffer reflecting the current fragment program's
373 * constants, if needed by the fragment program.
375 * Otherwise, constants go through the CURBEs using the brw_constant_buffer
378 static drm_intel_bo
*
379 brw_wm_update_constant_buffer(struct brw_context
*brw
)
381 struct intel_context
*intel
= &brw
->intel
;
382 struct brw_fragment_program
*fp
=
383 (struct brw_fragment_program
*) brw
->fragment_program
;
384 const struct gl_program_parameter_list
*params
= fp
->program
.Base
.Parameters
;
385 const int size
= params
->NumParameters
* 4 * sizeof(GLfloat
);
386 drm_intel_bo
*const_buffer
;
388 /* BRW_NEW_FRAGMENT_PROGRAM */
389 if (!fp
->use_const_buffer
)
392 const_buffer
= drm_intel_bo_alloc(intel
->bufmgr
, "fp_const_buffer",
395 /* _NEW_PROGRAM_CONSTANTS */
396 dri_bo_subdata(const_buffer
, 0, size
, params
->ParameterValues
);
402 * Update the surface state for a WM constant buffer.
403 * The constant buffer will be (re)allocated here if needed.
406 brw_update_wm_constant_surface( GLcontext
*ctx
,
409 struct brw_context
*brw
= brw_context(ctx
);
410 struct brw_surface_key key
;
411 struct brw_fragment_program
*fp
=
412 (struct brw_fragment_program
*) brw
->fragment_program
;
413 const struct gl_program_parameter_list
*params
=
414 fp
->program
.Base
.Parameters
;
416 /* If we're in this state update atom, we need to update WM constants, so
417 * free the old buffer and create a new one for the new contents.
419 dri_bo_unreference(fp
->const_buffer
);
420 fp
->const_buffer
= brw_wm_update_constant_buffer(brw
);
422 /* If there's no constant buffer, then no surface BO is needed to point at
425 if (fp
->const_buffer
== 0) {
426 drm_intel_bo_unreference(brw
->wm
.surf_bo
[surf
]);
427 brw
->wm
.surf_bo
[surf
] = NULL
;
431 memset(&key
, 0, sizeof(key
));
433 key
.format
= MESA_FORMAT_RGBA_FLOAT32
;
434 key
.internal_format
= GL_RGBA
;
435 key
.bo
= fp
->const_buffer
;
436 key
.depthmode
= GL_NONE
;
437 key
.pitch
= params
->NumParameters
;
438 key
.width
= params
->NumParameters
;
444 printf("%s:\n", __FUNCTION__);
445 printf(" width %d height %d depth %d cpp %d pitch %d\n",
446 key.width, key.height, key.depth, key.cpp, key.pitch);
449 dri_bo_unreference(brw
->wm
.surf_bo
[surf
]);
450 brw
->wm
.surf_bo
[surf
] = brw_search_cache(&brw
->surface_cache
,
453 &key
.bo
, key
.bo
? 1 : 0,
455 if (brw
->wm
.surf_bo
[surf
] == NULL
) {
456 brw
->wm
.surf_bo
[surf
] = brw_create_constant_surface(brw
, &key
);
458 brw
->state
.dirty
.brw
|= BRW_NEW_WM_SURFACES
;
462 * Updates surface / buffer for fragment shader constant buffer, if
465 * This consumes the state updates for the constant buffer, and produces
466 * BRW_NEW_WM_SURFACES to get picked up by brw_prepare_wm_surfaces for
467 * inclusion in the binding table.
469 static void prepare_wm_constant_surface(struct brw_context
*brw
)
471 GLcontext
*ctx
= &brw
->intel
.ctx
;
472 struct brw_fragment_program
*fp
=
473 (struct brw_fragment_program
*) brw
->fragment_program
;
474 GLuint surf
= SURF_INDEX_FRAG_CONST_BUFFER
;
476 drm_intel_bo_unreference(fp
->const_buffer
);
477 fp
->const_buffer
= brw_wm_update_constant_buffer(brw
);
479 /* If there's no constant buffer, then no surface BO is needed to point at
482 if (fp
->const_buffer
== 0) {
483 if (brw
->wm
.surf_bo
[surf
] != NULL
) {
484 drm_intel_bo_unreference(brw
->wm
.surf_bo
[surf
]);
485 brw
->wm
.surf_bo
[surf
] = NULL
;
486 brw
->state
.dirty
.brw
|= BRW_NEW_WM_SURFACES
;
491 brw_update_wm_constant_surface(ctx
, surf
);
494 const struct brw_tracked_state brw_wm_constant_surface
= {
496 .mesa
= (_NEW_PROGRAM_CONSTANTS
),
497 .brw
= (BRW_NEW_FRAGMENT_PROGRAM
),
500 .prepare
= prepare_wm_constant_surface
,
505 * Sets up a surface state structure to point at the given region.
506 * While it is only used for the front/back buffer currently, it should be
507 * usable for further buffers when doing ARB_draw_buffer support.
510 brw_update_renderbuffer_surface(struct brw_context
*brw
,
511 struct gl_renderbuffer
*rb
,
514 GLcontext
*ctx
= &brw
->intel
.ctx
;
515 dri_bo
*region_bo
= NULL
;
516 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
517 struct intel_region
*region
= irb
? irb
->region
: NULL
;
519 unsigned int surface_type
;
520 unsigned int surface_format
;
521 unsigned int width
, height
, pitch
, cpp
;
522 GLubyte color_mask
[4];
523 GLboolean color_blend
;
525 uint32_t draw_offset
;
528 memset(&key
, 0, sizeof(key
));
530 if (region
!= NULL
) {
531 region_bo
= region
->buffer
;
533 key
.surface_type
= BRW_SURFACE_2D
;
534 switch (irb
->Base
.Format
) {
535 /* XRGB and ARGB are treated the same here because the chips in this
536 * family cannot render to XRGB targets. This means that we have to
537 * mask writes to alpha (ala glColorMask) and reconfigure the alpha
538 * blending hardware to use GL_ONE (or GL_ZERO) for cases where
539 * GL_DST_ALPHA (or GL_ONE_MINUS_DST_ALPHA) is used.
541 case MESA_FORMAT_ARGB8888
:
542 case MESA_FORMAT_XRGB8888
:
543 key
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
545 case MESA_FORMAT_RGB565
:
546 key
.surface_format
= BRW_SURFACEFORMAT_B5G6R5_UNORM
;
548 case MESA_FORMAT_ARGB1555
:
549 key
.surface_format
= BRW_SURFACEFORMAT_B5G5R5A1_UNORM
;
551 case MESA_FORMAT_ARGB4444
:
552 key
.surface_format
= BRW_SURFACEFORMAT_B4G4R4A4_UNORM
;
555 _mesa_problem(ctx
, "Bad renderbuffer format: %d\n", irb
->Base
.Format
);
557 key
.tiling
= region
->tiling
;
558 if (brw
->intel
.intelScreen
->driScrnPriv
->dri2
.enabled
) {
559 key
.width
= rb
->Width
;
560 key
.height
= rb
->Height
;
562 key
.width
= region
->width
;
563 key
.height
= region
->height
;
565 key
.pitch
= region
->pitch
;
566 key
.cpp
= region
->cpp
;
567 key
.draw_offset
= region
->draw_offset
; /* cur 3d or cube face offset */
569 key
.surface_type
= BRW_SURFACE_NULL
;
570 key
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
571 key
.tiling
= I915_TILING_X
;
578 memcpy(key
.color_mask
, ctx
->Color
.ColorMask
,
579 sizeof(key
.color_mask
));
581 /* As mentioned above, disable writes to the alpha component when the
582 * renderbuffer is XRGB.
584 if (ctx
->DrawBuffer
->Visual
.alphaBits
== 0)
585 key
.color_mask
[3] = GL_FALSE
;
587 key
.color_blend
= (!ctx
->Color
._LogicOpEnabled
&&
588 ctx
->Color
.BlendEnabled
);
590 dri_bo_unreference(brw
->wm
.surf_bo
[unit
]);
591 brw
->wm
.surf_bo
[unit
] = brw_search_cache(&brw
->surface_cache
,
597 if (brw
->wm
.surf_bo
[unit
] == NULL
) {
598 struct brw_surface_state surf
;
600 memset(&surf
, 0, sizeof(surf
));
602 surf
.ss0
.surface_format
= key
.surface_format
;
603 surf
.ss0
.surface_type
= key
.surface_type
;
604 if (key
.tiling
== I915_TILING_NONE
) {
605 surf
.ss1
.base_addr
= key
.draw_offset
;
607 uint32_t tile_offset
= key
.draw_offset
% 4096;
609 surf
.ss1
.base_addr
= key
.draw_offset
- tile_offset
;
611 assert(BRW_IS_G4X(brw
) || tile_offset
== 0);
612 if (BRW_IS_G4X(brw
)) {
613 if (key
.tiling
== I915_TILING_X
) {
614 /* Note that the low bits of these fields are missing, so
615 * there's the possibility of getting in trouble.
617 surf
.ss5
.x_offset
= (tile_offset
% 512) / key
.cpp
/ 4;
618 surf
.ss5
.y_offset
= tile_offset
/ 512 / 2;
620 surf
.ss5
.x_offset
= (tile_offset
% 128) / key
.cpp
/ 4;
621 surf
.ss5
.y_offset
= tile_offset
/ 128 / 2;
625 if (region_bo
!= NULL
)
626 surf
.ss1
.base_addr
+= region_bo
->offset
; /* reloc */
628 surf
.ss2
.width
= key
.width
- 1;
629 surf
.ss2
.height
= key
.height
- 1;
630 brw_set_surface_tiling(&surf
, key
.tiling
);
631 surf
.ss3
.pitch
= (key
.pitch
* key
.cpp
) - 1;
634 surf
.ss0
.color_blend
= key
.color_blend
;
635 surf
.ss0
.writedisable_red
= !key
.color_mask
[0];
636 surf
.ss0
.writedisable_green
= !key
.color_mask
[1];
637 surf
.ss0
.writedisable_blue
= !key
.color_mask
[2];
638 surf
.ss0
.writedisable_alpha
= !key
.color_mask
[3];
640 /* Key size will never match key size for textures, so we're safe. */
641 brw
->wm
.surf_bo
[unit
] = brw_upload_cache(&brw
->surface_cache
,
647 if (region_bo
!= NULL
) {
648 /* We might sample from it, and we might render to it, so flag
649 * them both. We might be able to figure out from other state
650 * a more restrictive relocation to emit.
652 drm_intel_bo_emit_reloc(brw
->wm
.surf_bo
[unit
],
653 offsetof(struct brw_surface_state
, ss1
),
655 surf
.ss1
.base_addr
- region_bo
->offset
,
656 I915_GEM_DOMAIN_RENDER
,
657 I915_GEM_DOMAIN_RENDER
);
664 * Constructs the binding table for the WM surface state, which maps unit
665 * numbers to surface state objects.
668 brw_wm_get_binding_table(struct brw_context
*brw
)
672 assert(brw
->wm
.nr_surfaces
<= BRW_WM_MAX_SURF
);
674 bind_bo
= brw_search_cache(&brw
->surface_cache
, BRW_SS_SURF_BIND
,
676 brw
->wm
.surf_bo
, brw
->wm
.nr_surfaces
,
679 if (bind_bo
== NULL
) {
680 GLuint data_size
= brw
->wm
.nr_surfaces
* sizeof(GLuint
);
681 uint32_t data
[BRW_WM_MAX_SURF
];
684 for (i
= 0; i
< brw
->wm
.nr_surfaces
; i
++)
685 if (brw
->wm
.surf_bo
[i
])
686 data
[i
] = brw
->wm
.surf_bo
[i
]->offset
;
690 bind_bo
= brw_upload_cache( &brw
->surface_cache
, BRW_SS_SURF_BIND
,
692 brw
->wm
.surf_bo
, brw
->wm
.nr_surfaces
,
696 /* Emit binding table relocations to surface state */
697 for (i
= 0; i
< BRW_WM_MAX_SURF
; i
++) {
698 if (brw
->wm
.surf_bo
[i
] != NULL
) {
699 dri_bo_emit_reloc(bind_bo
,
700 I915_GEM_DOMAIN_INSTRUCTION
, 0,
711 static void prepare_wm_surfaces(struct brw_context
*brw
)
713 GLcontext
*ctx
= &brw
->intel
.ctx
;
717 /* _NEW_BUFFERS | _NEW_COLOR */
718 /* Update surfaces for drawing buffers */
719 if (ctx
->DrawBuffer
->_NumColorDrawBuffers
>= 1) {
720 for (i
= 0; i
< ctx
->DrawBuffer
->_NumColorDrawBuffers
; i
++) {
721 brw_update_renderbuffer_surface(brw
,
722 ctx
->DrawBuffer
->_ColorDrawBuffers
[i
],
726 brw_update_renderbuffer_surface(brw
, NULL
, 0);
729 old_nr_surfaces
= brw
->wm
.nr_surfaces
;
730 brw
->wm
.nr_surfaces
= BRW_MAX_DRAW_BUFFERS
;
732 if (brw
->wm
.surf_bo
[SURF_INDEX_FRAG_CONST_BUFFER
] != NULL
)
733 brw
->wm
.nr_surfaces
= SURF_INDEX_FRAG_CONST_BUFFER
+ 1;
735 /* Update surfaces for textures */
736 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
737 const struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[i
];
738 const GLuint surf
= SURF_INDEX_TEXTURE(i
);
740 /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
741 if (texUnit
->_ReallyEnabled
) {
742 brw_update_texture_surface(ctx
, i
);
743 brw
->wm
.nr_surfaces
= surf
+ 1;
745 dri_bo_unreference(brw
->wm
.surf_bo
[surf
]);
746 brw
->wm
.surf_bo
[surf
] = NULL
;
750 dri_bo_unreference(brw
->wm
.bind_bo
);
751 brw
->wm
.bind_bo
= brw_wm_get_binding_table(brw
);
753 if (brw
->wm
.nr_surfaces
!= old_nr_surfaces
)
754 brw
->state
.dirty
.brw
|= BRW_NEW_NR_WM_SURFACES
;
757 const struct brw_tracked_state brw_wm_surfaces
= {
759 .mesa
= (_NEW_COLOR
|
762 .brw
= (BRW_NEW_CONTEXT
|
763 BRW_NEW_WM_SURFACES
),
766 .prepare
= prepare_wm_surfaces
,