src/mesa/drivers/dri/i965/brw_wm_surface_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/mtypes.h"
  34 #include "main/texformat.h"
  35 #include "main/texstore.h"
  36
  37 #include "intel_mipmap_tree.h"
  38 #include "intel_batchbuffer.h"
  39 #include "intel_tex.h"
  40
  41
  42 #include "brw_context.h"
  43 #include "brw_state.h"
  44 #include "brw_defines.h"
  45
  46
  47 static GLuint translate_tex_target( GLenum target )
  48 {
  49    switch (target) {
  50    case GL_TEXTURE_1D:
  51       return BRW_SURFACE_1D;
  52
  53    case GL_TEXTURE_RECTANGLE_NV:
  54       return BRW_SURFACE_2D;
  55
  56    case GL_TEXTURE_2D:
  57       return BRW_SURFACE_2D;
  58
  59    case GL_TEXTURE_3D:
  60       return BRW_SURFACE_3D;
  61
  62    case GL_TEXTURE_CUBE_MAP:
  63       return BRW_SURFACE_CUBE;
  64
  65    default:
  66       assert(0);
  67       return 0;
  68    }
  69 }
  70
  71
  72 static GLuint translate_tex_format( GLuint mesa_format, GLenum internal_format,
  73                                     GLenum depth_mode )
  74 {
  75    switch( mesa_format ) {
  76    case MESA_FORMAT_L8:
  77       return BRW_SURFACEFORMAT_L8_UNORM;
  78
  79    case MESA_FORMAT_I8:
  80       return BRW_SURFACEFORMAT_I8_UNORM;
  81
  82    case MESA_FORMAT_A8:
  83       return BRW_SURFACEFORMAT_A8_UNORM;
  84
  85    case MESA_FORMAT_AL88:
  86       return BRW_SURFACEFORMAT_L8A8_UNORM;
  87
  88    case MESA_FORMAT_RGB888:
  89       assert(0);                /* not supported for sampling */
  90       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
  91
  92    case MESA_FORMAT_ARGB8888:
  93       if (internal_format == GL_RGB)
  94          return BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
  95       else
  96          return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  97
  98    case MESA_FORMAT_RGBA8888_REV:
  99       if (internal_format == GL_RGB)
 100          return BRW_SURFACEFORMAT_R8G8B8X8_UNORM;
 101       else
 102          return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
 103
 104    case MESA_FORMAT_RGB565:
 105       return BRW_SURFACEFORMAT_B5G6R5_UNORM;
 106
 107    case MESA_FORMAT_ARGB1555:
 108       return BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
 109
 110    case MESA_FORMAT_ARGB4444:
 111       return BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
 112
 113    case MESA_FORMAT_YCBCR_REV:
 114       return BRW_SURFACEFORMAT_YCRCB_NORMAL;
 115
 116    case MESA_FORMAT_YCBCR:
 117       return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
 118
 119    case MESA_FORMAT_RGB_FXT1:
 120    case MESA_FORMAT_RGBA_FXT1:
 121       return BRW_SURFACEFORMAT_FXT1;
 122
 123    case MESA_FORMAT_Z16:
 124       if (depth_mode == GL_INTENSITY)
 125           return BRW_SURFACEFORMAT_I16_UNORM;
 126       else if (depth_mode == GL_ALPHA)
 127           return BRW_SURFACEFORMAT_A16_UNORM;
 128       else
 129           return BRW_SURFACEFORMAT_L16_UNORM;
 130
 131    case MESA_FORMAT_RGB_DXT1:
 132        return BRW_SURFACEFORMAT_DXT1_RGB;
 133
 134    case MESA_FORMAT_RGBA_DXT1:
 135        return BRW_SURFACEFORMAT_BC1_UNORM;
 136
 137    case MESA_FORMAT_RGBA_DXT3:
 138        return BRW_SURFACEFORMAT_BC2_UNORM;
 139
 140    case MESA_FORMAT_RGBA_DXT5:
 141        return BRW_SURFACEFORMAT_BC3_UNORM;
 142
 143    case MESA_FORMAT_SRGBA8:
 144       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB;
 145    case MESA_FORMAT_SRGB_DXT1:
 146       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 147
 148    case MESA_FORMAT_S8_Z24:
 149       /* XXX: these different surface formats don't seem to
 150        * make any difference for shadow sampler/compares.
 151        */
 152       if (depth_mode == GL_INTENSITY)
 153          return BRW_SURFACEFORMAT_I24X8_UNORM;
 154       else if (depth_mode == GL_ALPHA)
 155          return BRW_SURFACEFORMAT_A24X8_UNORM;
 156       else
 157          return BRW_SURFACEFORMAT_L24X8_UNORM;
 158
 159    case MESA_FORMAT_DUDV8:
 160       return BRW_SURFACEFORMAT_R8G8_SNORM;
 161
 162    default:
 163       assert(0);
 164       return 0;
 165    }
 166 }
 167
 168 struct brw_wm_surface_key {
 169    GLenum target, depthmode;
 170    dri_bo *bo;
 171    GLint format, internal_format;
 172    GLint first_level, last_level;
 173    GLint width, height, depth;
 174    GLint pitch, cpp;
 175    uint32_t tiling;
 176    GLuint offset;
 177 };
 178
 179 static void
 180 brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling)
 181 {
 182    switch (tiling) {
 183    case I915_TILING_NONE:
 184       surf->ss3.tiled_surface = 0;
 185       surf->ss3.tile_walk = 0;
 186       break;
 187    case I915_TILING_X:
 188       surf->ss3.tiled_surface = 1;
 189       surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 190       break;
 191    case I915_TILING_Y:
 192       surf->ss3.tiled_surface = 1;
 193       surf->ss3.tile_walk = BRW_TILEWALK_YMAJOR;
 194       break;
 195    }
 196 }
 197
 198 static dri_bo *
 199 brw_create_texture_surface( struct brw_context *brw,
 200                             struct brw_wm_surface_key *key )
 201 {
 202    struct brw_surface_state surf;
 203    dri_bo *bo;
 204
 205    memset(&surf, 0, sizeof(surf));
 206
 207    surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 208    surf.ss0.surface_type = translate_tex_target(key->target);
 209    if (key->bo) {
 210       surf.ss0.surface_format = translate_tex_format(key->format,
 211                                                      key->internal_format,
 212                                                      key->depthmode);
 213    }
 214    else {
 215       switch (key->depth) {
 216       case 32:
 217          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 218          break;
 219       default:
 220       case 24:
 221          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
 222          break;
 223       case 16:
 224          surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 225          break;
 226       }
 227    }
 228
 229    /* This is ok for all textures with channel width 8bit or less:
 230     */
 231 /*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 232    if (key->bo)
 233       surf.ss1.base_addr = key->bo->offset; /* reloc */
 234    else
 235       surf.ss1.base_addr = key->offset;
 236
 237    surf.ss2.mip_count = key->last_level - key->first_level;
 238    surf.ss2.width = key->width - 1;
 239    surf.ss2.height = key->height - 1;
 240    brw_set_surface_tiling(&surf, key->tiling);
 241    surf.ss3.pitch = (key->pitch * key->cpp) - 1;
 242    surf.ss3.depth = key->depth - 1;
 243
 244    surf.ss4.min_lod = 0;
 245
 246    if (key->target == GL_TEXTURE_CUBE_MAP) {
 247       surf.ss0.cube_pos_x = 1;
 248       surf.ss0.cube_pos_y = 1;
 249       surf.ss0.cube_pos_z = 1;
 250       surf.ss0.cube_neg_x = 1;
 251       surf.ss0.cube_neg_y = 1;
 252       surf.ss0.cube_neg_z = 1;
 253    }
 254
 255    bo = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 256                          key, sizeof(*key),
 257                          &key->bo, key->bo ? 1 : 0,
 258                          &surf, sizeof(surf),
 259                          NULL, NULL);
 260
 261    if (key->bo) {
 262       /* Emit relocation to surface contents */
 263       dri_bo_emit_reloc(bo,
 264                         I915_GEM_DOMAIN_SAMPLER, 0,
 265                         0,
 266                         offsetof(struct brw_surface_state, ss1),
 267                         key->bo);
 268    }
 269    return bo;
 270 }
 271
 272 static void
 273 brw_update_texture_surface( GLcontext *ctx, GLuint unit )
 274 {
 275    struct brw_context *brw = brw_context(ctx);
 276    struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
 277    struct intel_texture_object *intelObj = intel_texture_object(tObj);
 278    struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
 279    struct brw_wm_surface_key key;
 280
 281    memset(&key, 0, sizeof(key));
 282
 283    if (intelObj->imageOverride) {
 284       key.pitch = intelObj->pitchOverride / intelObj->mt->cpp;
 285       key.depth = intelObj->depthOverride;
 286       key.bo = NULL;
 287       key.offset = intelObj->textureOffset;
 288    } else {
 289       key.format = firstImage->TexFormat->MesaFormat;
 290       key.internal_format = firstImage->InternalFormat;
 291       key.pitch = intelObj->mt->pitch;
 292       key.depth = firstImage->Depth;
 293       key.bo = intelObj->mt->region->buffer;
 294       key.offset = 0;
 295    }
 296
 297    key.target = tObj->Target;
 298    key.depthmode = tObj->DepthMode;
 299    key.first_level = intelObj->firstLevel;
 300    key.last_level = intelObj->lastLevel;
 301    key.width = firstImage->Width;
 302    key.height = firstImage->Height;
 303    key.cpp = intelObj->mt->cpp;
 304    key.tiling = intelObj->mt->region->tiling;
 305
 306    dri_bo_unreference(brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS]);
 307    brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 308                                                                &key, sizeof(key),
 309                                                                &key.bo, key.bo ? 1 : 0,
 310                                                                NULL);
 311    if (brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] == NULL) {
 312       brw->wm.surf_bo[unit + MAX_DRAW_BUFFERS] = brw_create_texture_surface(brw, &key);
 313    }
 314 }
 315
 316 /**
 317  * Sets up a surface state structure to point at the given region.
 318  * While it is only used for the front/back buffer currently, it should be
 319  * usable for further buffers when doing ARB_draw_buffer support.
 320  */
 321 static void
 322 brw_update_region_surface(struct brw_context *brw, struct intel_region *region,
 323                           unsigned int unit, GLboolean cached)
 324 {
 325    GLcontext *ctx = &brw->intel.ctx;
 326    dri_bo *region_bo = NULL;
 327    struct {
 328       unsigned int surface_type;
 329       unsigned int surface_format;
 330       unsigned int width, height, cpp;
 331       GLubyte color_mask[4];
 332       GLboolean color_blend;
 333       uint32_t tiling;
 334    } key;
 335
 336    memset(&key, 0, sizeof(key));
 337
 338    if (region != NULL) {
 339       region_bo = region->buffer;
 340
 341       key.surface_type = BRW_SURFACE_2D;
 342       if (region->cpp == 4)
 343          key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 344       else
 345          key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 346       key.tiling = region->tiling;
 347       key.width = region->pitch; /* XXX: not really! */
 348       key.height = region->height;
 349       key.cpp = region->cpp;
 350    } else {
 351       key.surface_type = BRW_SURFACE_NULL;
 352       key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 353       key.tiling = 0;
 354       key.width = 1;
 355       key.height = 1;
 356       key.cpp = 4;
 357    }
 358    memcpy(key.color_mask, ctx->Color.ColorMask,
 359           sizeof(key.color_mask));
 360    key.color_blend = (!ctx->Color._LogicOpEnabled &&
 361                       ctx->Color.BlendEnabled);
 362
 363    dri_bo_unreference(brw->wm.surf_bo[unit]);
 364    brw->wm.surf_bo[unit] = NULL;
 365    if (cached)
 366        brw->wm.surf_bo[unit] = brw_search_cache(&brw->cache, BRW_SS_SURFACE,
 367                &key, sizeof(key),
 368                &region_bo, 1,
 369                NULL);
 370
 371    if (brw->wm.surf_bo[unit] == NULL) {
 372       struct brw_surface_state surf;
 373
 374       memset(&surf, 0, sizeof(surf));
 375
 376       surf.ss0.surface_format = key.surface_format;
 377       surf.ss0.surface_type = key.surface_type;
 378       if (region_bo != NULL)
 379          surf.ss1.base_addr = region_bo->offset; /* reloc */
 380
 381       surf.ss2.width = key.width - 1;
 382       surf.ss2.height = key.height - 1;
 383       brw_set_surface_tiling(&surf, key.tiling);
 384       surf.ss3.pitch = (key.width * key.cpp) - 1;
 385
 386       /* _NEW_COLOR */
 387       surf.ss0.color_blend = key.color_blend;
 388       surf.ss0.writedisable_red =   !key.color_mask[0];
 389       surf.ss0.writedisable_green = !key.color_mask[1];
 390       surf.ss0.writedisable_blue =  !key.color_mask[2];
 391       surf.ss0.writedisable_alpha = !key.color_mask[3];
 392
 393       /* Key size will never match key size for textures, so we're safe. */
 394       brw->wm.surf_bo[unit] = brw_upload_cache(&brw->cache, BRW_SS_SURFACE,
 395                                               &key, sizeof(key),
 396                                                &region_bo, 1,
 397                                                &surf, sizeof(surf),
 398                                                NULL, NULL);
 399       if (region_bo != NULL) {
 400          /* We might sample from it, and we might render to it, so flag
 401           * them both.  We might be able to figure out from other state
 402           * a more restrictive relocation to emit.
 403           */
 404          dri_bo_emit_reloc(brw->wm.surf_bo[unit],
 405                            I915_GEM_DOMAIN_RENDER,
 406                            I915_GEM_DOMAIN_RENDER,
 407                            0,
 408                            offsetof(struct brw_surface_state, ss1),
 409                            region_bo);
 410       }
 411    }
 412 }
 413
 414
 415 /**
 416  * Constructs the binding table for the WM surface state, which maps unit
 417  * numbers to surface state objects.
 418  */
 419 static dri_bo *
 420 brw_wm_get_binding_table(struct brw_context *brw)
 421 {
 422    dri_bo *bind_bo;
 423
 424    bind_bo = brw_search_cache(&brw->cache, BRW_SS_SURF_BIND,
 425                               NULL, 0,
 426                               brw->wm.surf_bo, brw->wm.nr_surfaces,
 427                               NULL);
 428
 429    if (bind_bo == NULL) {
 430       GLuint data_size = brw->wm.nr_surfaces * sizeof(GLuint);
 431       uint32_t *data = malloc(data_size);
 432       int i;
 433
 434       for (i = 0; i < brw->wm.nr_surfaces; i++)
 435          if (brw->wm.surf_bo[i])
 436             data[i] = brw->wm.surf_bo[i]->offset;
 437          else
 438             data[i] = 0;
 439
 440       bind_bo = brw_upload_cache( &brw->cache, BRW_SS_SURF_BIND,
 441                                   NULL, 0,
 442                                   brw->wm.surf_bo, brw->wm.nr_surfaces,
 443                                   data, data_size,
 444                                   NULL, NULL);
 445
 446       /* Emit binding table relocations to surface state */
 447       for (i = 0; i < BRW_WM_MAX_SURF; i++) {
 448          if (brw->wm.surf_bo[i] != NULL) {
 449             dri_bo_emit_reloc(bind_bo,
 450                               I915_GEM_DOMAIN_INSTRUCTION, 0,
 451                               0,
 452                               i * sizeof(GLuint),
 453                               brw->wm.surf_bo[i]);
 454          }
 455       }
 456
 457       free(data);
 458    }
 459
 460    return bind_bo;
 461 }
 462
 463 static void prepare_wm_surfaces(struct brw_context *brw )
 464 {
 465    GLcontext *ctx = &brw->intel.ctx;
 466    struct intel_context *intel = &brw->intel;
 467    GLuint i;
 468    int old_nr_surfaces;
 469
 470    if (brw->state.nr_color_regions  > 1) {
 471       for (i = 0; i < brw->state.nr_color_regions; i++) {
 472          brw_update_region_surface(brw, brw->state.color_regions[i], i,
 473                                    GL_FALSE);
 474       }
 475    } else {
 476       brw_update_region_surface(brw, brw->state.color_regions[0], 0, GL_TRUE);
 477    }
 478
 479    old_nr_surfaces = brw->wm.nr_surfaces;
 480    brw->wm.nr_surfaces = MAX_DRAW_BUFFERS;
 481
 482    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 483       struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i];
 484
 485       /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
 486       if(texUnit->_ReallyEnabled) {
 487          if (texUnit->_Current == intel->frame_buffer_texobj) {
 488             dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 489             brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = brw->wm.surf_bo[0];
 490             dri_bo_reference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 491             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 492          } else {
 493             brw_update_texture_surface(ctx, i);
 494             brw->wm.nr_surfaces = i + MAX_DRAW_BUFFERS + 1;
 495          }
 496       } else {
 497          dri_bo_unreference(brw->wm.surf_bo[i+MAX_DRAW_BUFFERS]);
 498          brw->wm.surf_bo[i+MAX_DRAW_BUFFERS] = NULL;
 499       }
 500
 501    }
 502
 503    dri_bo_unreference(brw->wm.bind_bo);
 504    brw->wm.bind_bo = brw_wm_get_binding_table(brw);
 505
 506    if (brw->wm.nr_surfaces != old_nr_surfaces)
 507       brw->state.dirty.brw |= BRW_NEW_NR_SURFACES;
 508 }
 509
 510
 511 const struct brw_tracked_state brw_wm_surfaces = {
 512    .dirty = {
 513       .mesa = _NEW_COLOR | _NEW_TEXTURE | _NEW_BUFFERS,
 514       .brw = BRW_NEW_CONTEXT,
 515       .cache = 0
 516    },
 517    .prepare = prepare_wm_surfaces,
 518 };
 519
 520
 521