src/mesa/drivers/dri/i965/brw_wm_surface_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/mtypes.h"
  34 #include "main/texstore.h"
  35 #include "shader/prog_parameter.h"
  36
  37 #include "intel_mipmap_tree.h"
  38 #include "intel_batchbuffer.h"
  39 #include "intel_tex.h"
  40 #include "intel_fbo.h"
  41
  42 #include "brw_context.h"
  43 #include "brw_state.h"
  44 #include "brw_defines.h"
  45
  46
  47 static GLuint translate_tex_target( GLenum target )
  48 {
  49    switch (target) {
  50    case GL_TEXTURE_1D:
  51       return BRW_SURFACE_1D;
  52
  53    case GL_TEXTURE_RECTANGLE_NV:
  54       return BRW_SURFACE_2D;
  55
  56    case GL_TEXTURE_2D:
  57       return BRW_SURFACE_2D;
  58
  59    case GL_TEXTURE_3D:
  60       return BRW_SURFACE_3D;
  61
  62    case GL_TEXTURE_CUBE_MAP:
  63       return BRW_SURFACE_CUBE;
  64
  65    default:
  66       assert(0);
  67       return 0;
  68    }
  69 }
  70
  71
  72 static GLuint translate_tex_format( gl_format mesa_format,
  73                                     GLenum internal_format,
  74                                     GLenum depth_mode )
  75 {
  76    switch( mesa_format ) {
  77    case MESA_FORMAT_L8:
  78       return BRW_SURFACEFORMAT_L8_UNORM;
  79
  80    case MESA_FORMAT_I8:
  81       return BRW_SURFACEFORMAT_I8_UNORM;
  82
  83    case MESA_FORMAT_A8:
  84       return BRW_SURFACEFORMAT_A8_UNORM;
  85
  86    case MESA_FORMAT_AL88:
  87       return BRW_SURFACEFORMAT_L8A8_UNORM;
  88
  89    case MESA_FORMAT_RGB888:
  90       assert(0);                /* not supported for sampling */
  91       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
  92
  93    case MESA_FORMAT_ARGB8888:
  94       if (internal_format == GL_RGB)
  95          return BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
  96       else
  97          return BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
  98
  99    case MESA_FORMAT_XRGB8888:
 100       return BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
 101
 102    case MESA_FORMAT_RGBA8888_REV:
 103       _mesa_problem(NULL, "unexpected format in i965:translate_tex_format()");
 104       if (internal_format == GL_RGB)
 105          return BRW_SURFACEFORMAT_R8G8B8X8_UNORM;
 106       else
 107          return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
 108
 109    case MESA_FORMAT_RGB565:
 110       return BRW_SURFACEFORMAT_B5G6R5_UNORM;
 111
 112    case MESA_FORMAT_ARGB1555:
 113       return BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
 114
 115    case MESA_FORMAT_ARGB4444:
 116       return BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
 117
 118    case MESA_FORMAT_YCBCR_REV:
 119       return BRW_SURFACEFORMAT_YCRCB_NORMAL;
 120
 121    case MESA_FORMAT_YCBCR:
 122       return BRW_SURFACEFORMAT_YCRCB_SWAPUVY;
 123
 124    case MESA_FORMAT_RGB_FXT1:
 125    case MESA_FORMAT_RGBA_FXT1:
 126       return BRW_SURFACEFORMAT_FXT1;
 127
 128    case MESA_FORMAT_Z16:
 129       if (depth_mode == GL_INTENSITY)
 130           return BRW_SURFACEFORMAT_I16_UNORM;
 131       else if (depth_mode == GL_ALPHA)
 132           return BRW_SURFACEFORMAT_A16_UNORM;
 133       else
 134           return BRW_SURFACEFORMAT_L16_UNORM;
 135
 136    case MESA_FORMAT_RGB_DXT1:
 137        return BRW_SURFACEFORMAT_DXT1_RGB;
 138
 139    case MESA_FORMAT_RGBA_DXT1:
 140        return BRW_SURFACEFORMAT_BC1_UNORM;
 141
 142    case MESA_FORMAT_RGBA_DXT3:
 143        return BRW_SURFACEFORMAT_BC2_UNORM;
 144
 145    case MESA_FORMAT_RGBA_DXT5:
 146        return BRW_SURFACEFORMAT_BC3_UNORM;
 147
 148    case MESA_FORMAT_SARGB8:
 149       return BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB;
 150
 151    case MESA_FORMAT_SLA8:
 152       return BRW_SURFACEFORMAT_L8A8_UNORM_SRGB;
 153
 154    case MESA_FORMAT_SL8:
 155       return BRW_SURFACEFORMAT_L8_UNORM_SRGB;
 156
 157    case MESA_FORMAT_SRGB_DXT1:
 158       return BRW_SURFACEFORMAT_BC1_UNORM_SRGB;
 159
 160    case MESA_FORMAT_S8_Z24:
 161       /* XXX: these different surface formats don't seem to
 162        * make any difference for shadow sampler/compares.
 163        */
 164       if (depth_mode == GL_INTENSITY)
 165          return BRW_SURFACEFORMAT_I24X8_UNORM;
 166       else if (depth_mode == GL_ALPHA)
 167          return BRW_SURFACEFORMAT_A24X8_UNORM;
 168       else
 169          return BRW_SURFACEFORMAT_L24X8_UNORM;
 170
 171    case MESA_FORMAT_DUDV8:
 172       return BRW_SURFACEFORMAT_R8G8_SNORM;
 173
 174    case MESA_FORMAT_SIGNED_RGBA8888_REV:
 175       return BRW_SURFACEFORMAT_R8G8B8A8_SNORM;
 176
 177    default:
 178       assert(0);
 179       return 0;
 180    }
 181 }
 182
 183 static void
 184 brw_set_surface_tiling(struct brw_surface_state *surf, uint32_t tiling)
 185 {
 186    switch (tiling) {
 187    case I915_TILING_NONE:
 188       surf->ss3.tiled_surface = 0;
 189       surf->ss3.tile_walk = 0;
 190       break;
 191    case I915_TILING_X:
 192       surf->ss3.tiled_surface = 1;
 193       surf->ss3.tile_walk = BRW_TILEWALK_XMAJOR;
 194       break;
 195    case I915_TILING_Y:
 196       surf->ss3.tiled_surface = 1;
 197       surf->ss3.tile_walk = BRW_TILEWALK_YMAJOR;
 198       break;
 199    }
 200 }
 201
 202 static dri_bo *
 203 brw_create_texture_surface( struct brw_context *brw,
 204                             struct brw_surface_key *key )
 205 {
 206    struct brw_surface_state surf;
 207    dri_bo *bo;
 208
 209    memset(&surf, 0, sizeof(surf));
 210
 211    surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 212    surf.ss0.surface_type = translate_tex_target(key->target);
 213    if (key->bo) {
 214       surf.ss0.surface_format = translate_tex_format(key->format,
 215                                                      key->internal_format,
 216                                                      key->depthmode);
 217    }
 218    else {
 219       switch (key->depth) {
 220       case 32:
 221          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 222          break;
 223       default:
 224       case 24:
 225          surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
 226          break;
 227       case 16:
 228          surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 229          break;
 230       }
 231    }
 232
 233    /* This is ok for all textures with channel width 8bit or less:
 234     */
 235 /*    surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
 236    if (key->bo)
 237       surf.ss1.base_addr = key->bo->offset; /* reloc */
 238    else
 239       surf.ss1.base_addr = key->offset;
 240
 241    surf.ss2.mip_count = key->last_level - key->first_level;
 242    surf.ss2.width = key->width - 1;
 243    surf.ss2.height = key->height - 1;
 244    brw_set_surface_tiling(&surf, key->tiling);
 245    surf.ss3.pitch = (key->pitch * key->cpp) - 1;
 246    surf.ss3.depth = key->depth - 1;
 247
 248    surf.ss4.min_lod = 0;
 249
 250    if (key->target == GL_TEXTURE_CUBE_MAP) {
 251       surf.ss0.cube_pos_x = 1;
 252       surf.ss0.cube_pos_y = 1;
 253       surf.ss0.cube_pos_z = 1;
 254       surf.ss0.cube_neg_x = 1;
 255       surf.ss0.cube_neg_y = 1;
 256       surf.ss0.cube_neg_z = 1;
 257    }
 258
 259    bo = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE,
 260                          key, sizeof(*key),
 261                          &key->bo, key->bo ? 1 : 0,
 262                          &surf, sizeof(surf),
 263                          NULL, NULL);
 264
 265    if (key->bo) {
 266       /* Emit relocation to surface contents */
 267       dri_bo_emit_reloc(bo,
 268                         I915_GEM_DOMAIN_SAMPLER, 0,
 269                         0,
 270                         offsetof(struct brw_surface_state, ss1),
 271                         key->bo);
 272    }
 273    return bo;
 274 }
 275
 276 static void
 277 brw_update_texture_surface( GLcontext *ctx, GLuint unit )
 278 {
 279    struct brw_context *brw = brw_context(ctx);
 280    struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current;
 281    struct intel_texture_object *intelObj = intel_texture_object(tObj);
 282    struct gl_texture_image *firstImage = tObj->Image[0][intelObj->firstLevel];
 283    struct brw_surface_key key;
 284    const GLuint surf = SURF_INDEX_TEXTURE(unit);
 285
 286    memset(&key, 0, sizeof(key));
 287
 288    if (intelObj->imageOverride) {
 289       key.pitch = intelObj->pitchOverride / intelObj->mt->cpp;
 290       key.depth = intelObj->depthOverride;
 291       key.bo = NULL;
 292       key.offset = intelObj->textureOffset;
 293    } else {
 294       key.format = firstImage->TexFormat;
 295       key.internal_format = firstImage->InternalFormat;
 296       key.pitch = intelObj->mt->pitch;
 297       key.depth = firstImage->Depth;
 298       key.bo = intelObj->mt->region->buffer;
 299       key.offset = 0;
 300    }
 301
 302    key.target = tObj->Target;
 303    key.depthmode = tObj->DepthMode;
 304    key.first_level = intelObj->firstLevel;
 305    key.last_level = intelObj->lastLevel;
 306    key.width = firstImage->Width;
 307    key.height = firstImage->Height;
 308    key.cpp = intelObj->mt->cpp;
 309    key.tiling = intelObj->mt->region->tiling;
 310
 311    dri_bo_unreference(brw->wm.surf_bo[surf]);
 312    brw->wm.surf_bo[surf] = brw_search_cache(&brw->surface_cache,
 313                                             BRW_SS_SURFACE,
 314                                             &key, sizeof(key),
 315                                             &key.bo, key.bo ? 1 : 0,
 316                                             NULL);
 317    if (brw->wm.surf_bo[surf] == NULL) {
 318       brw->wm.surf_bo[surf] = brw_create_texture_surface(brw, &key);
 319    }
 320 }
 321
 322
 323
 324 /**
 325  * Create the constant buffer surface.  Vertex/fragment shader constants will be
 326  * read from this buffer with Data Port Read instructions/messages.
 327  */
 328 dri_bo *
 329 brw_create_constant_surface( struct brw_context *brw,
 330                              struct brw_surface_key *key )
 331 {
 332    const GLint w = key->width - 1;
 333    struct brw_surface_state surf;
 334    dri_bo *bo;
 335
 336    memset(&surf, 0, sizeof(surf));
 337
 338    surf.ss0.mipmap_layout_mode = BRW_SURFACE_MIPMAPLAYOUT_BELOW;
 339    surf.ss0.surface_type = BRW_SURFACE_BUFFER;
 340    surf.ss0.surface_format = BRW_SURFACEFORMAT_R32G32B32A32_FLOAT;
 341
 342    assert(key->bo);
 343    if (key->bo)
 344       surf.ss1.base_addr = key->bo->offset; /* reloc */
 345    else
 346       surf.ss1.base_addr = key->offset;
 347
 348    surf.ss2.width = w & 0x7f;            /* bits 6:0 of size or width */
 349    surf.ss2.height = (w >> 7) & 0x1fff;  /* bits 19:7 of size or width */
 350    surf.ss3.depth = (w >> 20) & 0x7f;    /* bits 26:20 of size or width */
 351    surf.ss3.pitch = (key->pitch * key->cpp) - 1; /* ignored?? */
 352    brw_set_surface_tiling(&surf, key->tiling); /* tiling now allowed */
 353
 354    bo = brw_upload_cache(&brw->surface_cache, BRW_SS_SURFACE,
 355                          key, sizeof(*key),
 356                          &key->bo, key->bo ? 1 : 0,
 357                          &surf, sizeof(surf),
 358                          NULL, NULL);
 359
 360    if (key->bo) {
 361       /* Emit relocation to surface contents */
 362       dri_bo_emit_reloc(bo,
 363                         I915_GEM_DOMAIN_SAMPLER, 0,
 364                         0,
 365                         offsetof(struct brw_surface_state, ss1),
 366                         key->bo);
 367    }
 368
 369    return bo;
 370 }
 371
 372 /* Creates a new WM constant buffer reflecting the current fragment program's
 373  * constants, if needed by the fragment program.
 374  *
 375  * Otherwise, constants go through the CURBEs using the brw_constant_buffer
 376  * state atom.
 377  */
 378 static drm_intel_bo *
 379 brw_wm_update_constant_buffer(struct brw_context *brw)
 380 {
 381    struct intel_context *intel = &brw->intel;
 382    struct brw_fragment_program *fp =
 383       (struct brw_fragment_program *) brw->fragment_program;
 384    const struct gl_program_parameter_list *params = fp->program.Base.Parameters;
 385    const int size = params->NumParameters * 4 * sizeof(GLfloat);
 386    drm_intel_bo *const_buffer;
 387
 388    /* BRW_NEW_FRAGMENT_PROGRAM */
 389    if (!fp->use_const_buffer)
 390       return NULL;
 391
 392    const_buffer = drm_intel_bo_alloc(intel->bufmgr, "fp_const_buffer",
 393                                      size, 64);
 394
 395    /* _NEW_PROGRAM_CONSTANTS */
 396    dri_bo_subdata(const_buffer, 0, size, params->ParameterValues);
 397
 398    return const_buffer;
 399 }
 400
 401 /**
 402  * Update the surface state for a WM constant buffer.
 403  * The constant buffer will be (re)allocated here if needed.
 404  */
 405 static void
 406 brw_update_wm_constant_surface( GLcontext *ctx,
 407                                 GLuint surf)
 408 {
 409    struct brw_context *brw = brw_context(ctx);
 410    struct brw_surface_key key;
 411    struct brw_fragment_program *fp =
 412       (struct brw_fragment_program *) brw->fragment_program;
 413    const struct gl_program_parameter_list *params =
 414       fp->program.Base.Parameters;
 415
 416    /* If we're in this state update atom, we need to update WM constants, so
 417     * free the old buffer and create a new one for the new contents.
 418     */
 419    dri_bo_unreference(fp->const_buffer);
 420    fp->const_buffer = brw_wm_update_constant_buffer(brw);
 421
 422    /* If there's no constant buffer, then no surface BO is needed to point at
 423     * it.
 424     */
 425    if (fp->const_buffer == 0) {
 426       drm_intel_bo_unreference(brw->wm.surf_bo[surf]);
 427       brw->wm.surf_bo[surf] = NULL;
 428       return;
 429    }
 430
 431    memset(&key, 0, sizeof(key));
 432
 433    key.format = MESA_FORMAT_RGBA_FLOAT32;
 434    key.internal_format = GL_RGBA;
 435    key.bo = fp->const_buffer;
 436    key.depthmode = GL_NONE;
 437    key.pitch = params->NumParameters;
 438    key.width = params->NumParameters;
 439    key.height = 1;
 440    key.depth = 1;
 441    key.cpp = 16;
 442
 443    /*
 444    printf("%s:\n", __FUNCTION__);
 445    printf("  width %d  height %d  depth %d  cpp %d  pitch %d\n",
 446           key.width, key.height, key.depth, key.cpp, key.pitch);
 447    */
 448
 449    dri_bo_unreference(brw->wm.surf_bo[surf]);
 450    brw->wm.surf_bo[surf] = brw_search_cache(&brw->surface_cache,
 451                                             BRW_SS_SURFACE,
 452                                             &key, sizeof(key),
 453                                             &key.bo, key.bo ? 1 : 0,
 454                                             NULL);
 455    if (brw->wm.surf_bo[surf] == NULL) {
 456       brw->wm.surf_bo[surf] = brw_create_constant_surface(brw, &key);
 457    }
 458    brw->state.dirty.brw |= BRW_NEW_WM_SURFACES;
 459 }
 460
 461 /**
 462  * Updates surface / buffer for fragment shader constant buffer, if
 463  * one is required.
 464  *
 465  * This consumes the state updates for the constant buffer, and produces
 466  * BRW_NEW_WM_SURFACES to get picked up by brw_prepare_wm_surfaces for
 467  * inclusion in the binding table.
 468  */
 469 static void prepare_wm_constant_surface(struct brw_context *brw )
 470 {
 471    GLcontext *ctx = &brw->intel.ctx;
 472    struct brw_fragment_program *fp =
 473       (struct brw_fragment_program *) brw->fragment_program;
 474    GLuint surf = SURF_INDEX_FRAG_CONST_BUFFER;
 475
 476    drm_intel_bo_unreference(fp->const_buffer);
 477    fp->const_buffer = brw_wm_update_constant_buffer(brw);
 478
 479    /* If there's no constant buffer, then no surface BO is needed to point at
 480     * it.
 481     */
 482    if (fp->const_buffer == 0) {
 483       if (brw->wm.surf_bo[surf] != NULL) {
 484          drm_intel_bo_unreference(brw->wm.surf_bo[surf]);
 485          brw->wm.surf_bo[surf] = NULL;
 486          brw->state.dirty.brw |= BRW_NEW_WM_SURFACES;
 487       }
 488       return;
 489    }
 490
 491    brw_update_wm_constant_surface(ctx, surf);
 492 }
 493
 494 const struct brw_tracked_state brw_wm_constant_surface = {
 495    .dirty = {
 496       .mesa = (_NEW_PROGRAM_CONSTANTS),
 497       .brw = (BRW_NEW_FRAGMENT_PROGRAM),
 498       .cache = 0
 499    },
 500    .prepare = prepare_wm_constant_surface,
 501 };
 502
 503
 504 /**
 505  * Sets up a surface state structure to point at the given region.
 506  * While it is only used for the front/back buffer currently, it should be
 507  * usable for further buffers when doing ARB_draw_buffer support.
 508  */
 509 static void
 510 brw_update_renderbuffer_surface(struct brw_context *brw,
 511                                 struct gl_renderbuffer *rb,
 512                                 unsigned int unit)
 513 {
 514    GLcontext *ctx = &brw->intel.ctx;
 515    dri_bo *region_bo = NULL;
 516    struct intel_renderbuffer *irb = intel_renderbuffer(rb);
 517    struct intel_region *region = irb ? irb->region : NULL;
 518    struct {
 519       unsigned int surface_type;
 520       unsigned int surface_format;
 521       unsigned int width, height, pitch, cpp;
 522       GLubyte color_mask[4];
 523       GLboolean color_blend;
 524       uint32_t tiling;
 525       uint32_t draw_offset;
 526    } key;
 527
 528    memset(&key, 0, sizeof(key));
 529
 530    if (region != NULL) {
 531       region_bo = region->buffer;
 532
 533       key.surface_type = BRW_SURFACE_2D;
 534       switch (irb->texformat) {
 535       case MESA_FORMAT_ARGB8888:
 536          key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 537          break;
 538       case MESA_FORMAT_XRGB8888:
 539          key.surface_format = BRW_SURFACEFORMAT_B8G8R8X8_UNORM;
 540          break;
 541       case MESA_FORMAT_RGB565:
 542          key.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM;
 543          break;
 544       case MESA_FORMAT_ARGB1555:
 545          key.surface_format = BRW_SURFACEFORMAT_B5G5R5A1_UNORM;
 546          break;
 547       case MESA_FORMAT_ARGB4444:
 548          key.surface_format = BRW_SURFACEFORMAT_B4G4R4A4_UNORM;
 549          break;
 550       default:
 551          _mesa_problem(ctx, "Bad renderbuffer format: %d\n", irb->texformat);
 552       }
 553       key.tiling = region->tiling;
 554       if (brw->intel.intelScreen->driScrnPriv->dri2.enabled) {
 555          key.width = rb->Width;
 556          key.height = rb->Height;
 557       } else {
 558          key.width = region->width;
 559          key.height = region->height;
 560       }
 561       key.pitch = region->pitch;
 562       key.cpp = region->cpp;
 563       key.draw_offset = region->draw_offset; /* cur 3d or cube face offset */
 564    } else {
 565       key.surface_type = BRW_SURFACE_NULL;
 566       key.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
 567       key.tiling = I915_TILING_X;
 568       key.width = 1;
 569       key.height = 1;
 570       key.cpp = 4;
 571       key.draw_offset = 0;
 572    }
 573    /* _NEW_COLOR */
 574    memcpy(key.color_mask, ctx->Color.ColorMask,
 575           sizeof(key.color_mask));
 576    key.color_blend = (!ctx->Color._LogicOpEnabled &&
 577                       ctx->Color.BlendEnabled);
 578
 579    dri_bo_unreference(brw->wm.surf_bo[unit]);
 580    brw->wm.surf_bo[unit] = brw_search_cache(&brw->surface_cache,
 581                                             BRW_SS_SURFACE,
 582                                             &key, sizeof(key),
 583                                             &region_bo, 1,
 584                                             NULL);
 585
 586    if (brw->wm.surf_bo[unit] == NULL) {
 587       struct brw_surface_state surf;
 588
 589       memset(&surf, 0, sizeof(surf));
 590
 591       surf.ss0.surface_format = key.surface_format;
 592       surf.ss0.surface_type = key.surface_type;
 593       if (key.tiling == I915_TILING_NONE) {
 594          surf.ss1.base_addr = key.draw_offset;
 595       } else {
 596          uint32_t tile_offset = key.draw_offset % 4096;
 597
 598          surf.ss1.base_addr = key.draw_offset - tile_offset;
 599
 600          assert(BRW_IS_G4X(brw) || tile_offset == 0);
 601          if (BRW_IS_G4X(brw)) {
 602             if (key.tiling == I915_TILING_X) {
 603                /* Note that the low bits of these fields are missing, so
 604                 * there's the possibility of getting in trouble.
 605                 */
 606                surf.ss5.x_offset = (tile_offset % 512) / key.cpp / 4;
 607                surf.ss5.y_offset = tile_offset / 512 / 2;
 608             } else {
 609                surf.ss5.x_offset = (tile_offset % 128) / key.cpp / 4;
 610                surf.ss5.y_offset = tile_offset / 128 / 2;
 611             }
 612          }
 613       }
 614       if (region_bo != NULL)
 615          surf.ss1.base_addr += region_bo->offset; /* reloc */
 616
 617       surf.ss2.width = key.width - 1;
 618       surf.ss2.height = key.height - 1;
 619       brw_set_surface_tiling(&surf, key.tiling);
 620       surf.ss3.pitch = (key.pitch * key.cpp) - 1;
 621
 622       /* _NEW_COLOR */
 623       surf.ss0.color_blend = key.color_blend;
 624       surf.ss0.writedisable_red =   !key.color_mask[0];
 625       surf.ss0.writedisable_green = !key.color_mask[1];
 626       surf.ss0.writedisable_blue =  !key.color_mask[2];
 627       surf.ss0.writedisable_alpha = !key.color_mask[3];
 628
 629       /* Key size will never match key size for textures, so we're safe. */
 630       brw->wm.surf_bo[unit] = brw_upload_cache(&brw->surface_cache,
 631                                                BRW_SS_SURFACE,
 632                                                &key, sizeof(key),
 633                                                &region_bo, 1,
 634                                                &surf, sizeof(surf),
 635                                                NULL, NULL);
 636       if (region_bo != NULL) {
 637          /* We might sample from it, and we might render to it, so flag
 638           * them both.  We might be able to figure out from other state
 639           * a more restrictive relocation to emit.
 640           */
 641          drm_intel_bo_emit_reloc(brw->wm.surf_bo[unit],
 642                                  offsetof(struct brw_surface_state, ss1),
 643                                  region_bo,
 644                                  surf.ss1.base_addr - region_bo->offset,
 645                                  I915_GEM_DOMAIN_RENDER,
 646                                  I915_GEM_DOMAIN_RENDER);
 647       }
 648    }
 649 }
 650
 651
 652 /**
 653  * Constructs the binding table for the WM surface state, which maps unit
 654  * numbers to surface state objects.
 655  */
 656 static dri_bo *
 657 brw_wm_get_binding_table(struct brw_context *brw)
 658 {
 659    dri_bo *bind_bo;
 660
 661    assert(brw->wm.nr_surfaces <= BRW_WM_MAX_SURF);
 662
 663    bind_bo = brw_search_cache(&brw->surface_cache, BRW_SS_SURF_BIND,
 664                               NULL, 0,
 665                               brw->wm.surf_bo, brw->wm.nr_surfaces,
 666                               NULL);
 667
 668    if (bind_bo == NULL) {
 669       GLuint data_size = brw->wm.nr_surfaces * sizeof(GLuint);
 670       uint32_t data[BRW_WM_MAX_SURF];
 671       int i;
 672
 673       for (i = 0; i < brw->wm.nr_surfaces; i++)
 674          if (brw->wm.surf_bo[i])
 675             data[i] = brw->wm.surf_bo[i]->offset;
 676          else
 677             data[i] = 0;
 678
 679       bind_bo = brw_upload_cache( &brw->surface_cache, BRW_SS_SURF_BIND,
 680                                   NULL, 0,
 681                                   brw->wm.surf_bo, brw->wm.nr_surfaces,
 682                                   data, data_size,
 683                                   NULL, NULL);
 684
 685       /* Emit binding table relocations to surface state */
 686       for (i = 0; i < BRW_WM_MAX_SURF; i++) {
 687          if (brw->wm.surf_bo[i] != NULL) {
 688             dri_bo_emit_reloc(bind_bo,
 689                               I915_GEM_DOMAIN_INSTRUCTION, 0,
 690                               0,
 691                               i * sizeof(GLuint),
 692                               brw->wm.surf_bo[i]);
 693          }
 694       }
 695    }
 696
 697    return bind_bo;
 698 }
 699
 700 static void prepare_wm_surfaces(struct brw_context *brw )
 701 {
 702    GLcontext *ctx = &brw->intel.ctx;
 703    GLuint i;
 704    int old_nr_surfaces;
 705
 706    /* _NEW_BUFFERS | _NEW_COLOR */
 707    /* Update surfaces for drawing buffers */
 708    if (ctx->DrawBuffer->_NumColorDrawBuffers >= 1) {
 709       for (i = 0; i < ctx->DrawBuffer->_NumColorDrawBuffers; i++) {
 710          brw_update_renderbuffer_surface(brw,
 711                                          ctx->DrawBuffer->_ColorDrawBuffers[i],
 712                                          i);
 713       }
 714    } else {
 715       brw_update_renderbuffer_surface(brw, NULL, 0);
 716    }
 717
 718    old_nr_surfaces = brw->wm.nr_surfaces;
 719    brw->wm.nr_surfaces = BRW_MAX_DRAW_BUFFERS;
 720
 721    if (brw->wm.surf_bo[SURF_INDEX_FRAG_CONST_BUFFER] != NULL)
 722        brw->wm.nr_surfaces = SURF_INDEX_FRAG_CONST_BUFFER + 1;
 723
 724    /* Update surfaces for textures */
 725    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 726       const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[i];
 727       const GLuint surf = SURF_INDEX_TEXTURE(i);
 728
 729       /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
 730       if (texUnit->_ReallyEnabled) {
 731          brw_update_texture_surface(ctx, i);
 732          brw->wm.nr_surfaces = surf + 1;
 733       } else {
 734          dri_bo_unreference(brw->wm.surf_bo[surf]);
 735          brw->wm.surf_bo[surf] = NULL;
 736       }
 737    }
 738
 739    dri_bo_unreference(brw->wm.bind_bo);
 740    brw->wm.bind_bo = brw_wm_get_binding_table(brw);
 741
 742    if (brw->wm.nr_surfaces != old_nr_surfaces)
 743       brw->state.dirty.brw |= BRW_NEW_NR_WM_SURFACES;
 744 }
 745
 746 const struct brw_tracked_state brw_wm_surfaces = {
 747    .dirty = {
 748       .mesa = (_NEW_COLOR |
 749                _NEW_TEXTURE |
 750                _NEW_BUFFERS),
 751       .brw = (BRW_NEW_CONTEXT |
 752               BRW_NEW_WM_SURFACES),
 753       .cache = 0
 754    },
 755    .prepare = prepare_wm_surfaces,
 756 };
 757
 758
 759