2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "main/mtypes.h"
34 #include "main/texformat.h"
35 #include "main/texstore.h"
37 #include "intel_mipmap_tree.h"
38 #include "intel_batchbuffer.h"
39 #include "intel_tex.h"
42 #include "brw_context.h"
43 #include "brw_state.h"
44 #include "brw_defines.h"
47 static GLuint
translate_tex_target( GLenum target
)
51 return BRW_SURFACE_1D
;
53 case GL_TEXTURE_RECTANGLE_NV
:
54 return BRW_SURFACE_2D
;
57 return BRW_SURFACE_2D
;
60 return BRW_SURFACE_3D
;
62 case GL_TEXTURE_CUBE_MAP
:
63 return BRW_SURFACE_CUBE
;
72 static GLuint
translate_tex_format( GLuint mesa_format
, GLenum depth_mode
)
74 switch( mesa_format
) {
76 return BRW_SURFACEFORMAT_L8_UNORM
;
79 return BRW_SURFACEFORMAT_I8_UNORM
;
82 return BRW_SURFACEFORMAT_A8_UNORM
;
84 case MESA_FORMAT_AL88
:
85 return BRW_SURFACEFORMAT_L8A8_UNORM
;
87 case MESA_FORMAT_RGB888
:
88 assert(0); /* not supported for sampling */
89 return BRW_SURFACEFORMAT_R8G8B8_UNORM
;
91 case MESA_FORMAT_ARGB8888
:
92 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
94 case MESA_FORMAT_RGBA8888_REV
:
95 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM
;
97 case MESA_FORMAT_RGB565
:
98 return BRW_SURFACEFORMAT_B5G6R5_UNORM
;
100 case MESA_FORMAT_ARGB1555
:
101 return BRW_SURFACEFORMAT_B5G5R5A1_UNORM
;
103 case MESA_FORMAT_ARGB4444
:
104 return BRW_SURFACEFORMAT_B4G4R4A4_UNORM
;
106 case MESA_FORMAT_YCBCR_REV
:
107 return BRW_SURFACEFORMAT_YCRCB_NORMAL
;
109 case MESA_FORMAT_YCBCR
:
110 return BRW_SURFACEFORMAT_YCRCB_SWAPUVY
;
112 case MESA_FORMAT_RGB_FXT1
:
113 case MESA_FORMAT_RGBA_FXT1
:
114 return BRW_SURFACEFORMAT_FXT1
;
116 case MESA_FORMAT_Z16
:
117 if (depth_mode
== GL_INTENSITY
)
118 return BRW_SURFACEFORMAT_I16_UNORM
;
119 else if (depth_mode
== GL_ALPHA
)
120 return BRW_SURFACEFORMAT_A16_UNORM
;
122 return BRW_SURFACEFORMAT_L16_UNORM
;
124 case MESA_FORMAT_RGB_DXT1
:
125 return BRW_SURFACEFORMAT_DXT1_RGB
;
127 case MESA_FORMAT_RGBA_DXT1
:
128 return BRW_SURFACEFORMAT_BC1_UNORM
;
130 case MESA_FORMAT_RGBA_DXT3
:
131 return BRW_SURFACEFORMAT_BC2_UNORM
;
133 case MESA_FORMAT_RGBA_DXT5
:
134 return BRW_SURFACEFORMAT_BC3_UNORM
;
136 case MESA_FORMAT_SRGBA8
:
137 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM_SRGB
;
138 case MESA_FORMAT_SRGB_DXT1
:
139 return BRW_SURFACEFORMAT_BC1_UNORM_SRGB
;
141 case MESA_FORMAT_S8_Z24
:
142 /* XXX: these different surface formats don't seem to
143 * make any difference for shadow sampler/compares.
145 if (depth_mode
== GL_INTENSITY
)
146 return BRW_SURFACEFORMAT_I24X8_UNORM
;
147 else if (depth_mode
== GL_ALPHA
)
148 return BRW_SURFACEFORMAT_A24X8_UNORM
;
150 return BRW_SURFACEFORMAT_L24X8_UNORM
;
158 struct brw_wm_surface_key
{
159 GLenum target
, depthmode
;
162 GLint first_level
, last_level
;
163 GLint width
, height
, depth
;
170 brw_set_surface_tiling(struct brw_surface_state
*surf
, uint32_t tiling
)
173 case I915_TILING_NONE
:
174 surf
->ss3
.tiled_surface
= 0;
175 surf
->ss3
.tile_walk
= 0;
178 surf
->ss3
.tiled_surface
= 1;
179 surf
->ss3
.tile_walk
= BRW_TILEWALK_XMAJOR
;
182 surf
->ss3
.tiled_surface
= 1;
183 surf
->ss3
.tile_walk
= BRW_TILEWALK_YMAJOR
;
189 brw_create_texture_surface( struct brw_context
*brw
,
190 struct brw_wm_surface_key
*key
)
192 struct brw_surface_state surf
;
195 memset(&surf
, 0, sizeof(surf
));
197 surf
.ss0
.mipmap_layout_mode
= BRW_SURFACE_MIPMAPLAYOUT_BELOW
;
198 surf
.ss0
.surface_type
= translate_tex_target(key
->target
);
201 surf
.ss0
.surface_format
= translate_tex_format(key
->format
, key
->depthmode
);
203 switch (key
->depth
) {
205 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
209 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B8G8R8X8_UNORM
;
212 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B5G6R5_UNORM
;
217 /* This is ok for all textures with channel width 8bit or less:
219 /* surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
221 surf
.ss1
.base_addr
= key
->bo
->offset
; /* reloc */
223 surf
.ss1
.base_addr
= key
->offset
;
225 surf
.ss2
.mip_count
= key
->last_level
- key
->first_level
;
226 surf
.ss2
.width
= key
->width
- 1;
227 surf
.ss2
.height
= key
->height
- 1;
228 brw_set_surface_tiling(&surf
, key
->tiling
);
229 surf
.ss3
.pitch
= (key
->pitch
* key
->cpp
) - 1;
230 surf
.ss3
.depth
= key
->depth
- 1;
232 surf
.ss4
.min_lod
= 0;
234 if (key
->target
== GL_TEXTURE_CUBE_MAP
) {
235 surf
.ss0
.cube_pos_x
= 1;
236 surf
.ss0
.cube_pos_y
= 1;
237 surf
.ss0
.cube_pos_z
= 1;
238 surf
.ss0
.cube_neg_x
= 1;
239 surf
.ss0
.cube_neg_y
= 1;
240 surf
.ss0
.cube_neg_z
= 1;
243 bo
= brw_upload_cache(&brw
->cache
, BRW_SS_SURFACE
,
245 &key
->bo
, key
->bo
? 1 : 0,
250 /* Emit relocation to surface contents */
251 dri_bo_emit_reloc(bo
,
252 I915_GEM_DOMAIN_SAMPLER
, 0,
254 offsetof(struct brw_surface_state
, ss1
),
261 brw_update_texture_surface( GLcontext
*ctx
, GLuint unit
)
263 struct brw_context
*brw
= brw_context(ctx
);
264 struct gl_texture_object
*tObj
= ctx
->Texture
.Unit
[unit
]._Current
;
265 struct intel_texture_object
*intelObj
= intel_texture_object(tObj
);
266 struct gl_texture_image
*firstImage
= tObj
->Image
[0][intelObj
->firstLevel
];
267 struct brw_wm_surface_key key
;
269 memset(&key
, 0, sizeof(key
));
271 if (intelObj
->imageOverride
) {
272 key
.pitch
= intelObj
->pitchOverride
/ intelObj
->mt
->cpp
;
273 key
.depth
= intelObj
->depthOverride
;
275 key
.offset
= intelObj
->textureOffset
;
277 key
.format
= firstImage
->TexFormat
->MesaFormat
;
278 key
.pitch
= intelObj
->mt
->pitch
;
279 key
.depth
= firstImage
->Depth
;
280 key
.bo
= intelObj
->mt
->region
->buffer
;
284 key
.target
= tObj
->Target
;
285 key
.depthmode
= tObj
->DepthMode
;
286 key
.first_level
= intelObj
->firstLevel
;
287 key
.last_level
= intelObj
->lastLevel
;
288 key
.width
= firstImage
->Width
;
289 key
.height
= firstImage
->Height
;
290 key
.cpp
= intelObj
->mt
->cpp
;
291 key
.tiling
= intelObj
->mt
->region
->tiling
;
293 dri_bo_unreference(brw
->wm
.surf_bo
[unit
+ MAX_DRAW_BUFFERS
]);
294 brw
->wm
.surf_bo
[unit
+ MAX_DRAW_BUFFERS
] = brw_search_cache(&brw
->cache
, BRW_SS_SURFACE
,
296 &key
.bo
, key
.bo
? 1 : 0,
298 if (brw
->wm
.surf_bo
[unit
+ MAX_DRAW_BUFFERS
] == NULL
) {
299 brw
->wm
.surf_bo
[unit
+ MAX_DRAW_BUFFERS
] = brw_create_texture_surface(brw
, &key
);
304 * Sets up a surface state structure to point at the given region.
305 * While it is only used for the front/back buffer currently, it should be
306 * usable for further buffers when doing ARB_draw_buffer support.
309 brw_update_region_surface(struct brw_context
*brw
, struct intel_region
*region
,
310 unsigned int unit
, GLboolean cached
)
312 GLcontext
*ctx
= &brw
->intel
.ctx
;
313 dri_bo
*region_bo
= NULL
;
315 unsigned int surface_type
;
316 unsigned int surface_format
;
317 unsigned int width
, height
, cpp
;
318 GLubyte color_mask
[4];
319 GLboolean color_blend
;
323 memset(&key
, 0, sizeof(key
));
325 if (region
!= NULL
) {
326 region_bo
= region
->buffer
;
328 key
.surface_type
= BRW_SURFACE_2D
;
329 if (region
->cpp
== 4)
330 key
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
332 key
.surface_format
= BRW_SURFACEFORMAT_B5G6R5_UNORM
;
333 key
.tiling
= region
->tiling
;
334 key
.width
= region
->pitch
; /* XXX: not really! */
335 key
.height
= region
->height
;
336 key
.cpp
= region
->cpp
;
338 key
.surface_type
= BRW_SURFACE_NULL
;
339 key
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
345 memcpy(key
.color_mask
, ctx
->Color
.ColorMask
,
346 sizeof(key
.color_mask
));
347 key
.color_blend
= (!ctx
->Color
._LogicOpEnabled
&&
348 ctx
->Color
.BlendEnabled
);
350 dri_bo_unreference(brw
->wm
.surf_bo
[unit
]);
351 brw
->wm
.surf_bo
[unit
] = NULL
;
353 brw
->wm
.surf_bo
[unit
] = brw_search_cache(&brw
->cache
, BRW_SS_SURFACE
,
358 if (brw
->wm
.surf_bo
[unit
] == NULL
) {
359 struct brw_surface_state surf
;
361 memset(&surf
, 0, sizeof(surf
));
363 surf
.ss0
.surface_format
= key
.surface_format
;
364 surf
.ss0
.surface_type
= key
.surface_type
;
365 if (region_bo
!= NULL
)
366 surf
.ss1
.base_addr
= region_bo
->offset
; /* reloc */
368 surf
.ss2
.width
= key
.width
- 1;
369 surf
.ss2
.height
= key
.height
- 1;
370 brw_set_surface_tiling(&surf
, key
.tiling
);
371 surf
.ss3
.pitch
= (key
.width
* key
.cpp
) - 1;
374 surf
.ss0
.color_blend
= key
.color_blend
;
375 surf
.ss0
.writedisable_red
= !key
.color_mask
[0];
376 surf
.ss0
.writedisable_green
= !key
.color_mask
[1];
377 surf
.ss0
.writedisable_blue
= !key
.color_mask
[2];
378 surf
.ss0
.writedisable_alpha
= !key
.color_mask
[3];
380 /* Key size will never match key size for textures, so we're safe. */
381 brw
->wm
.surf_bo
[unit
] = brw_upload_cache(&brw
->cache
, BRW_SS_SURFACE
,
386 if (region_bo
!= NULL
) {
387 /* We might sample from it, and we might render to it, so flag
388 * them both. We might be able to figure out from other state
389 * a more restrictive relocation to emit.
391 dri_bo_emit_reloc(brw
->wm
.surf_bo
[unit
],
392 I915_GEM_DOMAIN_RENDER
,
393 I915_GEM_DOMAIN_RENDER
,
395 offsetof(struct brw_surface_state
, ss1
),
403 * Constructs the binding table for the WM surface state, which maps unit
404 * numbers to surface state objects.
407 brw_wm_get_binding_table(struct brw_context
*brw
)
411 bind_bo
= brw_search_cache(&brw
->cache
, BRW_SS_SURF_BIND
,
413 brw
->wm
.surf_bo
, brw
->wm
.nr_surfaces
,
416 if (bind_bo
== NULL
) {
417 GLuint data_size
= brw
->wm
.nr_surfaces
* sizeof(GLuint
);
418 uint32_t *data
= malloc(data_size
);
421 for (i
= 0; i
< brw
->wm
.nr_surfaces
; i
++)
422 if (brw
->wm
.surf_bo
[i
])
423 data
[i
] = brw
->wm
.surf_bo
[i
]->offset
;
427 bind_bo
= brw_upload_cache( &brw
->cache
, BRW_SS_SURF_BIND
,
429 brw
->wm
.surf_bo
, brw
->wm
.nr_surfaces
,
433 /* Emit binding table relocations to surface state */
434 for (i
= 0; i
< BRW_WM_MAX_SURF
; i
++) {
435 if (brw
->wm
.surf_bo
[i
] != NULL
) {
436 dri_bo_emit_reloc(bind_bo
,
437 I915_GEM_DOMAIN_INSTRUCTION
, 0,
450 static void prepare_wm_surfaces(struct brw_context
*brw
)
452 GLcontext
*ctx
= &brw
->intel
.ctx
;
453 struct intel_context
*intel
= &brw
->intel
;
457 if (brw
->state
.nr_color_regions
> 1) {
458 for (i
= 0; i
< brw
->state
.nr_color_regions
; i
++) {
459 brw_update_region_surface(brw
, brw
->state
.color_regions
[i
], i
,
463 brw_update_region_surface(brw
, brw
->state
.color_regions
[0], 0, GL_TRUE
);
466 old_nr_surfaces
= brw
->wm
.nr_surfaces
;
467 brw
->wm
.nr_surfaces
= MAX_DRAW_BUFFERS
;
469 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
470 struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[i
];
472 /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
473 if(texUnit
->_ReallyEnabled
) {
474 if (texUnit
->_Current
== intel
->frame_buffer_texobj
) {
475 dri_bo_unreference(brw
->wm
.surf_bo
[i
+MAX_DRAW_BUFFERS
]);
476 brw
->wm
.surf_bo
[i
+MAX_DRAW_BUFFERS
] = brw
->wm
.surf_bo
[0];
477 dri_bo_reference(brw
->wm
.surf_bo
[i
+MAX_DRAW_BUFFERS
]);
478 brw
->wm
.nr_surfaces
= i
+ MAX_DRAW_BUFFERS
+ 1;
480 brw_update_texture_surface(ctx
, i
);
481 brw
->wm
.nr_surfaces
= i
+ MAX_DRAW_BUFFERS
+ 1;
484 dri_bo_unreference(brw
->wm
.surf_bo
[i
+MAX_DRAW_BUFFERS
]);
485 brw
->wm
.surf_bo
[i
+MAX_DRAW_BUFFERS
] = NULL
;
490 dri_bo_unreference(brw
->wm
.bind_bo
);
491 brw
->wm
.bind_bo
= brw_wm_get_binding_table(brw
);
493 if (brw
->wm
.nr_surfaces
!= old_nr_surfaces
)
494 brw
->state
.dirty
.brw
|= BRW_NEW_NR_SURFACES
;
498 const struct brw_tracked_state brw_wm_surfaces
= {
500 .mesa
= _NEW_COLOR
| _NEW_TEXTURE
| _NEW_BUFFERS
,
501 .brw
= BRW_NEW_CONTEXT
,
504 .prepare
= prepare_wm_surfaces
,