2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "main/mtypes.h"
34 #include "main/texformat.h"
35 #include "main/texstore.h"
36 #include "shader/prog_parameter.h"
38 #include "intel_mipmap_tree.h"
39 #include "intel_batchbuffer.h"
40 #include "intel_tex.h"
41 #include "intel_fbo.h"
43 #include "brw_context.h"
44 #include "brw_state.h"
45 #include "brw_defines.h"
48 static GLuint
translate_tex_target( GLenum target
)
52 return BRW_SURFACE_1D
;
54 case GL_TEXTURE_RECTANGLE_NV
:
55 return BRW_SURFACE_2D
;
58 return BRW_SURFACE_2D
;
61 return BRW_SURFACE_3D
;
63 case GL_TEXTURE_CUBE_MAP
:
64 return BRW_SURFACE_CUBE
;
73 static GLuint
translate_tex_format( GLuint mesa_format
, GLenum internal_format
,
76 switch( mesa_format
) {
78 return BRW_SURFACEFORMAT_L8_UNORM
;
81 return BRW_SURFACEFORMAT_I8_UNORM
;
84 return BRW_SURFACEFORMAT_A8_UNORM
;
86 case MESA_FORMAT_AL88
:
87 return BRW_SURFACEFORMAT_L8A8_UNORM
;
89 case MESA_FORMAT_RGB888
:
90 assert(0); /* not supported for sampling */
91 return BRW_SURFACEFORMAT_R8G8B8_UNORM
;
93 case MESA_FORMAT_ARGB8888
:
94 if (internal_format
== GL_RGB
)
95 return BRW_SURFACEFORMAT_B8G8R8X8_UNORM
;
97 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
99 case MESA_FORMAT_RGBA8888_REV
:
100 if (internal_format
== GL_RGB
)
101 return BRW_SURFACEFORMAT_R8G8B8X8_UNORM
;
103 return BRW_SURFACEFORMAT_R8G8B8A8_UNORM
;
105 case MESA_FORMAT_RGB565
:
106 return BRW_SURFACEFORMAT_B5G6R5_UNORM
;
108 case MESA_FORMAT_ARGB1555
:
109 return BRW_SURFACEFORMAT_B5G5R5A1_UNORM
;
111 case MESA_FORMAT_ARGB4444
:
112 return BRW_SURFACEFORMAT_B4G4R4A4_UNORM
;
114 case MESA_FORMAT_YCBCR_REV
:
115 return BRW_SURFACEFORMAT_YCRCB_NORMAL
;
117 case MESA_FORMAT_YCBCR
:
118 return BRW_SURFACEFORMAT_YCRCB_SWAPUVY
;
120 case MESA_FORMAT_RGB_FXT1
:
121 case MESA_FORMAT_RGBA_FXT1
:
122 return BRW_SURFACEFORMAT_FXT1
;
124 case MESA_FORMAT_Z16
:
125 if (depth_mode
== GL_INTENSITY
)
126 return BRW_SURFACEFORMAT_I16_UNORM
;
127 else if (depth_mode
== GL_ALPHA
)
128 return BRW_SURFACEFORMAT_A16_UNORM
;
130 return BRW_SURFACEFORMAT_L16_UNORM
;
132 case MESA_FORMAT_RGB_DXT1
:
133 return BRW_SURFACEFORMAT_DXT1_RGB
;
135 case MESA_FORMAT_RGBA_DXT1
:
136 return BRW_SURFACEFORMAT_BC1_UNORM
;
138 case MESA_FORMAT_RGBA_DXT3
:
139 return BRW_SURFACEFORMAT_BC2_UNORM
;
141 case MESA_FORMAT_RGBA_DXT5
:
142 return BRW_SURFACEFORMAT_BC3_UNORM
;
144 case MESA_FORMAT_SARGB8
:
145 return BRW_SURFACEFORMAT_B8G8R8A8_UNORM_SRGB
;
147 case MESA_FORMAT_SLA8
:
148 return BRW_SURFACEFORMAT_L8A8_UNORM_SRGB
;
150 case MESA_FORMAT_SL8
:
151 return BRW_SURFACEFORMAT_L8_UNORM_SRGB
;
153 case MESA_FORMAT_SRGB_DXT1
:
154 return BRW_SURFACEFORMAT_BC1_UNORM_SRGB
;
156 case MESA_FORMAT_S8_Z24
:
157 /* XXX: these different surface formats don't seem to
158 * make any difference for shadow sampler/compares.
160 if (depth_mode
== GL_INTENSITY
)
161 return BRW_SURFACEFORMAT_I24X8_UNORM
;
162 else if (depth_mode
== GL_ALPHA
)
163 return BRW_SURFACEFORMAT_A24X8_UNORM
;
165 return BRW_SURFACEFORMAT_L24X8_UNORM
;
167 case MESA_FORMAT_DUDV8
:
168 return BRW_SURFACEFORMAT_R8G8_SNORM
;
170 case MESA_FORMAT_SIGNED_RGBA8888_REV
:
171 return BRW_SURFACEFORMAT_R8G8B8A8_SNORM
;
180 brw_set_surface_tiling(struct brw_surface_state
*surf
, uint32_t tiling
)
183 case I915_TILING_NONE
:
184 surf
->ss3
.tiled_surface
= 0;
185 surf
->ss3
.tile_walk
= 0;
188 surf
->ss3
.tiled_surface
= 1;
189 surf
->ss3
.tile_walk
= BRW_TILEWALK_XMAJOR
;
192 surf
->ss3
.tiled_surface
= 1;
193 surf
->ss3
.tile_walk
= BRW_TILEWALK_YMAJOR
;
199 brw_create_texture_surface( struct brw_context
*brw
,
200 struct brw_surface_key
*key
)
202 struct brw_surface_state surf
;
205 memset(&surf
, 0, sizeof(surf
));
207 surf
.ss0
.mipmap_layout_mode
= BRW_SURFACE_MIPMAPLAYOUT_BELOW
;
208 surf
.ss0
.surface_type
= translate_tex_target(key
->target
);
210 surf
.ss0
.surface_format
= translate_tex_format(key
->format
,
211 key
->internal_format
,
215 switch (key
->depth
) {
217 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
221 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B8G8R8X8_UNORM
;
224 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_B5G6R5_UNORM
;
229 /* This is ok for all textures with channel width 8bit or less:
231 /* surf.ss0.data_return_format = BRW_SURFACERETURNFORMAT_S1; */
233 surf
.ss1
.base_addr
= key
->bo
->offset
; /* reloc */
235 surf
.ss1
.base_addr
= key
->offset
;
237 surf
.ss2
.mip_count
= key
->last_level
- key
->first_level
;
238 surf
.ss2
.width
= key
->width
- 1;
239 surf
.ss2
.height
= key
->height
- 1;
240 brw_set_surface_tiling(&surf
, key
->tiling
);
241 surf
.ss3
.pitch
= (key
->pitch
* key
->cpp
) - 1;
242 surf
.ss3
.depth
= key
->depth
- 1;
244 surf
.ss4
.min_lod
= 0;
246 if (key
->target
== GL_TEXTURE_CUBE_MAP
) {
247 surf
.ss0
.cube_pos_x
= 1;
248 surf
.ss0
.cube_pos_y
= 1;
249 surf
.ss0
.cube_pos_z
= 1;
250 surf
.ss0
.cube_neg_x
= 1;
251 surf
.ss0
.cube_neg_y
= 1;
252 surf
.ss0
.cube_neg_z
= 1;
255 bo
= brw_upload_cache(&brw
->surface_cache
, BRW_SS_SURFACE
,
257 &key
->bo
, key
->bo
? 1 : 0,
262 /* Emit relocation to surface contents */
263 dri_bo_emit_reloc(bo
,
264 I915_GEM_DOMAIN_SAMPLER
, 0,
266 offsetof(struct brw_surface_state
, ss1
),
273 brw_update_texture_surface( GLcontext
*ctx
, GLuint unit
)
275 struct brw_context
*brw
= brw_context(ctx
);
276 struct gl_texture_object
*tObj
= ctx
->Texture
.Unit
[unit
]._Current
;
277 struct intel_texture_object
*intelObj
= intel_texture_object(tObj
);
278 struct gl_texture_image
*firstImage
= tObj
->Image
[0][intelObj
->firstLevel
];
279 struct brw_surface_key key
;
280 const GLuint surf
= SURF_INDEX_TEXTURE(unit
);
282 memset(&key
, 0, sizeof(key
));
284 if (intelObj
->imageOverride
) {
285 key
.pitch
= intelObj
->pitchOverride
/ intelObj
->mt
->cpp
;
286 key
.depth
= intelObj
->depthOverride
;
288 key
.offset
= intelObj
->textureOffset
;
290 key
.format
= firstImage
->TexFormat
->MesaFormat
;
291 key
.internal_format
= firstImage
->InternalFormat
;
292 key
.pitch
= intelObj
->mt
->pitch
;
293 key
.depth
= firstImage
->Depth
;
294 key
.bo
= intelObj
->mt
->region
->buffer
;
298 key
.target
= tObj
->Target
;
299 key
.depthmode
= tObj
->DepthMode
;
300 key
.first_level
= intelObj
->firstLevel
;
301 key
.last_level
= intelObj
->lastLevel
;
302 key
.width
= firstImage
->Width
;
303 key
.height
= firstImage
->Height
;
304 key
.cpp
= intelObj
->mt
->cpp
;
305 key
.tiling
= intelObj
->mt
->region
->tiling
;
307 dri_bo_unreference(brw
->wm
.surf_bo
[surf
]);
308 brw
->wm
.surf_bo
[surf
] = brw_search_cache(&brw
->surface_cache
,
311 &key
.bo
, key
.bo
? 1 : 0,
313 if (brw
->wm
.surf_bo
[surf
] == NULL
) {
314 brw
->wm
.surf_bo
[surf
] = brw_create_texture_surface(brw
, &key
);
321 * Create the constant buffer surface. Vertex/fragment shader constants will be
322 * read from this buffer with Data Port Read instructions/messages.
325 brw_create_constant_surface( struct brw_context
*brw
,
326 struct brw_surface_key
*key
)
328 const GLint w
= key
->width
- 1;
329 struct brw_surface_state surf
;
332 memset(&surf
, 0, sizeof(surf
));
334 surf
.ss0
.mipmap_layout_mode
= BRW_SURFACE_MIPMAPLAYOUT_BELOW
;
335 surf
.ss0
.surface_type
= BRW_SURFACE_BUFFER
;
336 surf
.ss0
.surface_format
= BRW_SURFACEFORMAT_R32G32B32A32_FLOAT
;
340 surf
.ss1
.base_addr
= key
->bo
->offset
; /* reloc */
342 surf
.ss1
.base_addr
= key
->offset
;
344 surf
.ss2
.width
= w
& 0x7f; /* bits 6:0 of size or width */
345 surf
.ss2
.height
= (w
>> 7) & 0x1fff; /* bits 19:7 of size or width */
346 surf
.ss3
.depth
= (w
>> 20) & 0x7f; /* bits 26:20 of size or width */
347 surf
.ss3
.pitch
= (key
->pitch
* key
->cpp
) - 1; /* ignored?? */
348 brw_set_surface_tiling(&surf
, key
->tiling
); /* tiling now allowed */
350 bo
= brw_upload_cache(&brw
->surface_cache
, BRW_SS_SURFACE
,
352 &key
->bo
, key
->bo
? 1 : 0,
357 /* Emit relocation to surface contents */
358 dri_bo_emit_reloc(bo
,
359 I915_GEM_DOMAIN_SAMPLER
, 0,
361 offsetof(struct brw_surface_state
, ss1
),
368 /* Creates a new WM constant buffer reflecting the current fragment program's
369 * constants, if needed by the fragment program.
371 * Otherwise, constants go through the CURBEs using the brw_constant_buffer
374 static drm_intel_bo
*
375 brw_wm_update_constant_buffer(struct brw_context
*brw
)
377 struct intel_context
*intel
= &brw
->intel
;
378 struct brw_fragment_program
*fp
=
379 (struct brw_fragment_program
*) brw
->fragment_program
;
380 const struct gl_program_parameter_list
*params
= fp
->program
.Base
.Parameters
;
381 const int size
= params
->NumParameters
* 4 * sizeof(GLfloat
);
382 drm_intel_bo
*const_buffer
;
384 /* BRW_NEW_FRAGMENT_PROGRAM */
385 if (!fp
->use_const_buffer
)
388 const_buffer
= drm_intel_bo_alloc(intel
->bufmgr
, "fp_const_buffer",
391 /* _NEW_PROGRAM_CONSTANTS */
392 dri_bo_subdata(const_buffer
, 0, size
, params
->ParameterValues
);
398 * Update the surface state for a WM constant buffer.
399 * The constant buffer will be (re)allocated here if needed.
402 brw_update_wm_constant_surface( GLcontext
*ctx
,
405 struct brw_context
*brw
= brw_context(ctx
);
406 struct brw_surface_key key
;
407 struct brw_fragment_program
*fp
=
408 (struct brw_fragment_program
*) brw
->fragment_program
;
409 const struct gl_program_parameter_list
*params
=
410 fp
->program
.Base
.Parameters
;
412 /* If we're in this state update atom, we need to update WM constants, so
413 * free the old buffer and create a new one for the new contents.
415 dri_bo_unreference(fp
->const_buffer
);
416 fp
->const_buffer
= brw_wm_update_constant_buffer(brw
);
418 /* If there's no constant buffer, then no surface BO is needed to point at
421 if (fp
->const_buffer
== 0) {
422 drm_intel_bo_unreference(brw
->wm
.surf_bo
[surf
]);
423 brw
->wm
.surf_bo
[surf
] = NULL
;
427 memset(&key
, 0, sizeof(key
));
429 key
.format
= MESA_FORMAT_RGBA_FLOAT32
;
430 key
.internal_format
= GL_RGBA
;
431 key
.bo
= fp
->const_buffer
;
432 key
.depthmode
= GL_NONE
;
433 key
.pitch
= params
->NumParameters
;
434 key
.width
= params
->NumParameters
;
440 printf("%s:\n", __FUNCTION__);
441 printf(" width %d height %d depth %d cpp %d pitch %d\n",
442 key.width, key.height, key.depth, key.cpp, key.pitch);
445 dri_bo_unreference(brw
->wm
.surf_bo
[surf
]);
446 brw
->wm
.surf_bo
[surf
] = brw_search_cache(&brw
->surface_cache
,
449 &key
.bo
, key
.bo
? 1 : 0,
451 if (brw
->wm
.surf_bo
[surf
] == NULL
) {
452 brw
->wm
.surf_bo
[surf
] = brw_create_constant_surface(brw
, &key
);
454 brw
->state
.dirty
.brw
|= BRW_NEW_WM_SURFACES
;
458 * Updates surface / buffer for fragment shader constant buffer, if
461 * This consumes the state updates for the constant buffer, and produces
462 * BRW_NEW_WM_SURFACES to get picked up by brw_prepare_wm_surfaces for
463 * inclusion in the binding table.
465 static void prepare_wm_constant_surface(struct brw_context
*brw
)
467 GLcontext
*ctx
= &brw
->intel
.ctx
;
468 struct brw_fragment_program
*fp
=
469 (struct brw_fragment_program
*) brw
->fragment_program
;
470 GLuint surf
= SURF_INDEX_FRAG_CONST_BUFFER
;
472 drm_intel_bo_unreference(fp
->const_buffer
);
473 fp
->const_buffer
= brw_wm_update_constant_buffer(brw
);
475 /* If there's no constant buffer, then no surface BO is needed to point at
478 if (fp
->const_buffer
== 0) {
479 if (brw
->wm
.surf_bo
[surf
] != NULL
) {
480 drm_intel_bo_unreference(brw
->wm
.surf_bo
[surf
]);
481 brw
->wm
.surf_bo
[surf
] = NULL
;
482 brw
->state
.dirty
.brw
|= BRW_NEW_WM_SURFACES
;
487 brw_update_wm_constant_surface(ctx
, surf
);
490 const struct brw_tracked_state brw_wm_constant_surface
= {
492 .mesa
= (_NEW_PROGRAM_CONSTANTS
),
493 .brw
= (BRW_NEW_FRAGMENT_PROGRAM
),
496 .prepare
= prepare_wm_constant_surface
,
501 * Sets up a surface state structure to point at the given region.
502 * While it is only used for the front/back buffer currently, it should be
503 * usable for further buffers when doing ARB_draw_buffer support.
506 brw_update_renderbuffer_surface(struct brw_context
*brw
,
507 struct gl_renderbuffer
*rb
,
510 GLcontext
*ctx
= &brw
->intel
.ctx
;
511 dri_bo
*region_bo
= NULL
;
512 struct intel_renderbuffer
*irb
= intel_renderbuffer(rb
);
513 struct intel_region
*region
= irb
? irb
->region
: NULL
;
515 unsigned int surface_type
;
516 unsigned int surface_format
;
517 unsigned int width
, height
, pitch
, cpp
;
518 GLubyte color_mask
[4];
519 GLboolean color_blend
;
521 uint32_t draw_offset
;
524 memset(&key
, 0, sizeof(key
));
526 if (region
!= NULL
) {
527 region_bo
= region
->buffer
;
529 key
.surface_type
= BRW_SURFACE_2D
;
530 switch (irb
->texformat
->MesaFormat
) {
531 case MESA_FORMAT_ARGB8888
:
532 key
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
534 case MESA_FORMAT_RGB565
:
535 key
.surface_format
= BRW_SURFACEFORMAT_B5G6R5_UNORM
;
537 case MESA_FORMAT_ARGB1555
:
538 key
.surface_format
= BRW_SURFACEFORMAT_B5G5R5A1_UNORM
;
540 case MESA_FORMAT_ARGB4444
:
541 key
.surface_format
= BRW_SURFACEFORMAT_B4G4R4A4_UNORM
;
544 _mesa_problem(ctx
, "Bad renderbuffer format: %d\n",
545 irb
->texformat
->MesaFormat
);
547 key
.tiling
= region
->tiling
;
548 key
.width
= region
->width
;
549 key
.height
= region
->height
;
550 key
.pitch
= region
->pitch
;
551 key
.cpp
= region
->cpp
;
552 key
.draw_offset
= region
->draw_offset
; /* cur 3d or cube face offset */
554 key
.surface_type
= BRW_SURFACE_NULL
;
555 key
.surface_format
= BRW_SURFACEFORMAT_B8G8R8A8_UNORM
;
562 memcpy(key
.color_mask
, ctx
->Color
.ColorMask
,
563 sizeof(key
.color_mask
));
564 key
.color_blend
= (!ctx
->Color
._LogicOpEnabled
&&
565 ctx
->Color
.BlendEnabled
);
567 dri_bo_unreference(brw
->wm
.surf_bo
[unit
]);
568 brw
->wm
.surf_bo
[unit
] = brw_search_cache(&brw
->surface_cache
,
574 if (brw
->wm
.surf_bo
[unit
] == NULL
) {
575 struct brw_surface_state surf
;
577 memset(&surf
, 0, sizeof(surf
));
579 surf
.ss0
.surface_format
= key
.surface_format
;
580 surf
.ss0
.surface_type
= key
.surface_type
;
581 if (key
.tiling
== I915_TILING_NONE
) {
582 surf
.ss1
.base_addr
= key
.draw_offset
;
584 uint32_t tile_offset
= key
.draw_offset
% 4096;
586 surf
.ss1
.base_addr
= key
.draw_offset
- tile_offset
;
588 assert(BRW_IS_G4X(brw
) || tile_offset
== 0);
589 if (BRW_IS_G4X(brw
)) {
590 if (key
.tiling
== I915_TILING_X
) {
591 /* Note that the low bits of these fields are missing, so
592 * there's the possibility of getting in trouble.
594 surf
.ss5
.x_offset
= (tile_offset
% 512) / key
.cpp
/ 4;
595 surf
.ss5
.y_offset
= tile_offset
/ 512 / 2;
597 surf
.ss5
.x_offset
= (tile_offset
% 128) / key
.cpp
/ 4;
598 surf
.ss5
.y_offset
= tile_offset
/ 128 / 2;
602 if (region_bo
!= NULL
)
603 surf
.ss1
.base_addr
+= region_bo
->offset
; /* reloc */
605 surf
.ss2
.width
= key
.width
- 1;
606 surf
.ss2
.height
= key
.height
- 1;
607 brw_set_surface_tiling(&surf
, key
.tiling
);
608 surf
.ss3
.pitch
= (key
.pitch
* key
.cpp
) - 1;
611 surf
.ss0
.color_blend
= key
.color_blend
;
612 surf
.ss0
.writedisable_red
= !key
.color_mask
[0];
613 surf
.ss0
.writedisable_green
= !key
.color_mask
[1];
614 surf
.ss0
.writedisable_blue
= !key
.color_mask
[2];
615 surf
.ss0
.writedisable_alpha
= !key
.color_mask
[3];
617 /* Key size will never match key size for textures, so we're safe. */
618 brw
->wm
.surf_bo
[unit
] = brw_upload_cache(&brw
->surface_cache
,
624 if (region_bo
!= NULL
) {
625 /* We might sample from it, and we might render to it, so flag
626 * them both. We might be able to figure out from other state
627 * a more restrictive relocation to emit.
629 drm_intel_bo_emit_reloc(brw
->wm
.surf_bo
[unit
],
630 offsetof(struct brw_surface_state
, ss1
),
633 I915_GEM_DOMAIN_RENDER
,
634 I915_GEM_DOMAIN_RENDER
);
641 * Constructs the binding table for the WM surface state, which maps unit
642 * numbers to surface state objects.
645 brw_wm_get_binding_table(struct brw_context
*brw
)
649 assert(brw
->wm
.nr_surfaces
<= BRW_WM_MAX_SURF
);
651 bind_bo
= brw_search_cache(&brw
->surface_cache
, BRW_SS_SURF_BIND
,
653 brw
->wm
.surf_bo
, brw
->wm
.nr_surfaces
,
656 if (bind_bo
== NULL
) {
657 GLuint data_size
= brw
->wm
.nr_surfaces
* sizeof(GLuint
);
658 uint32_t *data
= malloc(data_size
);
661 for (i
= 0; i
< brw
->wm
.nr_surfaces
; i
++)
662 if (brw
->wm
.surf_bo
[i
])
663 data
[i
] = brw
->wm
.surf_bo
[i
]->offset
;
667 bind_bo
= brw_upload_cache( &brw
->surface_cache
, BRW_SS_SURF_BIND
,
669 brw
->wm
.surf_bo
, brw
->wm
.nr_surfaces
,
673 /* Emit binding table relocations to surface state */
674 for (i
= 0; i
< BRW_WM_MAX_SURF
; i
++) {
675 if (brw
->wm
.surf_bo
[i
] != NULL
) {
676 dri_bo_emit_reloc(bind_bo
,
677 I915_GEM_DOMAIN_INSTRUCTION
, 0,
690 static void prepare_wm_surfaces(struct brw_context
*brw
)
692 GLcontext
*ctx
= &brw
->intel
.ctx
;
693 struct intel_context
*intel
= &brw
->intel
;
698 /* Update surfaces for drawing buffers */
699 if (ctx
->DrawBuffer
->_NumColorDrawBuffers
>= 1) {
700 for (i
= 0; i
< ctx
->DrawBuffer
->_NumColorDrawBuffers
; i
++) {
701 brw_update_renderbuffer_surface(brw
,
702 ctx
->DrawBuffer
->_ColorDrawBuffers
[i
],
706 brw_update_renderbuffer_surface(brw
, NULL
, 0);
709 old_nr_surfaces
= brw
->wm
.nr_surfaces
;
710 brw
->wm
.nr_surfaces
= MAX_DRAW_BUFFERS
;
712 if (brw
->wm
.surf_bo
[SURF_INDEX_FRAG_CONST_BUFFER
] != NULL
)
713 brw
->wm
.nr_surfaces
= SURF_INDEX_FRAG_CONST_BUFFER
+ 1;
715 /* Update surfaces for textures */
716 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
717 const struct gl_texture_unit
*texUnit
= &ctx
->Texture
.Unit
[i
];
718 const GLuint surf
= SURF_INDEX_TEXTURE(i
);
720 /* _NEW_TEXTURE, BRW_NEW_TEXDATA */
721 if (texUnit
->_ReallyEnabled
) {
722 if (texUnit
->_Current
== intel
->frame_buffer_texobj
) {
723 /* render to texture */
724 dri_bo_unreference(brw
->wm
.surf_bo
[surf
]);
725 brw
->wm
.surf_bo
[surf
] = brw
->wm
.surf_bo
[0];
726 dri_bo_reference(brw
->wm
.surf_bo
[surf
]);
727 brw
->wm
.nr_surfaces
= surf
+ 1;
729 /* regular texture */
730 brw_update_texture_surface(ctx
, i
);
731 brw
->wm
.nr_surfaces
= surf
+ 1;
734 dri_bo_unreference(brw
->wm
.surf_bo
[surf
]);
735 brw
->wm
.surf_bo
[surf
] = NULL
;
739 dri_bo_unreference(brw
->wm
.bind_bo
);
740 brw
->wm
.bind_bo
= brw_wm_get_binding_table(brw
);
742 if (brw
->wm
.nr_surfaces
!= old_nr_surfaces
)
743 brw
->state
.dirty
.brw
|= BRW_NEW_NR_WM_SURFACES
;
746 const struct brw_tracked_state brw_wm_surfaces
= {
748 .mesa
= (_NEW_COLOR
|
751 .brw
= (BRW_NEW_CONTEXT
|
752 BRW_NEW_WM_SURFACES
),
755 .prepare
= prepare_wm_surfaces
,