src/mesa/drivers/dri/i965/gen6_cc.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "brw_context.h"
  29 #include "brw_state.h"
  30 #include "brw_defines.h"
  31 #include "brw_util.h"
  32 #include "intel_batchbuffer.h"
  33 #include "main/macros.h"
  34 #include "main/enums.h"
  35 #include "main/glformats.h"
  36
  37 static void
  38 gen6_upload_blend_state(struct brw_context *brw)
  39 {
  40    bool is_buffer_zero_integer_format = false;
  41    struct gl_context *ctx = &brw->intel.ctx;
  42    struct gen6_blend_state *blend;
  43    int b;
  44    int nr_draw_buffers = ctx->DrawBuffer->_NumColorDrawBuffers;
  45    int size;
  46
  47    /* We need at least one BLEND_STATE written, because we might do
  48     * thread dispatch even if _NumColorDrawBuffers is 0 (for example
  49     * for computed depth or alpha test), which will do an FB write
  50     * with render target 0, which will reference BLEND_STATE[0] for
  51     * alpha test enable.
  52     */
  53    if (nr_draw_buffers == 0 && ctx->Color.AlphaEnabled)
  54       nr_draw_buffers = 1;
  55
  56    size = sizeof(*blend) * nr_draw_buffers;
  57    blend = brw_state_batch(brw, AUB_TRACE_BLEND_STATE,
  58                            size, 64, &brw->cc.blend_state_offset);
  59
  60    memset(blend, 0, size);
  61
  62    for (b = 0; b < nr_draw_buffers; b++) {
  63       /* _NEW_BUFFERS */
  64       struct gl_renderbuffer *rb = ctx->DrawBuffer->_ColorDrawBuffers[b];
  65       GLenum rb_type;
  66       bool integer;
  67
  68       if (rb)
  69          rb_type = _mesa_get_format_datatype(rb->Format);
  70       else
  71          rb_type = GL_UNSIGNED_NORMALIZED;
  72
  73       /* Used for implementing the following bit of GL_EXT_texture_integer:
  74        *     "Per-fragment operations that require floating-point color
  75        *      components, including multisample alpha operations, alpha test,
  76        *      blending, and dithering, have no effect when the corresponding
  77        *      colors are written to an integer color buffer."
  78       */
  79       integer = (rb_type == GL_INT || rb_type == GL_UNSIGNED_INT);
  80
  81       if(b == 0 && integer)
  82          is_buffer_zero_integer_format = true;
  83
  84       /* _NEW_COLOR */
  85       if (ctx->Color.ColorLogicOpEnabled) {
  86          /* Floating point RTs should have no effect from LogicOp,
  87           * except for disabling of blending, but other types should.
  88           *
  89           * However, from the Sandy Bridge PRM, Vol 2 Par 1, Section 8.1.11,
  90           * "Logic Ops",
  91           *
  92           *     "Logic Ops are only supported on *_UNORM surfaces (excluding
  93           *      _SRGB variants), otherwise Logic Ops must be DISABLED."
  94           */
  95          WARN_ONCE(ctx->Color.LogicOp != GL_COPY &&
  96                    rb_type != GL_UNSIGNED_NORMALIZED &&
  97                    rb_type != GL_FLOAT, "Ignoring %s logic op on %s "
  98                    "renderbuffer\n",
  99                    _mesa_lookup_enum_by_nr(ctx->Color.LogicOp),
 100                    _mesa_lookup_enum_by_nr(rb_type));
 101          if (rb_type == GL_UNSIGNED_NORMALIZED) {
 102             blend[b].blend1.logic_op_enable = 1;
 103             blend[b].blend1.logic_op_func =
 104                intel_translate_logic_op(ctx->Color.LogicOp);
 105          }
 106       } else if (ctx->Color.BlendEnabled & (1 << b) && !integer) {
 107          GLenum eqRGB = ctx->Color.Blend[b].EquationRGB;
 108          GLenum eqA = ctx->Color.Blend[b].EquationA;
 109          GLenum srcRGB = ctx->Color.Blend[b].SrcRGB;
 110          GLenum dstRGB = ctx->Color.Blend[b].DstRGB;
 111          GLenum srcA = ctx->Color.Blend[b].SrcA;
 112          GLenum dstA = ctx->Color.Blend[b].DstA;
 113
 114          if (eqRGB == GL_MIN || eqRGB == GL_MAX) {
 115             srcRGB = dstRGB = GL_ONE;
 116          }
 117
 118          if (eqA == GL_MIN || eqA == GL_MAX) {
 119             srcA = dstA = GL_ONE;
 120          }
 121
 122          /* Due to hardware limitations, the destination may have information
 123           * in an alpha channel even when the format specifies no alpha
 124           * channel. In order to avoid getting any incorrect blending due to
 125           * that alpha channel, coerce the blend factors to values that will
 126           * not read the alpha channel, but will instead use the correct
 127           * implicit value for alpha.
 128           */
 129          if (rb && !_mesa_base_format_has_channel(rb->_BaseFormat, GL_TEXTURE_ALPHA_TYPE))
 130          {
 131             srcRGB = brw_fix_xRGB_alpha(srcRGB);
 132             srcA = brw_fix_xRGB_alpha(srcA);
 133             dstRGB = brw_fix_xRGB_alpha(dstRGB);
 134             dstA = brw_fix_xRGB_alpha(dstA);
 135          }
 136
 137          blend[b].blend0.dest_blend_factor = brw_translate_blend_factor(dstRGB);
 138          blend[b].blend0.source_blend_factor = brw_translate_blend_factor(srcRGB);
 139          blend[b].blend0.blend_func = brw_translate_blend_equation(eqRGB);
 140
 141          blend[b].blend0.ia_dest_blend_factor = brw_translate_blend_factor(dstA);
 142          blend[b].blend0.ia_source_blend_factor = brw_translate_blend_factor(srcA);
 143          blend[b].blend0.ia_blend_func = brw_translate_blend_equation(eqA);
 144
 145          blend[b].blend0.blend_enable = 1;
 146          blend[b].blend0.ia_blend_enable = (srcA != srcRGB ||
 147                                          dstA != dstRGB ||
 148                                          eqA != eqRGB);
 149       }
 150
 151       /* See section 8.1.6 "Pre-Blend Color Clamping" of the
 152        * SandyBridge PRM Volume 2 Part 1 for HW requirements.
 153        *
 154        * We do our ARB_color_buffer_float CLAMP_FRAGMENT_COLOR
 155        * clamping in the fragment shader.  For its clamping of
 156        * blending, the spec says:
 157        *
 158        *     "RESOLVED: For fixed-point color buffers, the inputs and
 159        *      the result of the blending equation are clamped.  For
 160        *      floating-point color buffers, no clamping occurs."
 161        *
 162        * So, generally, we want clamping to the render target's range.
 163        * And, good news, the hardware tables for both pre- and
 164        * post-blend color clamping are either ignored, or any are
 165        * allowed, or clamping is required but RT range clamping is a
 166        * valid option.
 167        */
 168       blend[b].blend1.pre_blend_clamp_enable = 1;
 169       blend[b].blend1.post_blend_clamp_enable = 1;
 170       blend[b].blend1.clamp_range = BRW_RENDERTARGET_CLAMPRANGE_FORMAT;
 171
 172       /* _NEW_COLOR */
 173       if (ctx->Color.AlphaEnabled && !integer) {
 174          blend[b].blend1.alpha_test_enable = 1;
 175          blend[b].blend1.alpha_test_func =
 176             intel_translate_compare_func(ctx->Color.AlphaFunc);
 177
 178       }
 179
 180       /* _NEW_COLOR */
 181       if (ctx->Color.DitherFlag && !integer) {
 182          blend[b].blend1.dither_enable = 1;
 183          blend[b].blend1.y_dither_offset = 0;
 184          blend[b].blend1.x_dither_offset = 0;
 185       }
 186
 187       blend[b].blend1.write_disable_r = !ctx->Color.ColorMask[b][0];
 188       blend[b].blend1.write_disable_g = !ctx->Color.ColorMask[b][1];
 189       blend[b].blend1.write_disable_b = !ctx->Color.ColorMask[b][2];
 190       blend[b].blend1.write_disable_a = !ctx->Color.ColorMask[b][3];
 191
 192       /* OpenGL specification 3.3 (page 196), section 4.1.3 says:
 193        * "If drawbuffer zero is not NONE and the buffer it references has an
 194        * integer format, the SAMPLE_ALPHA_TO_COVERAGE and SAMPLE_ALPHA_TO_ONE
 195        * operations are skipped."
 196        */
 197       if(!is_buffer_zero_integer_format) {
 198          /* _NEW_MULTISAMPLE */
 199          blend[b].blend1.alpha_to_coverage =
 200             ctx->Multisample._Enabled && ctx->Multisample.SampleAlphaToCoverage;
 201
 202         /* From SandyBridge PRM, volume 2 Part 1, section 8.2.3, BLEND_STATE:
 203          * DWord 1, Bit 30 (AlphaToOne Enable):
 204          * "If Dual Source Blending is enabled, this bit must be disabled"
 205          */
 206          WARN_ONCE(ctx->Color.Blend[b]._UsesDualSrc &&
 207                    ctx->Multisample._Enabled &&
 208                    ctx->Multisample.SampleAlphaToOne,
 209                    "HW workaround: disabling alpha to one with dual src "
 210                    "blending\n");
 211          if (ctx->Color.Blend[b]._UsesDualSrc)
 212             blend[b].blend1.alpha_to_one = false;
 213          else
 214             blend[b].blend1.alpha_to_one =
 215                ctx->Multisample._Enabled && ctx->Multisample.SampleAlphaToOne;
 216
 217          blend[b].blend1.alpha_to_coverage_dither = (brw->intel.gen >= 7);
 218       }
 219       else {
 220          blend[b].blend1.alpha_to_coverage = false;
 221          blend[b].blend1.alpha_to_one = false;
 222       }
 223    }
 224
 225    brw->state.dirty.cache |= CACHE_NEW_BLEND_STATE;
 226 }
 227
 228 const struct brw_tracked_state gen6_blend_state = {
 229    .dirty = {
 230       .mesa = (_NEW_COLOR |
 231                _NEW_BUFFERS |
 232                _NEW_MULTISAMPLE),
 233       .brw = BRW_NEW_BATCH,
 234       .cache = 0,
 235    },
 236    .emit = gen6_upload_blend_state,
 237 };
 238
 239 static void
 240 gen6_upload_color_calc_state(struct brw_context *brw)
 241 {
 242    struct gl_context *ctx = &brw->intel.ctx;
 243    struct gen6_color_calc_state *cc;
 244
 245    cc = brw_state_batch(brw, AUB_TRACE_CC_STATE,
 246                         sizeof(*cc), 64, &brw->cc.state_offset);
 247    memset(cc, 0, sizeof(*cc));
 248
 249    /* _NEW_COLOR */
 250    cc->cc0.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8;
 251    UNCLAMPED_FLOAT_TO_UBYTE(cc->cc1.alpha_ref_fi.ui, ctx->Color.AlphaRef);
 252
 253    /* _NEW_STENCIL */
 254    cc->cc0.stencil_ref = ctx->Stencil.Ref[0];
 255    cc->cc0.bf_stencil_ref = ctx->Stencil.Ref[ctx->Stencil._BackFace];
 256
 257    /* _NEW_COLOR */
 258    cc->constant_r = ctx->Color.BlendColorUnclamped[0];
 259    cc->constant_g = ctx->Color.BlendColorUnclamped[1];
 260    cc->constant_b = ctx->Color.BlendColorUnclamped[2];
 261    cc->constant_a = ctx->Color.BlendColorUnclamped[3];
 262
 263    brw->state.dirty.cache |= CACHE_NEW_COLOR_CALC_STATE;
 264 }
 265
 266 const struct brw_tracked_state gen6_color_calc_state = {
 267    .dirty = {
 268       .mesa = _NEW_COLOR | _NEW_STENCIL,
 269       .brw = BRW_NEW_BATCH,
 270       .cache = 0,
 271    },
 272    .emit = gen6_upload_color_calc_state,
 273 };
 274
 275 static void upload_cc_state_pointers(struct brw_context *brw)
 276 {
 277    struct intel_context *intel = &brw->intel;
 278
 279    BEGIN_BATCH(4);
 280    OUT_BATCH(_3DSTATE_CC_STATE_POINTERS << 16 | (4 - 2));
 281    OUT_BATCH(brw->cc.blend_state_offset | 1);
 282    OUT_BATCH(brw->cc.depth_stencil_state_offset | 1);
 283    OUT_BATCH(brw->cc.state_offset | 1);
 284    ADVANCE_BATCH();
 285 }
 286
 287 const struct brw_tracked_state gen6_cc_state_pointers = {
 288    .dirty = {
 289       .mesa = 0,
 290       .brw = (BRW_NEW_BATCH |
 291               BRW_NEW_STATE_BASE_ADDRESS),
 292       .cache = (CACHE_NEW_BLEND_STATE |
 293                 CACHE_NEW_COLOR_CALC_STATE |
 294                 CACHE_NEW_DEPTH_STENCIL_STATE)
 295    },
 296    .emit = upload_cc_state_pointers,
 297 };