i965: Store image_param in brw_context instead of prog_data
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_constant_state.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "brw_program.h"
28 #include "intel_batchbuffer.h"
29 #include "intel_buffer_objects.h"
30 #include "program/prog_parameter.h"
31
32 static uint32_t
33 f_as_u32(float f)
34 {
35 return *(uint32_t *)&f;
36 }
37
38 static uint32_t
39 brw_param_value(struct brw_context *brw,
40 const struct gl_program *prog,
41 const struct brw_stage_state *stage_state,
42 uint32_t param)
43 {
44 struct gl_context *ctx = &brw->ctx;
45
46 switch (BRW_PARAM_DOMAIN(param)) {
47 case BRW_PARAM_DOMAIN_BUILTIN:
48 if (param == BRW_PARAM_BUILTIN_ZERO) {
49 return 0;
50 } else if (BRW_PARAM_BUILTIN_IS_CLIP_PLANE(param)) {
51 gl_clip_plane *clip_planes = brw_select_clip_planes(ctx);
52 unsigned idx = BRW_PARAM_BUILTIN_CLIP_PLANE_IDX(param);
53 unsigned comp = BRW_PARAM_BUILTIN_CLIP_PLANE_COMP(param);
54 return ((uint32_t *)clip_planes[idx])[comp];
55 } else if (param >= BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X &&
56 param <= BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_W) {
57 unsigned i = param - BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X;
58 return f_as_u32(ctx->TessCtrlProgram.patch_default_outer_level[i]);
59 } else if (param == BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_X) {
60 return f_as_u32(ctx->TessCtrlProgram.patch_default_inner_level[0]);
61 } else if (param == BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_Y) {
62 return f_as_u32(ctx->TessCtrlProgram.patch_default_inner_level[1]);
63 } else {
64 unreachable("Invalid param builtin");
65 }
66
67 case BRW_PARAM_DOMAIN_PARAMETER: {
68 unsigned idx = BRW_PARAM_PARAMETER_IDX(param);
69 unsigned comp = BRW_PARAM_PARAMETER_COMP(param);
70 assert(idx < prog->Parameters->NumParameters);
71 return prog->Parameters->ParameterValues[idx][comp].u;
72 }
73
74 case BRW_PARAM_DOMAIN_UNIFORM: {
75 unsigned idx = BRW_PARAM_UNIFORM_IDX(param);
76 assert(idx < prog->sh.data->NumUniformDataSlots);
77 return prog->sh.data->UniformDataSlots[idx].u;
78 }
79
80 case BRW_PARAM_DOMAIN_IMAGE: {
81 unsigned idx = BRW_PARAM_IMAGE_IDX(param);
82 unsigned offset = BRW_PARAM_IMAGE_OFFSET(param);
83 assert(offset < ARRAY_SIZE(stage_state->image_param));
84 return ((uint32_t *)&stage_state->image_param[idx])[offset];
85 }
86
87 default:
88 unreachable("Invalid param domain");
89 }
90 }
91
92
93 void
94 brw_populate_constant_data(struct brw_context *brw,
95 const struct gl_program *prog,
96 const struct brw_stage_state *stage_state,
97 void *void_dst,
98 const uint32_t *param,
99 unsigned nr_params)
100 {
101 uint32_t *dst = void_dst;
102 for (unsigned i = 0; i < nr_params; i++)
103 dst[i] = brw_param_value(brw, prog, stage_state, param[i]);
104 }
105
106
107 /**
108 * Creates a streamed BO containing the push constants for the VS or GS on
109 * gen6+.
110 *
111 * Push constants are constant values (such as GLSL uniforms) that are
112 * pre-loaded into a shader stage's register space at thread spawn time.
113 *
114 * Not all GLSL uniforms will be uploaded as push constants: The hardware has
115 * a limitation of 32 or 64 EU registers (256 or 512 floats) per stage to be
116 * uploaded as push constants, while GL 4.4 requires at least 1024 components
117 * to be usable for the VS. Plus, currently we always use pull constants
118 * instead of push constants when doing variable-index array access.
119 *
120 * See brw_curbe.c for the equivalent gen4/5 code.
121 */
122 void
123 gen6_upload_push_constants(struct brw_context *brw,
124 const struct gl_program *prog,
125 const struct brw_stage_prog_data *prog_data,
126 struct brw_stage_state *stage_state)
127 {
128 const struct gen_device_info *devinfo = &brw->screen->devinfo;
129 struct gl_context *ctx = &brw->ctx;
130
131 if (prog_data->nr_params == 0) {
132 stage_state->push_const_size = 0;
133 } else {
134 /* Updates the ParamaterValues[i] pointers for all parameters of the
135 * basic type of PROGRAM_STATE_VAR.
136 */
137 /* XXX: Should this happen somewhere before to get our state flag set? */
138 if (prog)
139 _mesa_load_state_parameters(ctx, prog->Parameters);
140
141 int i;
142 const int size = prog_data->nr_params * sizeof(gl_constant_value);
143 gl_constant_value *param;
144 if (devinfo->gen >= 8 || devinfo->is_haswell) {
145 param = intel_upload_space(brw, size, 32,
146 &stage_state->push_const_bo,
147 &stage_state->push_const_offset);
148 } else {
149 param = brw_state_batch(brw, size, 32,
150 &stage_state->push_const_offset);
151 }
152
153 STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
154
155 /* _NEW_PROGRAM_CONSTANTS
156 *
157 * Also _NEW_TRANSFORM -- we may reference clip planes other than as a
158 * side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS
159 * wouldn't be set for them.
160 */
161 brw_populate_constant_data(brw, prog, stage_state, param,
162 prog_data->param,
163 prog_data->nr_params);
164
165 if (0) {
166 fprintf(stderr, "%s constants:\n",
167 _mesa_shader_stage_to_string(stage_state->stage));
168 for (i = 0; i < prog_data->nr_params; i++) {
169 if ((i & 7) == 0)
170 fprintf(stderr, "g%d: ",
171 prog_data->dispatch_grf_start_reg + i / 8);
172 fprintf(stderr, "%8f ", param[i].f);
173 if ((i & 7) == 7)
174 fprintf(stderr, "\n");
175 }
176 if ((i & 7) != 0)
177 fprintf(stderr, "\n");
178 fprintf(stderr, "\n");
179 }
180
181 stage_state->push_const_size = ALIGN(prog_data->nr_params, 8) / 8;
182 /* We can only push 32 registers of constants at a time. */
183
184 /* From the SNB PRM (vol2, part 1, section 3.2.1.4: 3DSTATE_CONSTANT_VS:
185 *
186 * "The sum of all four read length fields (each incremented to
187 * represent the actual read length) must be less than or equal to
188 * 32"
189 *
190 * From the IVB PRM (vol2, part 1, section 3.2.1.3: 3DSTATE_CONSTANT_VS:
191 *
192 * "The sum of all four read length fields must be less than or
193 * equal to the size of 64"
194 *
195 * The other shader stages all match the VS's limits.
196 */
197 assert(stage_state->push_const_size <= 32);
198 }
199
200 stage_state->push_constants_dirty = true;
201 }
202
203
204 /**
205 * Creates a temporary BO containing the pull constant data for the shader
206 * stage, and the SURFACE_STATE struct that points at it.
207 *
208 * Pull constants are GLSL uniforms (and other constant data) beyond what we
209 * could fit as push constants, or that have variable-index array access
210 * (which is easiest to support using pull constants, and avoids filling
211 * register space with mostly-unused data).
212 *
213 * Compare this path to brw_curbe.c for gen4/5 push constants, and
214 * gen6_vs_state.c for gen6+ push constants.
215 */
216 void
217 brw_upload_pull_constants(struct brw_context *brw,
218 GLbitfield64 brw_new_constbuf,
219 const struct gl_program *prog,
220 struct brw_stage_state *stage_state,
221 const struct brw_stage_prog_data *prog_data)
222 {
223 unsigned i;
224 uint32_t surf_index = prog_data->binding_table.pull_constants_start;
225
226 if (!prog_data->nr_pull_params) {
227 if (stage_state->surf_offset[surf_index]) {
228 stage_state->surf_offset[surf_index] = 0;
229 brw->ctx.NewDriverState |= brw_new_constbuf;
230 }
231 return;
232 }
233
234 /* Updates the ParamaterValues[i] pointers for all parameters of the
235 * basic type of PROGRAM_STATE_VAR.
236 */
237 _mesa_load_state_parameters(&brw->ctx, prog->Parameters);
238
239 /* BRW_NEW_*_PROG_DATA | _NEW_PROGRAM_CONSTANTS */
240 uint32_t size = prog_data->nr_pull_params * 4;
241 struct brw_bo *const_bo = NULL;
242 uint32_t const_offset;
243 gl_constant_value *constants = intel_upload_space(brw, size, 64,
244 &const_bo, &const_offset);
245
246 STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
247
248 brw_populate_constant_data(brw, prog, stage_state, constants,
249 prog_data->pull_param,
250 prog_data->nr_pull_params);
251
252 if (0) {
253 for (i = 0; i < ALIGN(prog_data->nr_pull_params, 4) / 4; i++) {
254 const gl_constant_value *row = &constants[i * 4];
255 fprintf(stderr, "const surface %3d: %4.3f %4.3f %4.3f %4.3f\n",
256 i, row[0].f, row[1].f, row[2].f, row[3].f);
257 }
258 }
259
260 brw_create_constant_surface(brw, const_bo, const_offset, size,
261 &stage_state->surf_offset[surf_index]);
262 brw_bo_unreference(const_bo);
263
264 brw->ctx.NewDriverState |= brw_new_constbuf;
265 }
266
267 /**
268 * Creates a region containing the push constants for the CS on gen7+.
269 *
270 * Push constants are constant values (such as GLSL uniforms) that are
271 * pre-loaded into a shader stage's register space at thread spawn time.
272 *
273 * For other stages, see brw_curbe.c:brw_upload_constant_buffer for the
274 * equivalent gen4/5 code and gen6_vs_state.c:gen6_upload_push_constants for
275 * gen6+.
276 */
277 void
278 brw_upload_cs_push_constants(struct brw_context *brw,
279 const struct gl_program *prog,
280 const struct brw_cs_prog_data *cs_prog_data,
281 struct brw_stage_state *stage_state)
282 {
283 struct gl_context *ctx = &brw->ctx;
284 const struct brw_stage_prog_data *prog_data =
285 (struct brw_stage_prog_data*) cs_prog_data;
286
287 /* Updates the ParamaterValues[i] pointers for all parameters of the
288 * basic type of PROGRAM_STATE_VAR.
289 */
290 /* XXX: Should this happen somewhere before to get our state flag set? */
291 _mesa_load_state_parameters(ctx, prog->Parameters);
292
293 if (cs_prog_data->push.total.size == 0) {
294 stage_state->push_const_size = 0;
295 return;
296 }
297
298
299 uint32_t *param =
300 brw_state_batch(brw, ALIGN(cs_prog_data->push.total.size, 64),
301 64, &stage_state->push_const_offset);
302 assert(param);
303
304 STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
305
306 if (cs_prog_data->push.cross_thread.size > 0) {
307 uint32_t *param_copy = param;
308 assert(cs_prog_data->thread_local_id_index < 0 ||
309 cs_prog_data->thread_local_id_index >=
310 cs_prog_data->push.cross_thread.dwords);
311 for (unsigned i = 0;
312 i < cs_prog_data->push.cross_thread.dwords;
313 i++) {
314 param_copy[i] = brw_param_value(brw, prog, stage_state,
315 prog_data->param[i]);
316 }
317 }
318
319 if (cs_prog_data->push.per_thread.size > 0) {
320 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
321 unsigned dst =
322 8 * (cs_prog_data->push.per_thread.regs * t +
323 cs_prog_data->push.cross_thread.regs);
324 unsigned src = cs_prog_data->push.cross_thread.dwords;
325 for ( ; src < prog_data->nr_params; src++, dst++) {
326 if (src != cs_prog_data->thread_local_id_index) {
327 param[dst] = brw_param_value(brw, prog, stage_state,
328 prog_data->param[src]);
329 } else {
330 param[dst] = t * cs_prog_data->simd_size;
331 }
332 }
333 }
334 }
335
336 stage_state->push_const_size =
337 cs_prog_data->push.cross_thread.regs +
338 cs_prog_data->push.per_thread.regs;
339 }