i965: Fix type of brw_context::render_target_format[]
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_constant_state.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "intel_batchbuffer.h"
28 #include "intel_buffer_objects.h"
29 #include "program/prog_parameter.h"
30
31 /**
32 * Creates a streamed BO containing the push constants for the VS or GS on
33 * gen6+.
34 *
35 * Push constants are constant values (such as GLSL uniforms) that are
36 * pre-loaded into a shader stage's register space at thread spawn time.
37 *
38 * Not all GLSL uniforms will be uploaded as push constants: The hardware has
39 * a limitation of 32 or 64 EU registers (256 or 512 floats) per stage to be
40 * uploaded as push constants, while GL 4.4 requires at least 1024 components
41 * to be usable for the VS. Plus, currently we always use pull constants
42 * instead of push constants when doing variable-index array access.
43 *
44 * See brw_curbe.c for the equivalent gen4/5 code.
45 */
46 void
47 gen6_upload_push_constants(struct brw_context *brw,
48 const struct gl_program *prog,
49 const struct brw_stage_prog_data *prog_data,
50 struct brw_stage_state *stage_state)
51 {
52 struct gl_context *ctx = &brw->ctx;
53
54 if (prog_data->nr_params == 0) {
55 stage_state->push_const_size = 0;
56 } else {
57 /* Updates the ParamaterValues[i] pointers for all parameters of the
58 * basic type of PROGRAM_STATE_VAR.
59 */
60 /* XXX: Should this happen somewhere before to get our state flag set? */
61 if (prog)
62 _mesa_load_state_parameters(ctx, prog->Parameters);
63
64 int i;
65 const int size = prog_data->nr_params * sizeof(gl_constant_value);
66 gl_constant_value *param;
67 if (brw->gen >= 8 || brw->is_haswell) {
68 param = intel_upload_space(brw, size, 32, &brw->curbe.curbe_bo,
69 &stage_state->push_const_offset);
70 } else {
71 param = brw_state_batch(brw, size, 32,
72 &stage_state->push_const_offset);
73 }
74
75 STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
76
77 /* _NEW_PROGRAM_CONSTANTS
78 *
79 * Also _NEW_TRANSFORM -- we may reference clip planes other than as a
80 * side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS
81 * wouldn't be set for them.
82 */
83 for (i = 0; i < prog_data->nr_params; i++) {
84 param[i] = *prog_data->param[i];
85 }
86
87 if (0) {
88 fprintf(stderr, "%s constants:\n",
89 _mesa_shader_stage_to_string(stage_state->stage));
90 for (i = 0; i < prog_data->nr_params; i++) {
91 if ((i & 7) == 0)
92 fprintf(stderr, "g%d: ",
93 prog_data->dispatch_grf_start_reg + i / 8);
94 fprintf(stderr, "%8f ", param[i].f);
95 if ((i & 7) == 7)
96 fprintf(stderr, "\n");
97 }
98 if ((i & 7) != 0)
99 fprintf(stderr, "\n");
100 fprintf(stderr, "\n");
101 }
102
103 stage_state->push_const_size = ALIGN(prog_data->nr_params, 8) / 8;
104 /* We can only push 32 registers of constants at a time. */
105
106 /* From the SNB PRM (vol2, part 1, section 3.2.1.4: 3DSTATE_CONSTANT_VS:
107 *
108 * "The sum of all four read length fields (each incremented to
109 * represent the actual read length) must be less than or equal to
110 * 32"
111 *
112 * From the IVB PRM (vol2, part 1, section 3.2.1.3: 3DSTATE_CONSTANT_VS:
113 *
114 * "The sum of all four read length fields must be less than or
115 * equal to the size of 64"
116 *
117 * The other shader stages all match the VS's limits.
118 */
119 assert(stage_state->push_const_size <= 32);
120 }
121 }