i965: Use a union to bitcast a float
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_constant_state.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "brw_program.h"
28 #include "intel_batchbuffer.h"
29 #include "intel_buffer_objects.h"
30 #include "program/prog_parameter.h"
31
32 static uint32_t
33 f_as_u32(float f)
34 {
35 union fi fi = { .f = f };
36 return fi.ui;
37 }
38
39 static uint32_t
40 brw_param_value(struct brw_context *brw,
41 const struct gl_program *prog,
42 const struct brw_stage_state *stage_state,
43 uint32_t param)
44 {
45 struct gl_context *ctx = &brw->ctx;
46
47 switch (BRW_PARAM_DOMAIN(param)) {
48 case BRW_PARAM_DOMAIN_BUILTIN:
49 if (param == BRW_PARAM_BUILTIN_ZERO) {
50 return 0;
51 } else if (BRW_PARAM_BUILTIN_IS_CLIP_PLANE(param)) {
52 gl_clip_plane *clip_planes = brw_select_clip_planes(ctx);
53 unsigned idx = BRW_PARAM_BUILTIN_CLIP_PLANE_IDX(param);
54 unsigned comp = BRW_PARAM_BUILTIN_CLIP_PLANE_COMP(param);
55 return ((uint32_t *)clip_planes[idx])[comp];
56 } else if (param >= BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X &&
57 param <= BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_W) {
58 unsigned i = param - BRW_PARAM_BUILTIN_TESS_LEVEL_OUTER_X;
59 return f_as_u32(ctx->TessCtrlProgram.patch_default_outer_level[i]);
60 } else if (param == BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_X) {
61 return f_as_u32(ctx->TessCtrlProgram.patch_default_inner_level[0]);
62 } else if (param == BRW_PARAM_BUILTIN_TESS_LEVEL_INNER_Y) {
63 return f_as_u32(ctx->TessCtrlProgram.patch_default_inner_level[1]);
64 } else {
65 unreachable("Invalid param builtin");
66 }
67
68 case BRW_PARAM_DOMAIN_PARAMETER: {
69 unsigned idx = BRW_PARAM_PARAMETER_IDX(param);
70 unsigned comp = BRW_PARAM_PARAMETER_COMP(param);
71 assert(idx < prog->Parameters->NumParameters);
72 return prog->Parameters->ParameterValues[idx][comp].u;
73 }
74
75 case BRW_PARAM_DOMAIN_UNIFORM: {
76 unsigned idx = BRW_PARAM_UNIFORM_IDX(param);
77 assert(idx < prog->sh.data->NumUniformDataSlots);
78 return prog->sh.data->UniformDataSlots[idx].u;
79 }
80
81 case BRW_PARAM_DOMAIN_IMAGE: {
82 unsigned idx = BRW_PARAM_IMAGE_IDX(param);
83 unsigned offset = BRW_PARAM_IMAGE_OFFSET(param);
84 assert(offset < ARRAY_SIZE(stage_state->image_param));
85 return ((uint32_t *)&stage_state->image_param[idx])[offset];
86 }
87
88 default:
89 unreachable("Invalid param domain");
90 }
91 }
92
93
94 void
95 brw_populate_constant_data(struct brw_context *brw,
96 const struct gl_program *prog,
97 const struct brw_stage_state *stage_state,
98 void *void_dst,
99 const uint32_t *param,
100 unsigned nr_params)
101 {
102 uint32_t *dst = void_dst;
103 for (unsigned i = 0; i < nr_params; i++)
104 dst[i] = brw_param_value(brw, prog, stage_state, param[i]);
105 }
106
107
108 /**
109 * Creates a streamed BO containing the push constants for the VS or GS on
110 * gen6+.
111 *
112 * Push constants are constant values (such as GLSL uniforms) that are
113 * pre-loaded into a shader stage's register space at thread spawn time.
114 *
115 * Not all GLSL uniforms will be uploaded as push constants: The hardware has
116 * a limitation of 32 or 64 EU registers (256 or 512 floats) per stage to be
117 * uploaded as push constants, while GL 4.4 requires at least 1024 components
118 * to be usable for the VS. Plus, currently we always use pull constants
119 * instead of push constants when doing variable-index array access.
120 *
121 * See brw_curbe.c for the equivalent gen4/5 code.
122 */
123 void
124 gen6_upload_push_constants(struct brw_context *brw,
125 const struct gl_program *prog,
126 const struct brw_stage_prog_data *prog_data,
127 struct brw_stage_state *stage_state)
128 {
129 const struct gen_device_info *devinfo = &brw->screen->devinfo;
130 struct gl_context *ctx = &brw->ctx;
131
132 if (prog_data->nr_params == 0) {
133 stage_state->push_const_size = 0;
134 } else {
135 /* Updates the ParamaterValues[i] pointers for all parameters of the
136 * basic type of PROGRAM_STATE_VAR.
137 */
138 /* XXX: Should this happen somewhere before to get our state flag set? */
139 if (prog)
140 _mesa_load_state_parameters(ctx, prog->Parameters);
141
142 int i;
143 const int size = prog_data->nr_params * sizeof(gl_constant_value);
144 gl_constant_value *param;
145 if (devinfo->gen >= 8 || devinfo->is_haswell) {
146 param = intel_upload_space(brw, size, 32,
147 &stage_state->push_const_bo,
148 &stage_state->push_const_offset);
149 } else {
150 param = brw_state_batch(brw, size, 32,
151 &stage_state->push_const_offset);
152 }
153
154 STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
155
156 /* _NEW_PROGRAM_CONSTANTS
157 *
158 * Also _NEW_TRANSFORM -- we may reference clip planes other than as a
159 * side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS
160 * wouldn't be set for them.
161 */
162 brw_populate_constant_data(brw, prog, stage_state, param,
163 prog_data->param,
164 prog_data->nr_params);
165
166 if (0) {
167 fprintf(stderr, "%s constants:\n",
168 _mesa_shader_stage_to_string(stage_state->stage));
169 for (i = 0; i < prog_data->nr_params; i++) {
170 if ((i & 7) == 0)
171 fprintf(stderr, "g%d: ",
172 prog_data->dispatch_grf_start_reg + i / 8);
173 fprintf(stderr, "%8f ", param[i].f);
174 if ((i & 7) == 7)
175 fprintf(stderr, "\n");
176 }
177 if ((i & 7) != 0)
178 fprintf(stderr, "\n");
179 fprintf(stderr, "\n");
180 }
181
182 stage_state->push_const_size = ALIGN(prog_data->nr_params, 8) / 8;
183 /* We can only push 32 registers of constants at a time. */
184
185 /* From the SNB PRM (vol2, part 1, section 3.2.1.4: 3DSTATE_CONSTANT_VS:
186 *
187 * "The sum of all four read length fields (each incremented to
188 * represent the actual read length) must be less than or equal to
189 * 32"
190 *
191 * From the IVB PRM (vol2, part 1, section 3.2.1.3: 3DSTATE_CONSTANT_VS:
192 *
193 * "The sum of all four read length fields must be less than or
194 * equal to the size of 64"
195 *
196 * The other shader stages all match the VS's limits.
197 */
198 assert(stage_state->push_const_size <= 32);
199 }
200
201 stage_state->push_constants_dirty = true;
202 }
203
204
205 /**
206 * Creates a temporary BO containing the pull constant data for the shader
207 * stage, and the SURFACE_STATE struct that points at it.
208 *
209 * Pull constants are GLSL uniforms (and other constant data) beyond what we
210 * could fit as push constants, or that have variable-index array access
211 * (which is easiest to support using pull constants, and avoids filling
212 * register space with mostly-unused data).
213 *
214 * Compare this path to brw_curbe.c for gen4/5 push constants, and
215 * gen6_vs_state.c for gen6+ push constants.
216 */
217 void
218 brw_upload_pull_constants(struct brw_context *brw,
219 GLbitfield64 brw_new_constbuf,
220 const struct gl_program *prog,
221 struct brw_stage_state *stage_state,
222 const struct brw_stage_prog_data *prog_data)
223 {
224 unsigned i;
225 uint32_t surf_index = prog_data->binding_table.pull_constants_start;
226
227 if (!prog_data->nr_pull_params) {
228 if (stage_state->surf_offset[surf_index]) {
229 stage_state->surf_offset[surf_index] = 0;
230 brw->ctx.NewDriverState |= brw_new_constbuf;
231 }
232 return;
233 }
234
235 /* Updates the ParamaterValues[i] pointers for all parameters of the
236 * basic type of PROGRAM_STATE_VAR.
237 */
238 _mesa_load_state_parameters(&brw->ctx, prog->Parameters);
239
240 /* BRW_NEW_*_PROG_DATA | _NEW_PROGRAM_CONSTANTS */
241 uint32_t size = prog_data->nr_pull_params * 4;
242 struct brw_bo *const_bo = NULL;
243 uint32_t const_offset;
244 gl_constant_value *constants = intel_upload_space(brw, size, 64,
245 &const_bo, &const_offset);
246
247 STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
248
249 brw_populate_constant_data(brw, prog, stage_state, constants,
250 prog_data->pull_param,
251 prog_data->nr_pull_params);
252
253 if (0) {
254 for (i = 0; i < ALIGN(prog_data->nr_pull_params, 4) / 4; i++) {
255 const gl_constant_value *row = &constants[i * 4];
256 fprintf(stderr, "const surface %3d: %4.3f %4.3f %4.3f %4.3f\n",
257 i, row[0].f, row[1].f, row[2].f, row[3].f);
258 }
259 }
260
261 brw_create_constant_surface(brw, const_bo, const_offset, size,
262 &stage_state->surf_offset[surf_index]);
263 brw_bo_unreference(const_bo);
264
265 brw->ctx.NewDriverState |= brw_new_constbuf;
266 }
267
268 /**
269 * Creates a region containing the push constants for the CS on gen7+.
270 *
271 * Push constants are constant values (such as GLSL uniforms) that are
272 * pre-loaded into a shader stage's register space at thread spawn time.
273 *
274 * For other stages, see brw_curbe.c:brw_upload_constant_buffer for the
275 * equivalent gen4/5 code and gen6_vs_state.c:gen6_upload_push_constants for
276 * gen6+.
277 */
278 void
279 brw_upload_cs_push_constants(struct brw_context *brw,
280 const struct gl_program *prog,
281 const struct brw_cs_prog_data *cs_prog_data,
282 struct brw_stage_state *stage_state)
283 {
284 struct gl_context *ctx = &brw->ctx;
285 const struct brw_stage_prog_data *prog_data =
286 (struct brw_stage_prog_data*) cs_prog_data;
287
288 /* Updates the ParamaterValues[i] pointers for all parameters of the
289 * basic type of PROGRAM_STATE_VAR.
290 */
291 /* XXX: Should this happen somewhere before to get our state flag set? */
292 _mesa_load_state_parameters(ctx, prog->Parameters);
293
294 if (cs_prog_data->push.total.size == 0) {
295 stage_state->push_const_size = 0;
296 return;
297 }
298
299
300 uint32_t *param =
301 brw_state_batch(brw, ALIGN(cs_prog_data->push.total.size, 64),
302 64, &stage_state->push_const_offset);
303 assert(param);
304
305 STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
306
307 if (cs_prog_data->push.cross_thread.size > 0) {
308 uint32_t *param_copy = param;
309 for (unsigned i = 0;
310 i < cs_prog_data->push.cross_thread.dwords;
311 i++) {
312 assert(prog_data->param[i] != BRW_PARAM_BUILTIN_THREAD_LOCAL_ID);
313 param_copy[i] = brw_param_value(brw, prog, stage_state,
314 prog_data->param[i]);
315 }
316 }
317
318 if (cs_prog_data->push.per_thread.size > 0) {
319 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
320 unsigned dst =
321 8 * (cs_prog_data->push.per_thread.regs * t +
322 cs_prog_data->push.cross_thread.regs);
323 unsigned src = cs_prog_data->push.cross_thread.dwords;
324 for ( ; src < prog_data->nr_params; src++, dst++) {
325 if (prog_data->param[src] == BRW_PARAM_BUILTIN_THREAD_LOCAL_ID) {
326 param[dst] = t * cs_prog_data->simd_size;
327 } else {
328 param[dst] = brw_param_value(brw, prog, stage_state,
329 prog_data->param[src]);
330 }
331 }
332 }
333 }
334
335 stage_state->push_const_size =
336 cs_prog_data->push.cross_thread.regs +
337 cs_prog_data->push.per_thread.regs;
338 }