6127b9197a1b880acaaecc6d83ed4e509b849e51
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_gs_state.c
1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
31 #include "intel_batchbuffer.h"
32
33 static void
34 upload_gs_state(struct brw_context *brw)
35 {
36 struct intel_context *intel = &brw->intel;
37
38 /* Disable all the constant buffers. */
39 BEGIN_BATCH(5);
40 OUT_BATCH(CMD_3D_CONSTANT_GS_STATE << 16 | (5 - 2));
41 OUT_BATCH(0);
42 OUT_BATCH(0);
43 OUT_BATCH(0);
44 OUT_BATCH(0);
45 ADVANCE_BATCH();
46
47 if (brw->gs.prog_bo) {
48 BEGIN_BATCH(7);
49 OUT_BATCH(CMD_3D_GS_STATE << 16 | (7 - 2));
50 OUT_RELOC(brw->gs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
51 OUT_BATCH(GEN6_GS_SPF_MODE |
52 (0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
53 (0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
54 OUT_BATCH(0); /* scratch space base offset */
55 OUT_BATCH((1 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |
56 (brw->gs.prog_data->urb_read_length << GEN6_GS_URB_READ_LENGTH_SHIFT) |
57 (0 << GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT));
58 OUT_BATCH((0 << GEN6_GS_MAX_THREADS_SHIFT) |
59 GEN6_GS_STATISTICS_ENABLE |
60 GEN6_GS_RENDERING_ENABLE);
61 OUT_BATCH(GEN6_GS_ENABLE);
62 ADVANCE_BATCH();
63 } else {
64 BEGIN_BATCH(7);
65 OUT_BATCH(CMD_3D_GS_STATE << 16 | (7 - 2));
66 OUT_BATCH(0); /* prog_bo */
67 OUT_BATCH((0 << GEN6_GS_SAMPLER_COUNT_SHIFT) |
68 (0 << GEN6_GS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
69 OUT_BATCH(0); /* scratch space base offset */
70 OUT_BATCH((1 << GEN6_GS_DISPATCH_START_GRF_SHIFT) |
71 (0 << GEN6_GS_URB_READ_LENGTH_SHIFT) |
72 (0 << GEN6_GS_URB_ENTRY_READ_OFFSET_SHIFT));
73 OUT_BATCH((0 << GEN6_GS_MAX_THREADS_SHIFT) |
74 GEN6_GS_STATISTICS_ENABLE |
75 GEN6_GS_RENDERING_ENABLE);
76 OUT_BATCH(0);
77 ADVANCE_BATCH();
78 }
79 }
80
81 const struct brw_tracked_state gen6_gs_state = {
82 .dirty = {
83 .mesa = _NEW_TRANSFORM,
84 .brw = (BRW_NEW_CURBE_OFFSETS |
85 BRW_NEW_URB_FENCE |
86 BRW_NEW_CONTEXT),
87 .cache = CACHE_NEW_GS_PROG
88 },
89 .emit = upload_gs_state,
90 };