src/mesa/drivers/dri/i965/gen6_multisample_state.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "intel_batchbuffer.h"
  25
  26 #include "brw_context.h"
  27 #include "brw_defines.h"
  28 #include "brw_multisample_state.h"
  29
  30 void
  31 gen6_get_sample_position(struct gl_context *ctx,
  32                          struct gl_framebuffer *fb,
  33                          GLuint index, GLfloat *result)
  34 {
  35    uint8_t bits;
  36
  37    switch (fb->Visual.samples) {
  38    case 1:
  39       result[0] = result[1] = 0.5f;
  40       return;
  41    case 2:
  42       bits = brw_multisample_positions_1x_2x >> (8 * index);
  43       break;
  44    case 4:
  45       bits = brw_multisample_positions_4x >> (8 * index);
  46       break;
  47    case 8:
  48       bits = brw_multisample_positions_8x[index >> 2] >> (8 * (index & 3));
  49       break;
  50    default:
  51       unreachable("Not implemented");
  52    }
  53
  54    /* Convert from U0.4 back to a floating point coordinate. */
  55    result[0] = ((bits >> 4) & 0xf) / 16.0f;
  56    result[1] = (bits & 0xf) / 16.0f;
  57 }
  58
  59 /**
  60  * 3DSTATE_MULTISAMPLE
  61  */
  62 void
  63 gen6_emit_3dstate_multisample(struct brw_context *brw,
  64                               unsigned num_samples)
  65 {
  66    uint32_t number_of_multisamples = 0;
  67    uint32_t sample_positions_3210 = 0;
  68    uint32_t sample_positions_7654 = 0;
  69
  70    assert(brw->gen < 8);
  71
  72    switch (num_samples) {
  73    case 0:
  74    case 1:
  75       number_of_multisamples = MS_NUMSAMPLES_1;
  76       break;
  77    case 4:
  78       number_of_multisamples = MS_NUMSAMPLES_4;
  79       sample_positions_3210 = brw_multisample_positions_4x;
  80       break;
  81    case 8:
  82       number_of_multisamples = MS_NUMSAMPLES_8;
  83       sample_positions_3210 = brw_multisample_positions_8x[0];
  84       sample_positions_7654 = brw_multisample_positions_8x[1];
  85       break;
  86    default:
  87       unreachable("Unrecognized num_samples in gen6_emit_3dstate_multisample");
  88    }
  89
  90    /* 3DSTATE_MULTISAMPLE is nonpipelined. */
  91    intel_emit_post_sync_nonzero_flush(brw);
  92
  93    int len = brw->gen >= 7 ? 4 : 3;
  94    BEGIN_BATCH(len);
  95    OUT_BATCH(_3DSTATE_MULTISAMPLE << 16 | (len - 2));
  96    OUT_BATCH(MS_PIXEL_LOCATION_CENTER | number_of_multisamples);
  97    OUT_BATCH(sample_positions_3210);
  98    if (brw->gen >= 7)
  99       OUT_BATCH(sample_positions_7654);
 100    ADVANCE_BATCH();
 101 }
 102
 103
 104 unsigned
 105 gen6_determine_sample_mask(struct brw_context *brw)
 106 {
 107    struct gl_context *ctx = &brw->ctx;
 108    float coverage = 1.0;
 109    float coverage_invert = false;
 110    unsigned sample_mask = ~0u;
 111
 112    /* BRW_NEW_NUM_SAMPLES */
 113    unsigned num_samples = brw->num_samples;
 114
 115    if (ctx->Multisample._Enabled) {
 116       if (ctx->Multisample.SampleCoverage) {
 117          coverage = ctx->Multisample.SampleCoverageValue;
 118          coverage_invert = ctx->Multisample.SampleCoverageInvert;
 119       }
 120       if (ctx->Multisample.SampleMask) {
 121          sample_mask = ctx->Multisample.SampleMaskValue;
 122       }
 123    }
 124
 125    if (num_samples > 1) {
 126       int coverage_int = (int) (num_samples * coverage + 0.5);
 127       uint32_t coverage_bits = (1 << coverage_int) - 1;
 128       if (coverage_invert)
 129          coverage_bits ^= (1 << num_samples) - 1;
 130       return coverage_bits & sample_mask;
 131    } else {
 132       return 1;
 133    }
 134 }
 135
 136
 137 /**
 138  * 3DSTATE_SAMPLE_MASK
 139  */
 140 void
 141 gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned mask)
 142 {
 143    BEGIN_BATCH(2);
 144    OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2));
 145    OUT_BATCH(mask);
 146    ADVANCE_BATCH();
 147 }
 148
 149
 150 static void upload_multisample_state(struct brw_context *brw)
 151 {
 152    /* BRW_NEW_NUM_SAMPLES */
 153    gen6_emit_3dstate_multisample(brw, brw->num_samples);
 154    gen6_emit_3dstate_sample_mask(brw, gen6_determine_sample_mask(brw));
 155 }
 156
 157
 158 const struct brw_tracked_state gen6_multisample_state = {
 159    .dirty = {
 160       .mesa = _NEW_MULTISAMPLE,
 161       .brw = (BRW_NEW_CONTEXT |
 162               BRW_NEW_NUM_SAMPLES),
 163       .cache = 0
 164    },
 165    .emit = upload_multisample_state
 166 };