src/mesa/drivers/dri/i965/gen6_multisample_state.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "intel_batchbuffer.h"
  25
  26 #include "brw_context.h"
  27 #include "brw_defines.h"
  28 #include "brw_multisample_state.h"
  29
  30 void
  31 gen6_get_sample_position(struct gl_context *ctx,
  32                          struct gl_framebuffer *fb,
  33                          GLuint index, GLfloat *result)
  34 {
  35    uint8_t bits;
  36
  37    switch (fb->Visual.samples) {
  38    case 1:
  39       result[0] = result[1] = 0.5f;
  40       return;
  41    case 2:
  42       bits = brw_multisample_positions_1x_2x >> (8 * index);
  43       break;
  44    case 4:
  45       bits = brw_multisample_positions_4x >> (8 * index);
  46       break;
  47    case 8:
  48       bits = brw_multisample_positions_8x[index >> 2] >> (8 * (index & 3));
  49       break;
  50    default:
  51       assert(!"Not implemented");
  52       return;
  53    }
  54
  55    /* Convert from U0.4 back to a floating point coordinate. */
  56    result[0] = ((bits >> 4) & 0xf) / 16.0f;
  57    result[1] = (bits & 0xf) / 16.0f;
  58 }
  59
  60 /**
  61  * 3DSTATE_MULTISAMPLE
  62  */
  63 void
  64 gen6_emit_3dstate_multisample(struct brw_context *brw,
  65                               unsigned num_samples)
  66 {
  67    uint32_t number_of_multisamples = 0;
  68    uint32_t sample_positions_3210 = 0;
  69    uint32_t sample_positions_7654 = 0;
  70
  71    assert(brw->gen < 8);
  72
  73    switch (num_samples) {
  74    case 0:
  75    case 1:
  76       number_of_multisamples = MS_NUMSAMPLES_1;
  77       break;
  78    case 4:
  79       number_of_multisamples = MS_NUMSAMPLES_4;
  80       sample_positions_3210 = brw_multisample_positions_4x;
  81       break;
  82    case 8:
  83       number_of_multisamples = MS_NUMSAMPLES_8;
  84       sample_positions_3210 = brw_multisample_positions_8x[0];
  85       sample_positions_7654 = brw_multisample_positions_8x[1];
  86       break;
  87    default:
  88       assert(!"Unrecognized num_samples in gen6_emit_3dstate_multisample");
  89       break;
  90    }
  91
  92    /* 3DSTATE_MULTISAMPLE is nonpipelined. */
  93    intel_emit_post_sync_nonzero_flush(brw);
  94
  95    int len = brw->gen >= 7 ? 4 : 3;
  96    BEGIN_BATCH(len);
  97    OUT_BATCH(_3DSTATE_MULTISAMPLE << 16 | (len - 2));
  98    OUT_BATCH(MS_PIXEL_LOCATION_CENTER | number_of_multisamples);
  99    OUT_BATCH(sample_positions_3210);
 100    if (brw->gen >= 7)
 101       OUT_BATCH(sample_positions_7654);
 102    ADVANCE_BATCH();
 103 }
 104
 105
 106 unsigned
 107 gen6_determine_sample_mask(struct brw_context *brw)
 108 {
 109    struct gl_context *ctx = &brw->ctx;
 110    float coverage = 1.0;
 111    float coverage_invert = false;
 112    unsigned sample_mask = ~0u;
 113
 114    /* BRW_NEW_NUM_SAMPLES */
 115    unsigned num_samples = brw->num_samples;
 116
 117    if (ctx->Multisample._Enabled) {
 118       if (ctx->Multisample.SampleCoverage) {
 119          coverage = ctx->Multisample.SampleCoverageValue;
 120          coverage_invert = ctx->Multisample.SampleCoverageInvert;
 121       }
 122       if (ctx->Multisample.SampleMask) {
 123          sample_mask = ctx->Multisample.SampleMaskValue;
 124       }
 125    }
 126
 127    if (num_samples > 1) {
 128       int coverage_int = (int) (num_samples * coverage + 0.5);
 129       uint32_t coverage_bits = (1 << coverage_int) - 1;
 130       if (coverage_invert)
 131          coverage_bits ^= (1 << num_samples) - 1;
 132       return coverage_bits & sample_mask;
 133    } else {
 134       return 1;
 135    }
 136 }
 137
 138
 139 /**
 140  * 3DSTATE_SAMPLE_MASK
 141  */
 142 void
 143 gen6_emit_3dstate_sample_mask(struct brw_context *brw, unsigned mask)
 144 {
 145    BEGIN_BATCH(2);
 146    OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2));
 147    OUT_BATCH(mask);
 148    ADVANCE_BATCH();
 149 }
 150
 151
 152 static void upload_multisample_state(struct brw_context *brw)
 153 {
 154    /* BRW_NEW_NUM_SAMPLES */
 155    gen6_emit_3dstate_multisample(brw, brw->num_samples);
 156    gen6_emit_3dstate_sample_mask(brw, gen6_determine_sample_mask(brw));
 157 }
 158
 159
 160 const struct brw_tracked_state gen6_multisample_state = {
 161    .dirty = {
 162       .mesa = _NEW_MULTISAMPLE,
 163       .brw = (BRW_NEW_CONTEXT |
 164               BRW_NEW_NUM_SAMPLES),
 165       .cache = 0
 166    },
 167    .emit = upload_multisample_state
 168 };