i965: Move arrays brw_multisample_positions* to new header
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_multisample_state.c
1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "intel_batchbuffer.h"
25
26 #include "brw_context.h"
27 #include "brw_defines.h"
28 #include "brw_multisample_state.h"
29
30 void
31 gen6_get_sample_position(struct gl_context *ctx,
32 struct gl_framebuffer *fb,
33 GLuint index, GLfloat *result)
34 {
35 switch (fb->Visual.samples) {
36 case 1:
37 result[0] = result[1] = 0.5f;
38 break;
39 case 4: {
40 uint8_t val = (uint8_t)(brw_multisample_positions_4x[0] >> (8*index));
41 result[0] = ((val >> 4) & 0xf) / 16.0f;
42 result[1] = (val & 0xf) / 16.0f;
43 break;
44 }
45 case 8: {
46 uint8_t val = (uint8_t)(brw_multisample_positions_8x[index>>2] >> (8*(index & 3)));
47 result[0] = ((val >> 4) & 0xf) / 16.0f;
48 result[1] = (val & 0xf) / 16.0f;
49 break;
50 }
51 default:
52 assert(!"Not implemented");
53 }
54 }
55
56 /**
57 * 3DSTATE_MULTISAMPLE
58 */
59 void
60 gen6_emit_3dstate_multisample(struct brw_context *brw,
61 unsigned num_samples)
62 {
63 uint32_t number_of_multisamples = 0;
64 uint32_t sample_positions_3210 = 0;
65 uint32_t sample_positions_7654 = 0;
66
67 switch (num_samples) {
68 case 0:
69 case 1:
70 number_of_multisamples = MS_NUMSAMPLES_1;
71 break;
72 case 4:
73 number_of_multisamples = MS_NUMSAMPLES_4;
74 sample_positions_3210 = brw_multisample_positions_4x[0];
75 break;
76 case 8:
77 number_of_multisamples = MS_NUMSAMPLES_8;
78 sample_positions_3210 = brw_multisample_positions_8x[0];
79 sample_positions_7654 = brw_multisample_positions_8x[1];
80 break;
81 default:
82 assert(!"Unrecognized num_samples in gen6_emit_3dstate_multisample");
83 break;
84 }
85
86 int len = brw->gen >= 7 ? 4 : 3;
87 BEGIN_BATCH(len);
88 OUT_BATCH(_3DSTATE_MULTISAMPLE << 16 | (len - 2));
89 OUT_BATCH(MS_PIXEL_LOCATION_CENTER | number_of_multisamples);
90 OUT_BATCH(sample_positions_3210);
91 if (brw->gen >= 7)
92 OUT_BATCH(sample_positions_7654);
93 ADVANCE_BATCH();
94 }
95
96
97 /**
98 * 3DSTATE_SAMPLE_MASK
99 */
100 void
101 gen6_emit_3dstate_sample_mask(struct brw_context *brw,
102 unsigned num_samples, float coverage,
103 bool coverage_invert, unsigned sample_mask)
104 {
105 BEGIN_BATCH(2);
106 OUT_BATCH(_3DSTATE_SAMPLE_MASK << 16 | (2 - 2));
107 if (num_samples > 1) {
108 int coverage_int = (int) (num_samples * coverage + 0.5);
109 uint32_t coverage_bits = (1 << coverage_int) - 1;
110 if (coverage_invert)
111 coverage_bits ^= (1 << num_samples) - 1;
112 OUT_BATCH(coverage_bits & sample_mask);
113 } else {
114 OUT_BATCH(1);
115 }
116 ADVANCE_BATCH();
117 }
118
119
120 static void upload_multisample_state(struct brw_context *brw)
121 {
122 struct gl_context *ctx = &brw->ctx;
123 float coverage = 1.0;
124 float coverage_invert = false;
125 unsigned sample_mask = ~0u;
126
127 /* _NEW_BUFFERS */
128 unsigned num_samples = ctx->DrawBuffer->Visual.samples;
129
130 /* _NEW_MULTISAMPLE */
131 if (ctx->Multisample._Enabled) {
132 if (ctx->Multisample.SampleCoverage) {
133 coverage = ctx->Multisample.SampleCoverageValue;
134 coverage_invert = ctx->Multisample.SampleCoverageInvert;
135 }
136 if (ctx->Multisample.SampleMask) {
137 sample_mask = ctx->Multisample.SampleMaskValue;
138 }
139 }
140
141 /* 3DSTATE_MULTISAMPLE is nonpipelined. */
142 intel_emit_post_sync_nonzero_flush(brw);
143
144 gen6_emit_3dstate_multisample(brw, num_samples);
145 gen6_emit_3dstate_sample_mask(brw, num_samples, coverage,
146 coverage_invert, sample_mask);
147 }
148
149
150 const struct brw_tracked_state gen6_multisample_state = {
151 .dirty = {
152 .mesa = _NEW_BUFFERS |
153 _NEW_MULTISAMPLE,
154 .brw = BRW_NEW_CONTEXT,
155 .cache = 0
156 },
157 .emit = upload_multisample_state
158 };