src/mesa/drivers/dri/i965/gen6_scissor_state.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "brw_context.h"
  29 #include "brw_state.h"
  30 #include "brw_defines.h"
  31 #include "intel_batchbuffer.h"
  32
  33 static void
  34 prepare_scissor_state(struct brw_context *brw)
  35 {
  36    GLcontext *ctx = &brw->intel.ctx;
  37    const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
  38    struct gen6_scissor_state scissor;
  39
  40    /* _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT */
  41
  42    /* The scissor only needs to handle the intersection of drawable and
  43     * scissor rect.  Clipping to the boundaries of static shared buffers
  44     * for front/back/depth is covered by looping over cliprects in brw_draw.c.
  45     *
  46     * Note that the hardware's coordinates are inclusive, while Mesa's min is
  47     * inclusive but max is exclusive.
  48     */
  49    if (render_to_fbo) {
  50       /* texmemory: Y=0=bottom */
  51       scissor.xmin = ctx->DrawBuffer->_Xmin;
  52       scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
  53       scissor.ymin = ctx->DrawBuffer->_Ymin;
  54       scissor.ymax = ctx->DrawBuffer->_Ymax - 1;
  55    }
  56    else {
  57       /* memory: Y=0=top */
  58       scissor.xmin = ctx->DrawBuffer->_Xmin;
  59       scissor.xmax = ctx->DrawBuffer->_Xmax - 1;
  60       scissor.ymin = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymax;
  61       scissor.ymax = ctx->DrawBuffer->Height - ctx->DrawBuffer->_Ymin - 1;
  62    }
  63
  64    drm_intel_bo_unreference(brw->sf.state_bo);
  65    brw->sf.state_bo = brw_cache_data(&brw->cache, BRW_SF_UNIT,
  66                                      &scissor, sizeof(scissor),
  67                                      NULL, 0);
  68 }
  69
  70 const struct brw_tracked_state gen6_scissor_state = {
  71    .dirty = {
  72       .mesa = _NEW_SCISSOR | _NEW_BUFFERS | _NEW_VIEWPORT,
  73       .brw = 0,
  74       .cache = 0,
  75    },
  76    .prepare = prepare_scissor_state,
  77 };
  78
  79 static void upload_scissor_state_pointers(struct brw_context *brw)
  80 {
  81    struct intel_context *intel = &brw->intel;
  82
  83    BEGIN_BATCH(2);
  84    OUT_BATCH(CMD_3D_SCISSOR_STATE_POINTERS << 16 | (2 - 2));
  85    OUT_RELOC(brw->sf.state_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
  86    ADVANCE_BATCH();
  87
  88    intel_batchbuffer_emit_mi_flush(intel->batch);
  89 }
  90
  91
  92 static void prepare_scissor_state_pointers(struct brw_context *brw)
  93 {
  94    brw_add_validated_bo(brw, brw->sf.state_bo);
  95 }
  96
  97 const struct brw_tracked_state gen6_scissor_state_pointers = {
  98    .dirty = {
  99       .mesa = 0,
 100       .brw = BRW_NEW_BATCH,
 101       .cache = CACHE_NEW_SF_UNIT
 102    },
 103    .prepare = prepare_scissor_state_pointers,
 104    .emit = upload_scissor_state_pointers,
 105 };