a0322784685820614e72d1146743e542877dc9e8
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_sf_state.c
1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
31 #include "brw_util.h"
32 #include "main/macros.h"
33 #include "intel_batchbuffer.h"
34
35 static uint32_t
36 get_attr_override(struct brw_context *brw, int fs_attr)
37 {
38 int attr_index = 0, i, vs_attr;
39
40 if (fs_attr <= FRAG_ATTRIB_TEX7)
41 vs_attr = fs_attr;
42 else if (fs_attr == FRAG_ATTRIB_FACE)
43 vs_attr = 0; /* XXX */
44 else if (fs_attr == FRAG_ATTRIB_PNTC)
45 vs_attr = 0; /* XXX */
46 else {
47 assert(fs_attr >= FRAG_ATTRIB_VAR0);
48 vs_attr = fs_attr - FRAG_ATTRIB_VAR0 + VERT_RESULT_VAR0;
49 }
50
51 /* Find the source index (0 = first attribute after the 4D position)
52 * for this output attribute. attr is currently a VERT_RESULT_* but should
53 * be FRAG_ATTRIB_*.
54 */
55 for (i = 0; i < vs_attr; i++) {
56 if (brw->vs.prog_data->outputs_written & BITFIELD64_BIT(i))
57 attr_index++;
58 }
59
60 return attr_index;
61 }
62
63 static void
64 upload_sf_state(struct brw_context *brw)
65 {
66 struct intel_context *intel = &brw->intel;
67 GLcontext *ctx = &intel->ctx;
68 /* CACHE_NEW_VS_PROG */
69 uint32_t num_inputs = brw_count_bits(brw->vs.prog_data->outputs_written);
70 uint32_t num_outputs = brw_count_bits(brw->fragment_program->Base.InputsRead);
71 uint32_t dw1, dw2, dw3, dw4;
72 int i;
73 /* _NEW_BUFFER */
74 GLboolean render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
75 int attr = 0;
76
77 dw1 =
78 num_outputs << GEN6_SF_NUM_OUTPUTS_SHIFT |
79 (num_inputs + 1) / 2 << GEN6_SF_URB_ENTRY_READ_LENGTH_SHIFT |
80 1 << GEN6_SF_URB_ENTRY_READ_OFFSET_SHIFT;
81 dw2 = GEN6_SF_VIEWPORT_TRANSFORM_ENABLE |
82 GEN6_SF_STATISTICS_ENABLE;
83 dw3 = 0;
84 dw4 = 0;
85
86 /* _NEW_POLYGON */
87 if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
88 dw2 |= GEN6_SF_WINDING_CCW;
89
90 if (ctx->Polygon.OffsetFill)
91 dw2 |= GEN6_SF_GLOBAL_DEPTH_OFFSET_SOLID;
92
93 /* _NEW_SCISSOR */
94 if (ctx->Scissor.Enabled)
95 dw3 |= GEN6_SF_SCISSOR_ENABLE;
96
97 /* _NEW_POLYGON */
98 if (ctx->Polygon.CullFlag) {
99 switch (ctx->Polygon.CullFaceMode) {
100 case GL_FRONT:
101 dw3 |= GEN6_SF_CULL_FRONT;
102 break;
103 case GL_BACK:
104 dw3 |= GEN6_SF_CULL_BACK;
105 break;
106 case GL_FRONT_AND_BACK:
107 dw3 |= GEN6_SF_CULL_BOTH;
108 break;
109 default:
110 assert(0);
111 break;
112 }
113 } else {
114 dw3 |= GEN6_SF_CULL_NONE;
115 }
116
117 /* _NEW_LINE */
118 dw3 |= U_FIXED(CLAMP(ctx->Line.Width, 0.0, 7.99), 7) <<
119 GEN6_SF_LINE_WIDTH_SHIFT;
120 if (ctx->Line.SmoothFlag) {
121 dw3 |= GEN6_SF_LINE_AA_ENABLE;
122 dw3 |= GEN6_SF_LINE_AA_MODE_TRUE;
123 dw3 |= GEN6_SF_LINE_END_CAP_WIDTH_1_0;
124 }
125
126 /* _NEW_POINT */
127 if (ctx->Point._Attenuated)
128 dw4 |= GEN6_SF_USE_STATE_POINT_WIDTH;
129
130 dw4 |= U_FIXED(CLAMP(ctx->Point.Size, 0.125, 225.875), 3) <<
131 GEN6_SF_POINT_WIDTH_SHIFT;
132 if (render_to_fbo)
133 dw1 |= GEN6_SF_POINT_SPRITE_LOWERLEFT;
134
135 /* _NEW_LIGHT */
136 if (ctx->Light.ProvokingVertex != GL_FIRST_VERTEX_CONVENTION) {
137 dw4 |=
138 (2 << GEN6_SF_TRI_PROVOKE_SHIFT) |
139 (2 << GEN6_SF_TRIFAN_PROVOKE_SHIFT) |
140 (1 << GEN6_SF_LINE_PROVOKE_SHIFT);
141 } else {
142 dw4 |=
143 (1 << GEN6_SF_TRIFAN_PROVOKE_SHIFT);
144 }
145
146 BEGIN_BATCH(20);
147 OUT_BATCH(CMD_3D_SF_STATE << 16 | (20 - 2));
148 OUT_BATCH(dw1);
149 OUT_BATCH(dw2);
150 OUT_BATCH(dw3);
151 OUT_BATCH(dw4);
152 OUT_BATCH_F(ctx->Polygon.OffsetUnits * 2); /* constant. copied from gen4 */
153 OUT_BATCH_F(ctx->Polygon.OffsetFactor); /* scale */
154 OUT_BATCH_F(0.0); /* XXX: global depth offset clamp */
155 for (i = 0; i < 8; i++) {
156 uint32_t attr_overrides = 0;
157
158 for (; attr < 64; attr++) {
159 if (brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)) {
160 attr_overrides |= get_attr_override(brw, attr);
161 attr++;
162 break;
163 }
164 }
165
166 for (; attr < 64; attr++) {
167 if (brw->fragment_program->Base.InputsRead & BITFIELD64_BIT(attr)) {
168 attr_overrides |= get_attr_override(brw, attr) << 16;
169 attr++;
170 break;
171 }
172 }
173 OUT_BATCH(attr_overrides);
174 }
175 OUT_BATCH(0); /* point sprite texcoord bitmask */
176 OUT_BATCH(0); /* constant interp bitmask */
177 OUT_BATCH(0); /* wrapshortest enables 0-7 */
178 OUT_BATCH(0); /* wrapshortest enables 8-15 */
179 ADVANCE_BATCH();
180
181 intel_batchbuffer_emit_mi_flush(intel->batch);
182 }
183
184 const struct brw_tracked_state gen6_sf_state = {
185 .dirty = {
186 .mesa = (_NEW_LIGHT |
187 _NEW_POLYGON |
188 _NEW_LINE |
189 _NEW_SCISSOR |
190 _NEW_BUFFERS),
191 .brw = BRW_NEW_CONTEXT,
192 .cache = CACHE_NEW_VS_PROG
193 },
194 .emit = upload_sf_state,
195 };