src/mesa/drivers/dri/i965/gen6_urb.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "main/macros.h"
  29 #include "intel_batchbuffer.h"
  30 #include "brw_context.h"
  31 #include "brw_state.h"
  32 #include "brw_defines.h"
  33
  34 static void
  35 gen6_upload_urb( struct brw_context *brw )
  36 {
  37    struct intel_context *intel = &brw->intel;
  38    int nr_vs_entries;
  39
  40    /* CACHE_NEW_VS_PROG */
  41    brw->urb.vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1);
  42
  43    /* Calculate how many VS URB entries fit in the total URB size */
  44    nr_vs_entries = (brw->urb.size * 1024) / (brw->urb.vs_size * 128);
  45
  46    if (nr_vs_entries > brw->urb.max_vs_entries)
  47       nr_vs_entries = brw->urb.max_vs_entries;
  48
  49    /* According to volume 2a, nr_vs_entries must be a multiple of 4. */
  50    brw->urb.nr_vs_entries = ROUND_DOWN_TO(nr_vs_entries, 4);
  51
  52    /* Since we currently don't support Geometry Shaders, we always put the
  53     * GS unit in passthrough mode and don't allocate it any URB space.
  54     */
  55    brw->urb.nr_gs_entries = 0;
  56    brw->urb.gs_size = 1; /* Incorrect, but with 0 GS entries it doesn't matter. */
  57
  58    assert(brw->urb.nr_vs_entries >= 24);
  59    assert(brw->urb.nr_vs_entries % 4 == 0);
  60    assert(brw->urb.nr_gs_entries % 4 == 0);
  61    /* GS requirement */
  62    assert(!brw->gs.prog_active || brw->urb.vs_size < 5);
  63
  64    BEGIN_BATCH(3);
  65    OUT_BATCH(_3DSTATE_URB << 16 | (3 - 2));
  66    OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) |
  67              ((brw->urb.nr_vs_entries) << GEN6_URB_VS_ENTRIES_SHIFT));
  68    OUT_BATCH(((brw->urb.gs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) |
  69              ((brw->urb.nr_gs_entries) << GEN6_URB_GS_ENTRIES_SHIFT));
  70    ADVANCE_BATCH();
  71 }
  72
  73 const struct brw_tracked_state gen6_urb = {
  74    .dirty = {
  75       .mesa = 0,
  76       .brw = BRW_NEW_CONTEXT,
  77       .cache = (CACHE_NEW_VS_PROG | CACHE_NEW_GS_PROG),
  78    },
  79    .emit = gen6_upload_urb,
  80 };