src/mesa/drivers/dri/i965/gen6_urb.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "main/macros.h"
  29 #include "intel_batchbuffer.h"
  30 #include "brw_context.h"
  31 #include "brw_state.h"
  32 #include "brw_defines.h"
  33
  34 static void
  35 prepare_urb( struct brw_context *brw )
  36 {
  37    int urb_size, max_urb_entry;
  38    struct intel_context *intel = &brw->intel;
  39
  40    if (IS_GT1(intel->intelScreen->deviceID)) {
  41         urb_size = 32 * 1024;
  42         max_urb_entry = 128;
  43    } else {
  44         urb_size = 64 * 1024;
  45         max_urb_entry = 256;
  46    }
  47
  48    brw->urb.nr_vs_entries = max_urb_entry;
  49    brw->urb.nr_gs_entries = max_urb_entry;
  50
  51    /* CACHE_NEW_VS_PROG */
  52    brw->urb.vs_size = MAX2(brw->vs.prog_data->urb_entry_size, 1);
  53
  54    if (2 * brw->urb.vs_size > urb_size)
  55            brw->urb.nr_vs_entries = brw->urb.nr_gs_entries =
  56                 (urb_size ) / (2 * brw->urb.vs_size);
  57 }
  58
  59 static void
  60 upload_urb(struct brw_context *brw)
  61 {
  62    struct intel_context *intel = &brw->intel;
  63
  64    assert(brw->urb.nr_vs_entries % 4 == 0);
  65    assert(brw->urb.nr_gs_entries % 4 == 0);
  66    /* GS requirement */
  67    assert(!brw->gs.prog_bo || brw->urb.vs_size < 5);
  68
  69    BEGIN_BATCH(3);
  70    OUT_BATCH(_3DSTATE_URB << 16 | (3 - 2));
  71    OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_VS_SIZE_SHIFT) |
  72              ((brw->urb.nr_vs_entries) << GEN6_URB_VS_ENTRIES_SHIFT));
  73    OUT_BATCH(((brw->urb.vs_size - 1) << GEN6_URB_GS_SIZE_SHIFT) |
  74              ((brw->urb.nr_gs_entries) << GEN6_URB_GS_ENTRIES_SHIFT));
  75    ADVANCE_BATCH();
  76 }
  77
  78 const struct brw_tracked_state gen6_urb = {
  79    .dirty = {
  80       .mesa = 0,
  81       .brw = BRW_NEW_CONTEXT,
  82       .cache = (CACHE_NEW_VS_PROG | CACHE_NEW_GS_PROG),
  83    },
  84    .prepare = prepare_urb,
  85    .emit = upload_urb,
  86 };