2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
31 #include "intel_batchbuffer.h"
33 /* The clip VP defines the guardband region where expensive clipping is skipped
34 * and fragments are allowed to be generated and clipped out cheaply by the SF.
36 * By setting it to NDC bounds of [-1,1], we don't do GB clipping. It's
37 * supposed to cause seams to become visible in apps due to shared edges taking
38 * different clip/no clip paths depending on whether the rest of the prim ends
39 * up in the guardband or not.
42 prepare_clip_vp(struct brw_context
*brw
)
44 struct brw_clipper_viewport
*vp
;
46 vp
= brw_state_batch(brw
, AUB_TRACE_CLIP_VP_STATE
,
47 sizeof(*vp
), 32, &brw
->clip
.vp_offset
);
54 brw
->state
.dirty
.cache
|= CACHE_NEW_CLIP_VP
;
57 const struct brw_tracked_state gen6_clip_vp
= {
63 .prepare
= prepare_clip_vp
,
67 prepare_sf_vp(struct brw_context
*brw
)
69 struct gl_context
*ctx
= &brw
->intel
.ctx
;
70 const GLfloat depth_scale
= 1.0F
/ ctx
->DrawBuffer
->_DepthMaxF
;
71 struct brw_sf_viewport
*sfv
;
72 GLfloat y_scale
, y_bias
;
73 const GLboolean render_to_fbo
= (ctx
->DrawBuffer
->Name
!= 0);
74 const GLfloat
*v
= ctx
->Viewport
._WindowMap
.m
;
76 sfv
= brw_state_batch(brw
, AUB_TRACE_SF_VP_STATE
,
77 sizeof(*sfv
), 32, &brw
->sf
.vp_offset
);
78 memset(sfv
, 0, sizeof(*sfv
));
86 y_bias
= ctx
->DrawBuffer
->Height
;
90 sfv
->viewport
.m00
= v
[MAT_SX
];
91 sfv
->viewport
.m11
= v
[MAT_SY
] * y_scale
;
92 sfv
->viewport
.m22
= v
[MAT_SZ
] * depth_scale
;
93 sfv
->viewport
.m30
= v
[MAT_TX
];
94 sfv
->viewport
.m31
= v
[MAT_TY
] * y_scale
+ y_bias
;
95 sfv
->viewport
.m32
= v
[MAT_TZ
] * depth_scale
;
97 brw
->state
.dirty
.cache
|= CACHE_NEW_SF_VP
;
100 const struct brw_tracked_state gen6_sf_vp
= {
102 .mesa
= _NEW_VIEWPORT
| _NEW_BUFFERS
,
103 .brw
= BRW_NEW_BATCH
,
106 .prepare
= prepare_sf_vp
,
109 static void upload_viewport_state_pointers(struct brw_context
*brw
)
111 struct intel_context
*intel
= &brw
->intel
;
114 OUT_BATCH(_3DSTATE_VIEWPORT_STATE_POINTERS
<< 16 | (4 - 2) |
115 GEN6_CC_VIEWPORT_MODIFY
|
116 GEN6_SF_VIEWPORT_MODIFY
|
117 GEN6_CLIP_VIEWPORT_MODIFY
);
118 OUT_BATCH(brw
->clip
.vp_offset
);
119 OUT_BATCH(brw
->sf
.vp_offset
);
120 OUT_BATCH(brw
->cc
.vp_offset
);
124 const struct brw_tracked_state gen6_viewport_state
= {
127 .brw
= (BRW_NEW_BATCH
|
128 BRW_NEW_STATE_BASE_ADDRESS
),
129 .cache
= (CACHE_NEW_CLIP_VP
|
133 .emit
= upload_viewport_state_pointers
,