i965: Remove unused structures for command packets.
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_viewport_state.c
1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
31 #include "intel_batchbuffer.h"
32
33 /* The clip VP defines the guardband region where expensive clipping is skipped
34 * and fragments are allowed to be generated and clipped out cheaply by the SF.
35 *
36 * By setting it to NDC bounds of [-1,1], we don't do GB clipping. It's
37 * supposed to cause seams to become visible in apps due to shared edges taking
38 * different clip/no clip paths depending on whether the rest of the prim ends
39 * up in the guardband or not.
40 */
41 static void
42 prepare_clip_vp(struct brw_context *brw)
43 {
44 struct brw_clipper_viewport *vp;
45
46 vp = brw_state_batch(brw, sizeof(*vp), 32, &brw->clip.vp_offset);
47
48 vp->xmin = -1.0;
49 vp->xmax = 1.0;
50 vp->ymin = -1.0;
51 vp->ymax = 1.0;
52
53 brw->state.dirty.cache |= CACHE_NEW_CLIP_VP;
54 }
55
56 const struct brw_tracked_state gen6_clip_vp = {
57 .dirty = {
58 .mesa = 0,
59 .brw = BRW_NEW_BATCH,
60 .cache = 0,
61 },
62 .prepare = prepare_clip_vp,
63 };
64
65 static void
66 prepare_sf_vp(struct brw_context *brw)
67 {
68 struct gl_context *ctx = &brw->intel.ctx;
69 const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
70 struct brw_sf_viewport *sfv;
71 GLfloat y_scale, y_bias;
72 const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
73 const GLfloat *v = ctx->Viewport._WindowMap.m;
74
75 sfv = brw_state_batch(brw, sizeof(*sfv), 32, &brw->sf.vp_offset);
76 memset(sfv, 0, sizeof(*sfv));
77
78 /* _NEW_BUFFERS */
79 if (render_to_fbo) {
80 y_scale = 1.0;
81 y_bias = 0;
82 } else {
83 y_scale = -1.0;
84 y_bias = ctx->DrawBuffer->Height;
85 }
86
87 /* _NEW_VIEWPORT */
88 sfv->viewport.m00 = v[MAT_SX];
89 sfv->viewport.m11 = v[MAT_SY] * y_scale;
90 sfv->viewport.m22 = v[MAT_SZ] * depth_scale;
91 sfv->viewport.m30 = v[MAT_TX];
92 sfv->viewport.m31 = v[MAT_TY] * y_scale + y_bias;
93 sfv->viewport.m32 = v[MAT_TZ] * depth_scale;
94
95 brw->state.dirty.cache |= CACHE_NEW_SF_VP;
96 }
97
98 const struct brw_tracked_state gen6_sf_vp = {
99 .dirty = {
100 .mesa = _NEW_VIEWPORT | _NEW_BUFFERS,
101 .brw = BRW_NEW_BATCH,
102 .cache = 0,
103 },
104 .prepare = prepare_sf_vp,
105 };
106
107 static void upload_viewport_state_pointers(struct brw_context *brw)
108 {
109 struct intel_context *intel = &brw->intel;
110
111 BEGIN_BATCH(4);
112 OUT_BATCH(_3DSTATE_VIEWPORT_STATE_POINTERS << 16 | (4 - 2) |
113 GEN6_CC_VIEWPORT_MODIFY |
114 GEN6_SF_VIEWPORT_MODIFY |
115 GEN6_CLIP_VIEWPORT_MODIFY);
116 OUT_BATCH(brw->clip.vp_offset);
117 OUT_BATCH(brw->sf.vp_offset);
118 OUT_BATCH(brw->cc.vp_offset);
119 ADVANCE_BATCH();
120 }
121
122 const struct brw_tracked_state gen6_viewport_state = {
123 .dirty = {
124 .mesa = 0,
125 .brw = (BRW_NEW_BATCH |
126 BRW_NEW_STATE_BASE_ADDRESS),
127 .cache = (CACHE_NEW_CLIP_VP |
128 CACHE_NEW_SF_VP |
129 CACHE_NEW_CC_VP)
130 },
131 .emit = upload_viewport_state_pointers,
132 };