src/mesa/drivers/dri/i965/gen6_viewport_state.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "brw_context.h"
  29 #include "brw_state.h"
  30 #include "brw_defines.h"
  31 #include "intel_batchbuffer.h"
  32 #include "main/macros.h"
  33
  34 /* The clip VP defines the guardband region where expensive clipping is skipped
  35  * and fragments are allowed to be generated and clipped out cheaply by the SF.
  36  *
  37  * By setting it to NDC bounds of [-1,1], we don't do GB clipping.  It's
  38  * supposed to cause seams to become visible in apps due to shared edges taking
  39  * different clip/no clip paths depending on whether the rest of the prim ends
  40  * up in the guardband or not.
  41  */
  42 static void
  43 prepare_clip_vp(struct brw_context *brw)
  44 {
  45    struct brw_clipper_viewport vp;
  46
  47    vp.xmin = -1.0;
  48    vp.xmax = 1.0;
  49    vp.ymin = -1.0;
  50    vp.ymax = 1.0;
  51
  52    drm_intel_bo_unreference(brw->clip.vp_bo);
  53    brw->clip.vp_bo = brw_cache_data(&brw->cache, BRW_CLIP_VP,
  54                                     &vp, sizeof(vp));
  55 }
  56
  57 const struct brw_tracked_state gen6_clip_vp = {
  58    .dirty = {
  59       .mesa = _NEW_VIEWPORT, /* XXX: not really, but we need nonzero */
  60       .brw = 0,
  61       .cache = 0,
  62    },
  63    .prepare = prepare_clip_vp,
  64 };
  65
  66 static void
  67 prepare_sf_vp(struct brw_context *brw)
  68 {
  69    GLcontext *ctx = &brw->intel.ctx;
  70    const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF;
  71    struct brw_sf_viewport sfv;
  72    GLfloat y_scale, y_bias;
  73    const GLboolean render_to_fbo = (ctx->DrawBuffer->Name != 0);
  74    const GLfloat *v = ctx->Viewport._WindowMap.m;
  75
  76    memset(&sfv, 0, sizeof(sfv));
  77
  78    /* _NEW_BUFFERS */
  79    if (render_to_fbo) {
  80       y_scale = 1.0;
  81       y_bias = 0;
  82    } else {
  83       y_scale = -1.0;
  84       y_bias = ctx->DrawBuffer->Height;
  85    }
  86
  87    /* _NEW_VIEWPORT */
  88    sfv.viewport.m00 = v[MAT_SX];
  89    sfv.viewport.m11 = v[MAT_SY] * y_scale;
  90    sfv.viewport.m22 = v[MAT_SZ] * depth_scale;
  91    sfv.viewport.m30 = v[MAT_TX];
  92    sfv.viewport.m31 = v[MAT_TY] * y_scale + y_bias;
  93    sfv.viewport.m32 = v[MAT_TZ] * depth_scale;
  94
  95    drm_intel_bo_unreference(brw->sf.vp_bo);
  96    brw->sf.vp_bo = brw_cache_data(&brw->cache, BRW_SF_VP,
  97                                   &sfv, sizeof(sfv));
  98 }
  99
 100 const struct brw_tracked_state gen6_sf_vp = {
 101    .dirty = {
 102       .mesa = _NEW_VIEWPORT | _NEW_BUFFERS,
 103       .brw = 0,
 104       .cache = 0,
 105    },
 106    .prepare = prepare_sf_vp,
 107 };
 108
 109 static void prepare_viewport_state_pointers(struct brw_context *brw)
 110 {
 111    brw_add_validated_bo(brw, brw->sf.state_bo);
 112 }
 113
 114 static void upload_viewport_state_pointers(struct brw_context *brw)
 115 {
 116    struct intel_context *intel = &brw->intel;
 117
 118    BEGIN_BATCH(4);
 119    OUT_BATCH(CMD_VIEWPORT_STATE_POINTERS << 16 | (4 - 2) |
 120              GEN6_CC_VIEWPORT_MODIFY |
 121              GEN6_SF_VIEWPORT_MODIFY |
 122              GEN6_CLIP_VIEWPORT_MODIFY);
 123    OUT_RELOC(brw->clip.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
 124    OUT_RELOC(brw->sf.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
 125    OUT_RELOC(brw->cc.vp_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
 126    ADVANCE_BATCH();
 127
 128    intel_batchbuffer_emit_mi_flush(intel->batch);
 129 }
 130
 131 const struct brw_tracked_state gen6_viewport_state = {
 132    .dirty = {
 133       .mesa = 0,
 134       .brw = BRW_NEW_BATCH,
 135       .cache = (CACHE_NEW_CLIP_VP |
 136                 CACHE_NEW_SF_VP |
 137                 CACHE_NEW_CC_VP)
 138    },
 139    .prepare = prepare_viewport_state_pointers,
 140    .emit = upload_viewport_state_pointers,
 141 };