src/mesa/drivers/dri/i965/gen6_vs_state.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "brw_context.h"
  29 #include "brw_state.h"
  30 #include "brw_defines.h"
  31 #include "brw_util.h"
  32 #include "program/prog_parameter.h"
  33 #include "program/prog_statevars.h"
  34 #include "intel_batchbuffer.h"
  35
  36 static void
  37 gen6_prepare_vs_push_constants(struct brw_context *brw)
  38 {
  39    struct intel_context *intel = &brw->intel;
  40    struct gl_context *ctx = &intel->ctx;
  41    /* _BRW_NEW_VERTEX_PROGRAM */
  42    const struct brw_vertex_program *vp =
  43       brw_vertex_program_const(brw->vertex_program);
  44    unsigned int nr_params = brw->vs.prog_data->nr_params / 4;
  45    bool uses_clip_distance = vp->program.UsesClipDistance;
  46
  47    if (brw->vertex_program->IsNVProgram)
  48       _mesa_load_tracked_matrices(ctx);
  49
  50    /* Updates the ParamaterValues[i] pointers for all parameters of the
  51     * basic type of PROGRAM_STATE_VAR.
  52     */
  53    /* XXX: Should this happen somewhere before to get our state flag set? */
  54    _mesa_load_state_parameters(ctx, vp->program.Base.Parameters);
  55
  56    /* CACHE_NEW_VS_PROG | _NEW_TRANSFORM */
  57    if (brw->vs.prog_data->nr_params == 0 && !ctx->Transform.ClipPlanesEnabled) {
  58       brw->vs.push_const_size = 0;
  59    } else {
  60       int params_uploaded = 0;
  61       float *param;
  62       int i;
  63
  64       param = brw_state_batch(brw, AUB_TRACE_VS_CONSTANTS,
  65                               (MAX_CLIP_PLANES + nr_params) *
  66                               4 * sizeof(float),
  67                               32, &brw->vs.push_const_offset);
  68
  69       if (brw->vs.prog_data->uses_new_param_layout) {
  70          for (i = 0; i < brw->vs.prog_data->nr_params; i++) {
  71             *param = *brw->vs.prog_data->param[i];
  72             param++;
  73          }
  74          params_uploaded += brw->vs.prog_data->nr_params / 4;
  75       } else {
  76          /* This should be loaded like any other param, but it's ad-hoc
  77           * until we redo the VS backend.
  78           */
  79          if (!uses_clip_distance) {
  80             gl_clip_plane *clip_planes = brw_select_clip_planes(ctx);
  81             for (i = 0; i < MAX_CLIP_PLANES; i++) {
  82                if (ctx->Transform.ClipPlanesEnabled & (1 << i)) {
  83                   memcpy(param, clip_planes[i], 4 * sizeof(float));
  84                   param += 4;
  85                   params_uploaded++;
  86                }
  87             }
  88          }
  89
  90          /* Align to a reg for convenience for brw_vs_emit.c */
  91          if (params_uploaded & 1) {
  92             param += 4;
  93             params_uploaded++;
  94          }
  95
  96          for (i = 0; i < vp->program.Base.Parameters->NumParameters; i++) {
  97             if (brw->vs.constant_map[i] != -1) {
  98                memcpy(param + brw->vs.constant_map[i] * 4,
  99                       vp->program.Base.Parameters->ParameterValues[i],
 100                       4 * sizeof(float));
 101                params_uploaded++;
 102             }
 103          }
 104       }
 105
 106       if (0) {
 107          printf("VS constant buffer:\n");
 108          for (i = 0; i < params_uploaded; i++) {
 109             float *buf = param + i * 4;
 110             printf("%d: %f %f %f %f\n",
 111                    i, buf[0], buf[1], buf[2], buf[3]);
 112          }
 113       }
 114
 115       brw->vs.push_const_size = (params_uploaded + 1) / 2;
 116       /* We can only push 32 registers of constants at a time. */
 117       assert(brw->vs.push_const_size <= 32);
 118    }
 119 }
 120
 121 const struct brw_tracked_state gen6_vs_constants = {
 122    .dirty = {
 123       .mesa  = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
 124       .brw   = (BRW_NEW_BATCH |
 125                 BRW_NEW_VERTEX_PROGRAM),
 126       .cache = CACHE_NEW_VS_PROG,
 127    },
 128    .prepare = gen6_prepare_vs_push_constants,
 129 };
 130
 131 static void
 132 upload_vs_state(struct brw_context *brw)
 133 {
 134    struct intel_context *intel = &brw->intel;
 135
 136    if (brw->vs.push_const_size == 0) {
 137       /* Disable the push constant buffers. */
 138       BEGIN_BATCH(5);
 139       OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (5 - 2));
 140       OUT_BATCH(0);
 141       OUT_BATCH(0);
 142       OUT_BATCH(0);
 143       OUT_BATCH(0);
 144       ADVANCE_BATCH();
 145    } else {
 146       BEGIN_BATCH(5);
 147       OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 |
 148                 GEN6_CONSTANT_BUFFER_0_ENABLE |
 149                 (5 - 2));
 150       /* Pointer to the VS constant buffer.  Covered by the set of
 151        * state flags from gen6_prepare_wm_constants
 152        */
 153       OUT_BATCH(brw->vs.push_const_offset +
 154                 brw->vs.push_const_size - 1);
 155       OUT_BATCH(0);
 156       OUT_BATCH(0);
 157       OUT_BATCH(0);
 158       ADVANCE_BATCH();
 159    }
 160
 161    BEGIN_BATCH(6);
 162    OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2));
 163    OUT_BATCH(brw->vs.prog_offset);
 164    OUT_BATCH((0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
 165              GEN6_VS_FLOATING_POINT_MODE_ALT |
 166              (brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
 167
 168    if (brw->vs.prog_data->total_scratch) {
 169       OUT_RELOC(brw->vs.scratch_bo,
 170                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 171                 ffs(brw->vs.prog_data->total_scratch) - 11);
 172    } else {
 173       OUT_BATCH(0);
 174    }
 175
 176    OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) |
 177              (brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
 178              (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
 179
 180    OUT_BATCH(((brw->vs_max_threads - 1) << GEN6_VS_MAX_THREADS_SHIFT) |
 181              GEN6_VS_STATISTICS_ENABLE |
 182              GEN6_VS_ENABLE);
 183    ADVANCE_BATCH();
 184
 185    /* Based on my reading of the simulator, the VS constants don't get
 186     * pulled into the VS FF unit until an appropriate pipeline flush
 187     * happens, and instead the 3DSTATE_CONSTANT_VS packet just adds
 188     * references to them into a little FIFO.  The flushes are common,
 189     * but don't reliably happen between this and a 3DPRIMITIVE, causing
 190     * the primitive to use the wrong constants.  Then the FIFO
 191     * containing the constant setup gets added to again on the next
 192     * constants change, and eventually when a flush does happen the
 193     * unit is overwhelmed by constant changes and dies.
 194     *
 195     * To avoid this, send a PIPE_CONTROL down the line that will
 196     * update the unit immediately loading the constants.  The flush
 197     * type bits here were those set by the STATE_BASE_ADDRESS whose
 198     * move in a82a43e8d99e1715dd11c9c091b5ab734079b6a6 triggered the
 199     * bug reports that led to this workaround, and may be more than
 200     * what is strictly required to avoid the issue.
 201     */
 202    BEGIN_BATCH(4);
 203    OUT_BATCH(_3DSTATE_PIPE_CONTROL);
 204    OUT_BATCH(PIPE_CONTROL_DEPTH_STALL |
 205              PIPE_CONTROL_INSTRUCTION_FLUSH |
 206              PIPE_CONTROL_STATE_CACHE_INVALIDATE);
 207    OUT_BATCH(0); /* address */
 208    OUT_BATCH(0); /* write data */
 209    ADVANCE_BATCH();
 210 }
 211
 212 const struct brw_tracked_state gen6_vs_state = {
 213    .dirty = {
 214       .mesa  = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
 215       .brw   = (BRW_NEW_NR_VS_SURFACES |
 216                 BRW_NEW_URB_FENCE |
 217                 BRW_NEW_CONTEXT |
 218                 BRW_NEW_VERTEX_PROGRAM |
 219                 BRW_NEW_BATCH),
 220       .cache = CACHE_NEW_VS_PROG
 221    },
 222    .emit = upload_vs_state,
 223 };