1d5c5701b37156e74d995d41ae0eb19e88eca440
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_vs_state.c
1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
31 #include "brw_util.h"
32 #include "program/prog_parameter.h"
33 #include "program/prog_statevars.h"
34 #include "intel_batchbuffer.h"
35
36 static void
37 upload_vs_state(struct brw_context *brw)
38 {
39 struct intel_context *intel = &brw->intel;
40 struct gl_context *ctx = &intel->ctx;
41 const struct brw_vertex_program *vp =
42 brw_vertex_program_const(brw->vertex_program);
43 unsigned int nr_params = vp->program.Base.Parameters->NumParameters;
44 drm_intel_bo *constant_bo;
45 int i;
46
47 if (vp->use_const_buffer || (nr_params == 0 &&
48 !ctx->Transform.ClipPlanesEnabled)) {
49 /* Disable the push constant buffers. */
50 BEGIN_BATCH(5);
51 OUT_BATCH(CMD_3D_CONSTANT_VS_STATE << 16 | (5 - 2));
52 OUT_BATCH(0);
53 OUT_BATCH(0);
54 OUT_BATCH(0);
55 OUT_BATCH(0);
56 ADVANCE_BATCH();
57 } else {
58 int params_uploaded = 0;
59 float *param;
60
61 if (brw->vertex_program->IsNVProgram)
62 _mesa_load_tracked_matrices(ctx);
63
64 /* Updates the ParamaterValues[i] pointers for all parameters of the
65 * basic type of PROGRAM_STATE_VAR.
66 */
67 _mesa_load_state_parameters(ctx, vp->program.Base.Parameters);
68
69 constant_bo = drm_intel_bo_alloc(intel->bufmgr, "VS constant_bo",
70 (MAX_CLIP_PLANES + nr_params) *
71 4 * sizeof(float),
72 4096);
73 drm_intel_gem_bo_map_gtt(constant_bo);
74 param = constant_bo->virtual;
75
76 /* This should be loaded like any other param, but it's ad-hoc
77 * until we redo the VS backend.
78 */
79 for (i = 0; i < MAX_CLIP_PLANES; i++) {
80 if (ctx->Transform.ClipPlanesEnabled & (1 << i)) {
81 memcpy(param, ctx->Transform._ClipUserPlane[i], 4 * sizeof(float));
82 param += 4;
83 params_uploaded++;
84 }
85 }
86 /* Align to a reg for convenience for brw_vs_emit.c */
87 if (params_uploaded & 1) {
88 param += 4;
89 params_uploaded++;
90 }
91
92 for (i = 0; i < nr_params; i++) {
93 memcpy(param, vp->program.Base.Parameters->ParameterValues[i],
94 4 * sizeof(float));
95 param += 4;
96 params_uploaded++;
97 }
98
99 if (0) {
100 printf("VS constant buffer:\n");
101 for (i = 0; i < params_uploaded; i++) {
102 float *buf = (float *)constant_bo->virtual + i * 4;
103 printf("%d: %f %f %f %f\n",
104 i, buf[0], buf[1], buf[2], buf[3]);
105 }
106 }
107
108 drm_intel_gem_bo_unmap_gtt(constant_bo);
109
110 BEGIN_BATCH(5);
111 OUT_BATCH(CMD_3D_CONSTANT_VS_STATE << 16 |
112 GEN6_CONSTANT_BUFFER_0_ENABLE |
113 (5 - 2));
114 OUT_RELOC(constant_bo,
115 I915_GEM_DOMAIN_RENDER, 0, /* XXX: bad domain */
116 ALIGN(params_uploaded, 2) / 2 - 1);
117 OUT_BATCH(0);
118 OUT_BATCH(0);
119 OUT_BATCH(0);
120 ADVANCE_BATCH();
121
122 drm_intel_bo_unreference(constant_bo);
123 }
124
125 BEGIN_BATCH(6);
126 OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2));
127 OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
128 OUT_BATCH(GEN6_VS_SPF_MODE | (0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
129 (brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
130 OUT_BATCH(0); /* scratch space base offset */
131 OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) |
132 (brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
133 (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
134 OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) |
135 GEN6_VS_STATISTICS_ENABLE |
136 GEN6_VS_ENABLE);
137 ADVANCE_BATCH();
138 }
139
140 const struct brw_tracked_state gen6_vs_state = {
141 .dirty = {
142 .mesa = _NEW_TRANSFORM | _NEW_PROGRAM_CONSTANTS,
143 .brw = (BRW_NEW_CURBE_OFFSETS |
144 BRW_NEW_NR_VS_SURFACES |
145 BRW_NEW_URB_FENCE |
146 BRW_NEW_CONTEXT),
147 .cache = CACHE_NEW_VS_PROG
148 },
149 .emit = upload_vs_state,
150 };