src/mesa/drivers/dri/i965/gen6_vs_state.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "brw_context.h"
  29 #include "brw_state.h"
  30 #include "brw_defines.h"
  31 #include "brw_util.h"
  32 #include "program/prog_parameter.h"
  33 #include "program/prog_statevars.h"
  34 #include "intel_batchbuffer.h"
  35 #include "glsl/glsl_parser_extras.h"
  36
  37 /**
  38  * Creates a streamed BO containing the push constants for the VS or GS on
  39  * gen6+.
  40  *
  41  * Push constants are constant values (such as GLSL uniforms) that are
  42  * pre-loaded into a shader stage's register space at thread spawn time.
  43  *
  44  * Not all GLSL uniforms will be uploaded as push constants: The hardware has
  45  * a limitation of 32 or 64 EU registers (256 or 512 floats) per stage to be
  46  * uploaded as push constants, while GL 4.4 requires at least 1024 components
  47  * to be usable for the VS.  Plus, currently we always use pull constants
  48  * instead of push constants when doing variable-index array access.
  49  *
  50  * See brw_curbe.c for the equivalent gen4/5 code.
  51  */
  52 void
  53 gen6_upload_push_constants(struct brw_context *brw,
  54                            const struct gl_program *prog,
  55                            const struct brw_stage_prog_data *prog_data,
  56                            struct brw_stage_state *stage_state,
  57                            enum aub_state_struct_type type)
  58 {
  59    struct gl_context *ctx = &brw->ctx;
  60
  61    if (prog_data->nr_params == 0) {
  62       stage_state->push_const_size = 0;
  63    } else {
  64       /* Updates the ParamaterValues[i] pointers for all parameters of the
  65        * basic type of PROGRAM_STATE_VAR.
  66        */
  67       /* XXX: Should this happen somewhere before to get our state flag set? */
  68       if (prog)
  69          _mesa_load_state_parameters(ctx, prog->Parameters);
  70
  71       gl_constant_value *param;
  72       unsigned i;
  73
  74       param = brw_state_batch(brw, type,
  75                               prog_data->nr_params * sizeof(gl_constant_value),
  76                               32, &stage_state->push_const_offset);
  77
  78       STATIC_ASSERT(sizeof(gl_constant_value) == sizeof(float));
  79
  80       /* _NEW_PROGRAM_CONSTANTS
  81        *
  82        * Also _NEW_TRANSFORM -- we may reference clip planes other than as a
  83        * side effect of dereferencing uniforms, so _NEW_PROGRAM_CONSTANTS
  84        * wouldn't be set for them.
  85       */
  86       for (i = 0; i < prog_data->nr_params; i++) {
  87          param[i] = *prog_data->param[i];
  88       }
  89
  90       if (0) {
  91          fprintf(stderr, "%s constants:\n",
  92                  _mesa_shader_stage_to_string(stage_state->stage));
  93          for (i = 0; i < prog_data->nr_params; i++) {
  94             if ((i & 7) == 0)
  95                fprintf(stderr, "g%d: ",
  96                        prog_data->dispatch_grf_start_reg + i / 8);
  97             fprintf(stderr, "%8f ", param[i].f);
  98             if ((i & 7) == 7)
  99                fprintf(stderr, "\n");
 100          }
 101          if ((i & 7) != 0)
 102             fprintf(stderr, "\n");
 103          fprintf(stderr, "\n");
 104       }
 105
 106       stage_state->push_const_size = ALIGN(prog_data->nr_params, 8) / 8;
 107       /* We can only push 32 registers of constants at a time. */
 108
 109       /* From the SNB PRM (vol2, part 1, section 3.2.1.4: 3DSTATE_CONSTANT_VS:
 110        *
 111        *     "The sum of all four read length fields (each incremented to
 112        *      represent the actual read length) must be less than or equal to
 113        *      32"
 114        *
 115        * From the IVB PRM (vol2, part 1, section 3.2.1.3: 3DSTATE_CONSTANT_VS:
 116        *
 117        *     "The sum of all four read length fields must be less than or
 118        *      equal to the size of 64"
 119        *
 120        * The other shader stages all match the VS's limits.
 121        */
 122       assert(stage_state->push_const_size <= 32);
 123    }
 124 }
 125
 126 static void
 127 gen6_upload_vs_push_constants(struct brw_context *brw)
 128 {
 129    struct brw_stage_state *stage_state = &brw->vs.base;
 130
 131    /* _BRW_NEW_VERTEX_PROGRAM */
 132    const struct brw_vertex_program *vp =
 133       brw_vertex_program_const(brw->vertex_program);
 134    /* BRW_NEW_VS_PROG_DATA */
 135    const struct brw_stage_prog_data *prog_data = &brw->vs.prog_data->base.base;
 136
 137    gen6_upload_push_constants(brw, &vp->program.Base, prog_data,
 138                               stage_state, AUB_TRACE_VS_CONSTANTS);
 139
 140    if (brw->gen >= 7) {
 141       if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail)
 142          gen7_emit_vs_workaround_flush(brw);
 143
 144       gen7_upload_constant_state(brw, stage_state, true /* active */,
 145                                  _3DSTATE_CONSTANT_VS);
 146    }
 147 }
 148
 149 const struct brw_tracked_state gen6_vs_push_constants = {
 150    .dirty = {
 151       .mesa  = _NEW_PROGRAM_CONSTANTS |
 152                _NEW_TRANSFORM,
 153       .brw   = BRW_NEW_BATCH |
 154                BRW_NEW_PUSH_CONSTANT_ALLOCATION |
 155                BRW_NEW_VERTEX_PROGRAM |
 156                BRW_NEW_VS_PROG_DATA,
 157    },
 158    .emit = gen6_upload_vs_push_constants,
 159 };
 160
 161 static void
 162 upload_vs_state(struct brw_context *brw)
 163 {
 164    const struct brw_stage_state *stage_state = &brw->vs.base;
 165    uint32_t floating_point_mode = 0;
 166
 167    /* From the BSpec, 3D Pipeline > Geometry > Vertex Shader > State,
 168     * 3DSTATE_VS, Dword 5.0 "VS Function Enable":
 169     *
 170     *   [DevSNB] A pipeline flush must be programmed prior to a 3DSTATE_VS
 171     *   command that causes the VS Function Enable to toggle. Pipeline
 172     *   flush can be executed by sending a PIPE_CONTROL command with CS
 173     *   stall bit set and a post sync operation.
 174     *
 175     * We've already done such a flush at the start of state upload, so we
 176     * don't need to do another one here.
 177     */
 178
 179    if (stage_state->push_const_size == 0) {
 180       /* Disable the push constant buffers. */
 181       BEGIN_BATCH(5);
 182       OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 | (5 - 2));
 183       OUT_BATCH(0);
 184       OUT_BATCH(0);
 185       OUT_BATCH(0);
 186       OUT_BATCH(0);
 187       ADVANCE_BATCH();
 188    } else {
 189       BEGIN_BATCH(5);
 190       OUT_BATCH(_3DSTATE_CONSTANT_VS << 16 |
 191                 GEN6_CONSTANT_BUFFER_0_ENABLE |
 192                 (5 - 2));
 193       /* Pointer to the VS constant buffer.  Covered by the set of
 194        * state flags from gen6_upload_vs_constants
 195        */
 196       OUT_BATCH(stage_state->push_const_offset +
 197                 stage_state->push_const_size - 1);
 198       OUT_BATCH(0);
 199       OUT_BATCH(0);
 200       OUT_BATCH(0);
 201       ADVANCE_BATCH();
 202    }
 203
 204    if (brw->vs.prog_data->base.base.use_alt_mode)
 205       floating_point_mode = GEN6_VS_FLOATING_POINT_MODE_ALT;
 206
 207    BEGIN_BATCH(6);
 208    OUT_BATCH(_3DSTATE_VS << 16 | (6 - 2));
 209    OUT_BATCH(stage_state->prog_offset);
 210    OUT_BATCH(floating_point_mode |
 211              ((ALIGN(stage_state->sampler_count, 4)/4) << GEN6_VS_SAMPLER_COUNT_SHIFT) |
 212              ((brw->vs.prog_data->base.base.binding_table.size_bytes / 4) <<
 213               GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
 214
 215    if (brw->vs.prog_data->base.base.total_scratch) {
 216       OUT_RELOC(stage_state->scratch_bo,
 217                 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
 218                 ffs(brw->vs.prog_data->base.base.total_scratch) - 11);
 219    } else {
 220       OUT_BATCH(0);
 221    }
 222
 223    OUT_BATCH((brw->vs.prog_data->base.base.dispatch_grf_start_reg <<
 224               GEN6_VS_DISPATCH_START_GRF_SHIFT) |
 225              (brw->vs.prog_data->base.urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
 226              (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
 227
 228    OUT_BATCH(((brw->max_vs_threads - 1) << GEN6_VS_MAX_THREADS_SHIFT) |
 229              GEN6_VS_STATISTICS_ENABLE |
 230              GEN6_VS_ENABLE);
 231    ADVANCE_BATCH();
 232
 233    /* Based on my reading of the simulator, the VS constants don't get
 234     * pulled into the VS FF unit until an appropriate pipeline flush
 235     * happens, and instead the 3DSTATE_CONSTANT_VS packet just adds
 236     * references to them into a little FIFO.  The flushes are common,
 237     * but don't reliably happen between this and a 3DPRIMITIVE, causing
 238     * the primitive to use the wrong constants.  Then the FIFO
 239     * containing the constant setup gets added to again on the next
 240     * constants change, and eventually when a flush does happen the
 241     * unit is overwhelmed by constant changes and dies.
 242     *
 243     * To avoid this, send a PIPE_CONTROL down the line that will
 244     * update the unit immediately loading the constants.  The flush
 245     * type bits here were those set by the STATE_BASE_ADDRESS whose
 246     * move in a82a43e8d99e1715dd11c9c091b5ab734079b6a6 triggered the
 247     * bug reports that led to this workaround, and may be more than
 248     * what is strictly required to avoid the issue.
 249     */
 250    brw_emit_pipe_control_flush(brw,
 251                                PIPE_CONTROL_DEPTH_STALL |
 252                                PIPE_CONTROL_INSTRUCTION_INVALIDATE |
 253                                PIPE_CONTROL_STATE_CACHE_INVALIDATE);
 254 }
 255
 256 const struct brw_tracked_state gen6_vs_state = {
 257    .dirty = {
 258       .mesa  = _NEW_PROGRAM_CONSTANTS |
 259                _NEW_TRANSFORM,
 260       .brw   = BRW_NEW_BATCH |
 261                BRW_NEW_CONTEXT |
 262                BRW_NEW_PUSH_CONSTANT_ALLOCATION |
 263                BRW_NEW_VERTEX_PROGRAM |
 264                BRW_NEW_VS_PROG_DATA,
 265    },
 266    .emit = upload_vs_state,
 267 };