src/mesa/drivers/dri/i965/gen6_vs_state.c

   1 /*
   2  * Copyright © 2009 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *
  26  */
  27
  28 #include "brw_context.h"
  29 #include "brw_state.h"
  30 #include "brw_defines.h"
  31 #include "brw_util.h"
  32 #include "main/macros.h"
  33 #include "main/enums.h"
  34 #include "intel_batchbuffer.h"
  35
  36 static void
  37 upload_vs_state(struct brw_context *brw)
  38 {
  39    struct intel_context *intel = &brw->intel;
  40
  41    BEGIN_BATCH(6);
  42    OUT_BATCH(CMD_3D_VS_STATE << 16 | (6 - 2));
  43    OUT_RELOC(brw->vs.prog_bo, I915_GEM_DOMAIN_INSTRUCTION, 0, 0);
  44    OUT_BATCH((0 << GEN6_VS_SAMPLER_COUNT_SHIFT) |
  45              (brw->vs.nr_surfaces << GEN6_VS_BINDING_TABLE_ENTRY_COUNT_SHIFT));
  46    OUT_BATCH(0); /* scratch space base offset */
  47    OUT_BATCH((1 << GEN6_VS_DISPATCH_START_GRF_SHIFT) |
  48              (brw->vs.prog_data->urb_read_length << GEN6_VS_URB_READ_LENGTH_SHIFT) |
  49              (0 << GEN6_VS_URB_ENTRY_READ_OFFSET_SHIFT));
  50    OUT_BATCH((0 << GEN6_VS_MAX_THREADS_SHIFT) |
  51              GEN6_VS_STATISTICS_ENABLE);
  52    ADVANCE_BATCH();
  53
  54    /* Disable all the constant buffers. */
  55    BEGIN_BATCH(5);
  56    OUT_BATCH(CMD_3D_CONSTANT_VS_STATE | (5 - 2));
  57    OUT_BATCH(0);
  58    OUT_BATCH(0);
  59    OUT_BATCH(0);
  60    OUT_BATCH(0);
  61    ADVANCE_BATCH();
  62 }
  63
  64 const struct brw_tracked_state gen6_vs_state = {
  65    .dirty = {
  66       .mesa  = _NEW_TRANSFORM,
  67       .brw   = (BRW_NEW_CURBE_OFFSETS |
  68                 BRW_NEW_NR_VS_SURFACES |
  69                 BRW_NEW_URB_FENCE |
  70                 BRW_NEW_CONTEXT),
  71       .cache = CACHE_NEW_VS_PROG
  72    },
  73    .emit = upload_vs_state,
  74 };