i965/miptree: Use the isl helpers for creating aux surfaces
[mesa.git] / src / mesa / drivers / dri / i965 / gen6_wm_state.c
1 /*
2 * Copyright © 2009 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Eric Anholt <eric@anholt.net>
25 *
26 */
27
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
31 #include "brw_util.h"
32 #include "brw_wm.h"
33 #include "program/program.h"
34 #include "program/prog_parameter.h"
35 #include "program/prog_statevars.h"
36 #include "main/framebuffer.h"
37 #include "intel_batchbuffer.h"
38
39 static void
40 gen6_upload_wm_push_constants(struct brw_context *brw)
41 {
42 struct brw_stage_state *stage_state = &brw->wm.base;
43 /* BRW_NEW_FRAGMENT_PROGRAM */
44 const struct brw_fragment_program *fp =
45 brw_fragment_program_const(brw->fragment_program);
46 /* BRW_NEW_FS_PROG_DATA */
47 const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
48
49 gen6_upload_push_constants(brw, &fp->program.Base, &prog_data->base,
50 stage_state, AUB_TRACE_WM_CONSTANTS);
51
52 if (brw->gen >= 7) {
53 gen7_upload_constant_state(brw, &brw->wm.base, true,
54 _3DSTATE_CONSTANT_PS);
55 }
56 }
57
58 const struct brw_tracked_state gen6_wm_push_constants = {
59 .dirty = {
60 .mesa = _NEW_PROGRAM_CONSTANTS,
61 .brw = BRW_NEW_BATCH |
62 BRW_NEW_BLORP |
63 BRW_NEW_FRAGMENT_PROGRAM |
64 BRW_NEW_FS_PROG_DATA |
65 BRW_NEW_PUSH_CONSTANT_ALLOCATION,
66 },
67 .emit = gen6_upload_wm_push_constants,
68 };
69
70 void
71 gen6_upload_wm_state(struct brw_context *brw,
72 const struct brw_wm_prog_data *prog_data,
73 const struct brw_stage_state *stage_state,
74 bool multisampled_fbo,
75 bool dual_source_blend_enable, bool kill_enable,
76 bool color_buffer_write_enable, bool msaa_enabled,
77 bool line_stipple_enable, bool polygon_stipple_enable,
78 bool statistic_enable)
79 {
80 uint32_t dw2, dw4, dw5, dw6, ksp0, ksp2;
81
82 /* We can't fold this into gen6_upload_wm_push_constants(), because
83 * according to the SNB PRM, vol 2 part 1 section 7.2.2
84 * (3DSTATE_CONSTANT_PS [DevSNB]):
85 *
86 * "[DevSNB]: This packet must be followed by WM_STATE."
87 */
88 if (prog_data->base.nr_params == 0) {
89 /* Disable the push constant buffers. */
90 BEGIN_BATCH(5);
91 OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 | (5 - 2));
92 OUT_BATCH(0);
93 OUT_BATCH(0);
94 OUT_BATCH(0);
95 OUT_BATCH(0);
96 ADVANCE_BATCH();
97 } else {
98 BEGIN_BATCH(5);
99 OUT_BATCH(_3DSTATE_CONSTANT_PS << 16 |
100 GEN6_CONSTANT_BUFFER_0_ENABLE |
101 (5 - 2));
102 /* Pointer to the WM constant buffer. Covered by the set of
103 * state flags from gen6_upload_wm_push_constants.
104 */
105 OUT_BATCH(stage_state->push_const_offset +
106 stage_state->push_const_size - 1);
107 OUT_BATCH(0);
108 OUT_BATCH(0);
109 OUT_BATCH(0);
110 ADVANCE_BATCH();
111 }
112
113 dw2 = dw4 = dw5 = dw6 = ksp2 = 0;
114
115 if (statistic_enable)
116 dw4 |= GEN6_WM_STATISTICS_ENABLE;
117
118 dw5 |= GEN6_WM_LINE_AA_WIDTH_1_0;
119 dw5 |= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5;
120
121 if (prog_data->base.use_alt_mode)
122 dw2 |= GEN6_WM_FLOATING_POINT_MODE_ALT;
123
124 dw2 |= (ALIGN(stage_state->sampler_count, 4) / 4) <<
125 GEN6_WM_SAMPLER_COUNT_SHIFT;
126
127 dw2 |= ((prog_data->base.binding_table.size_bytes / 4) <<
128 GEN6_WM_BINDING_TABLE_ENTRY_COUNT_SHIFT);
129
130 dw5 |= (brw->max_wm_threads - 1) << GEN6_WM_MAX_THREADS_SHIFT;
131
132 if (prog_data->dispatch_8)
133 dw5 |= GEN6_WM_8_DISPATCH_ENABLE;
134
135 if (prog_data->dispatch_16)
136 dw5 |= GEN6_WM_16_DISPATCH_ENABLE;
137
138 dw4 |= prog_data->base.dispatch_grf_start_reg <<
139 GEN6_WM_DISPATCH_START_GRF_SHIFT_0;
140 dw4 |= prog_data->dispatch_grf_start_reg_2 <<
141 GEN6_WM_DISPATCH_START_GRF_SHIFT_2;
142
143 ksp0 = stage_state->prog_offset;
144 ksp2 = stage_state->prog_offset + prog_data->prog_offset_2;
145
146 if (dual_source_blend_enable)
147 dw5 |= GEN6_WM_DUAL_SOURCE_BLEND_ENABLE;
148
149 if (line_stipple_enable)
150 dw5 |= GEN6_WM_LINE_STIPPLE_ENABLE;
151
152 if (polygon_stipple_enable)
153 dw5 |= GEN6_WM_POLYGON_STIPPLE_ENABLE;
154
155 if (prog_data->uses_src_depth)
156 dw5 |= GEN6_WM_USES_SOURCE_DEPTH;
157 if (prog_data->uses_src_w)
158 dw5 |= GEN6_WM_USES_SOURCE_W;
159 if (prog_data->computed_depth_mode != BRW_PSCDEPTH_OFF)
160 dw5 |= GEN6_WM_COMPUTED_DEPTH;
161 dw6 |= prog_data->barycentric_interp_modes <<
162 GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT;
163
164 if (kill_enable)
165 dw5 |= GEN6_WM_KILL_ENABLE;
166
167 if (color_buffer_write_enable ||
168 dw5 & (GEN6_WM_KILL_ENABLE | GEN6_WM_COMPUTED_DEPTH))
169 dw5 |= GEN6_WM_DISPATCH_ENABLE;
170
171 /* From the SNB PRM, volume 2 part 1, page 278:
172 * "This bit is inserted in the PS payload header and made available to
173 * the DataPort (either via the message header or via header bypass) to
174 * indicate that oMask data (one or two phases) is included in Render
175 * Target Write messages. If present, the oMask data is used to mask off
176 * samples."
177 */
178 if (prog_data->uses_omask)
179 dw5 |= GEN6_WM_OMASK_TO_RENDER_TARGET;
180
181 dw6 |= prog_data->num_varying_inputs <<
182 GEN6_WM_NUM_SF_OUTPUTS_SHIFT;
183 if (multisampled_fbo) {
184 if (msaa_enabled)
185 dw6 |= GEN6_WM_MSRAST_ON_PATTERN;
186 else
187 dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;
188
189 if (prog_data->persample_dispatch)
190 dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE;
191 else {
192 dw6 |= GEN6_WM_MSDISPMODE_PERPIXEL;
193 }
194 } else {
195 dw6 |= GEN6_WM_MSRAST_OFF_PIXEL;
196 dw6 |= GEN6_WM_MSDISPMODE_PERSAMPLE;
197 }
198
199 /* From the SNB PRM, volume 2 part 1, page 281:
200 * "If the PS kernel does not need the Position XY Offsets
201 * to compute a Position XY value, then this field should be
202 * programmed to POSOFFSET_NONE."
203 *
204 * "SW Recommendation: If the PS kernel needs the Position Offsets
205 * to compute a Position XY value, this field should match Position
206 * ZW Interpolation Mode to ensure a consistent position.xyzw
207 * computation."
208 * We only require XY sample offsets. So, this recommendation doesn't
209 * look useful at the moment. We might need this in future.
210 */
211 if (prog_data->uses_pos_offset)
212 dw6 |= GEN6_WM_POSOFFSET_SAMPLE;
213 else
214 dw6 |= GEN6_WM_POSOFFSET_NONE;
215
216 BEGIN_BATCH(9);
217 OUT_BATCH(_3DSTATE_WM << 16 | (9 - 2));
218 OUT_BATCH(ksp0);
219 OUT_BATCH(dw2);
220 if (prog_data->base.total_scratch) {
221 OUT_RELOC(stage_state->scratch_bo,
222 I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
223 ffs(stage_state->per_thread_scratch) - 11);
224 } else {
225 OUT_BATCH(0);
226 }
227 OUT_BATCH(dw4);
228 OUT_BATCH(dw5);
229 OUT_BATCH(dw6);
230 OUT_BATCH(0); /* kernel 1 pointer */
231 OUT_BATCH(ksp2);
232 ADVANCE_BATCH();
233 }
234
235 static void
236 upload_wm_state(struct brw_context *brw)
237 {
238 struct gl_context *ctx = &brw->ctx;
239 /* BRW_NEW_FS_PROG_DATA */
240 const struct brw_wm_prog_data *prog_data = brw->wm.prog_data;
241
242 /* _NEW_BUFFERS */
243 const bool multisampled_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
244
245 /* BRW_NEW_FS_PROG_DATA | _NEW_COLOR */
246 const bool dual_src_blend_enable = prog_data->dual_src_blend &&
247 (ctx->Color.BlendEnabled & 1) &&
248 ctx->Color.Blend[0]._UsesDualSrc;
249
250 /* _NEW_COLOR, _NEW_MULTISAMPLE */
251 const bool kill_enable = prog_data->uses_kill || ctx->Color.AlphaEnabled ||
252 ctx->Multisample.SampleAlphaToCoverage ||
253 prog_data->uses_omask;
254
255 /* Rendering against the gl-context is always taken into account. */
256 const bool statistic_enable = true;
257
258 /* _NEW_LINE | _NEW_POLYGON | _NEW_BUFFERS | _NEW_COLOR |
259 * _NEW_MULTISAMPLE
260 */
261 gen6_upload_wm_state(brw, prog_data, &brw->wm.base,
262 multisampled_fbo,
263 dual_src_blend_enable, kill_enable,
264 brw_color_buffer_write_enabled(brw),
265 ctx->Multisample.Enabled,
266 ctx->Line.StippleFlag, ctx->Polygon.StippleFlag,
267 statistic_enable);
268 }
269
270 const struct brw_tracked_state gen6_wm_state = {
271 .dirty = {
272 .mesa = _NEW_BUFFERS |
273 _NEW_COLOR |
274 _NEW_LINE |
275 _NEW_MULTISAMPLE |
276 _NEW_POLYGON |
277 _NEW_PROGRAM_CONSTANTS,
278 .brw = BRW_NEW_BATCH |
279 BRW_NEW_BLORP |
280 BRW_NEW_FS_PROG_DATA |
281 BRW_NEW_PUSH_CONSTANT_ALLOCATION,
282 },
283 .emit = upload_wm_state,
284 };