2 * Copyright © 2009 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
28 #include "brw_context.h"
29 #include "brw_state.h"
30 #include "brw_defines.h"
33 #include "program/prog_parameter.h"
34 #include "program/prog_statevars.h"
35 #include "intel_batchbuffer.h"
38 gen6_upload_wm_push_constants(struct brw_context
*brw
)
40 struct intel_context
*intel
= &brw
->intel
;
41 struct gl_context
*ctx
= &intel
->ctx
;
42 /* BRW_NEW_FRAGMENT_PROGRAM */
43 const struct brw_fragment_program
*fp
=
44 brw_fragment_program_const(brw
->fragment_program
);
46 /* Updates the ParameterValues[i] pointers for all parameters of the
47 * basic type of PROGRAM_STATE_VAR.
49 /* XXX: Should this happen somewhere before to get our state flag set? */
50 _mesa_load_state_parameters(ctx
, fp
->program
.Base
.Parameters
);
52 /* CACHE_NEW_WM_PROG */
53 if (brw
->wm
.prog_data
->nr_params
!= 0) {
57 constants
= brw_state_batch(brw
, AUB_TRACE_WM_CONSTANTS
,
58 brw
->wm
.prog_data
->nr_params
*
60 32, &brw
->wm
.push_const_offset
);
62 for (i
= 0; i
< brw
->wm
.prog_data
->nr_params
; i
++) {
63 constants
[i
] = convert_param(brw
->wm
.prog_data
->param_convert
[i
],
64 brw
->wm
.prog_data
->param
[i
]);
68 printf("WM constants:\n");
69 for (i
= 0; i
< brw
->wm
.prog_data
->nr_params
; i
++) {
71 printf("g%d: ", brw
->wm
.prog_data
->first_curbe_grf
+ i
/ 8);
72 printf("%8f ", constants
[i
]);
83 const struct brw_tracked_state gen6_wm_push_constants
= {
85 .mesa
= _NEW_PROGRAM_CONSTANTS
,
86 .brw
= (BRW_NEW_BATCH
|
87 BRW_NEW_FRAGMENT_PROGRAM
),
88 .cache
= CACHE_NEW_WM_PROG
,
90 .emit
= gen6_upload_wm_push_constants
,
94 upload_wm_state(struct brw_context
*brw
)
96 struct intel_context
*intel
= &brw
->intel
;
97 struct gl_context
*ctx
= &intel
->ctx
;
98 const struct brw_fragment_program
*fp
=
99 brw_fragment_program_const(brw
->fragment_program
);
100 uint32_t dw2
, dw4
, dw5
, dw6
;
101 bool multisampled_fbo
= false;
104 if (ctx
->DrawBuffer
->_ColorDrawBuffers
[0])
105 multisampled_fbo
= ctx
->DrawBuffer
->_ColorDrawBuffers
[0]->NumSamples
> 0;
107 /* CACHE_NEW_WM_PROG */
108 if (brw
->wm
.prog_data
->nr_params
== 0) {
109 /* Disable the push constant buffers. */
111 OUT_BATCH(_3DSTATE_CONSTANT_PS
<< 16 | (5 - 2));
119 OUT_BATCH(_3DSTATE_CONSTANT_PS
<< 16 |
120 GEN6_CONSTANT_BUFFER_0_ENABLE
|
122 /* Pointer to the WM constant buffer. Covered by the set of
123 * state flags from gen6_upload_wm_push_constants.
125 OUT_BATCH(brw
->wm
.push_const_offset
+
126 ALIGN(brw
->wm
.prog_data
->nr_params
,
127 brw
->wm
.prog_data
->dispatch_width
) / 8 - 1);
134 dw2
= dw4
= dw5
= dw6
= 0;
135 dw4
|= GEN6_WM_STATISTICS_ENABLE
;
136 dw5
|= GEN6_WM_LINE_AA_WIDTH_1_0
;
137 dw5
|= GEN6_WM_LINE_END_CAP_AA_WIDTH_0_5
;
139 /* Use ALT floating point mode for ARB fragment programs, because they
140 * require 0^0 == 1. Even though _CurrentFragmentProgram is used for
141 * rendering, CurrentFragmentProgram is used for this check to
142 * differentiate between the GLSL and non-GLSL cases.
144 if (ctx
->Shader
.CurrentFragmentProgram
== NULL
)
145 dw2
|= GEN6_WM_FLOATING_POINT_MODE_ALT
;
147 /* CACHE_NEW_SAMPLER */
148 dw2
|= (ALIGN(brw
->sampler
.count
, 4) / 4) << GEN6_WM_SAMPLER_COUNT_SHIFT
;
149 dw4
|= (brw
->wm
.prog_data
->first_curbe_grf
<<
150 GEN6_WM_DISPATCH_START_GRF_SHIFT_0
);
151 dw4
|= (brw
->wm
.prog_data
->first_curbe_grf_16
<<
152 GEN6_WM_DISPATCH_START_GRF_SHIFT_2
);
154 dw5
|= (brw
->max_wm_threads
- 1) << GEN6_WM_MAX_THREADS_SHIFT
;
156 /* CACHE_NEW_WM_PROG */
157 if (brw
->wm
.prog_data
->dispatch_width
== 8) {
158 dw5
|= GEN6_WM_8_DISPATCH_ENABLE
;
159 if (brw
->wm
.prog_data
->prog_offset_16
)
160 dw5
|= GEN6_WM_16_DISPATCH_ENABLE
;
162 dw5
|= GEN6_WM_16_DISPATCH_ENABLE
;
165 /* CACHE_NEW_WM_PROG | _NEW_COLOR */
166 if (brw
->wm
.prog_data
->dual_src_blend
&&
167 (ctx
->Color
.BlendEnabled
& 1) &&
168 ctx
->Color
.Blend
[0]._UsesDualSrc
) {
169 dw5
|= GEN6_WM_DUAL_SOURCE_BLEND_ENABLE
;
173 if (ctx
->Line
.StippleFlag
)
174 dw5
|= GEN6_WM_LINE_STIPPLE_ENABLE
;
177 if (ctx
->Polygon
.StippleFlag
)
178 dw5
|= GEN6_WM_POLYGON_STIPPLE_ENABLE
;
180 /* BRW_NEW_FRAGMENT_PROGRAM */
181 if (fp
->program
.Base
.InputsRead
& FRAG_BIT_WPOS
)
182 dw5
|= GEN6_WM_USES_SOURCE_DEPTH
| GEN6_WM_USES_SOURCE_W
;
183 if (fp
->program
.Base
.OutputsWritten
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
))
184 dw5
|= GEN6_WM_COMPUTED_DEPTH
;
185 /* CACHE_NEW_WM_PROG */
186 dw6
|= brw
->wm
.prog_data
->barycentric_interp_modes
<<
187 GEN6_WM_BARYCENTRIC_INTERPOLATION_MODE_SHIFT
;
190 if (fp
->program
.UsesKill
|| ctx
->Color
.AlphaEnabled
)
191 dw5
|= GEN6_WM_KILL_ENABLE
;
193 if (brw_color_buffer_write_enabled(brw
) ||
194 dw5
& (GEN6_WM_KILL_ENABLE
| GEN6_WM_COMPUTED_DEPTH
)) {
195 dw5
|= GEN6_WM_DISPATCH_ENABLE
;
198 dw6
|= _mesa_bitcount_64(brw
->fragment_program
->Base
.InputsRead
) <<
199 GEN6_WM_NUM_SF_OUTPUTS_SHIFT
;
200 if (multisampled_fbo
) {
201 /* _NEW_MULTISAMPLE */
202 if (ctx
->Multisample
.Enabled
)
203 dw6
|= GEN6_WM_MSRAST_ON_PATTERN
;
205 dw6
|= GEN6_WM_MSRAST_OFF_PIXEL
;
206 dw6
|= GEN6_WM_MSDISPMODE_PERPIXEL
;
208 dw6
|= GEN6_WM_MSRAST_OFF_PIXEL
;
209 dw6
|= GEN6_WM_MSDISPMODE_PERSAMPLE
;
213 OUT_BATCH(_3DSTATE_WM
<< 16 | (9 - 2));
214 OUT_BATCH(brw
->wm
.prog_offset
);
216 if (brw
->wm
.prog_data
->total_scratch
) {
217 OUT_RELOC(brw
->wm
.scratch_bo
, I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
218 ffs(brw
->wm
.prog_data
->total_scratch
) - 11);
225 OUT_BATCH(0); /* kernel 1 pointer */
226 /* kernel 2 pointer */
227 OUT_BATCH(brw
->wm
.prog_offset
+ brw
->wm
.prog_data
->prog_offset_16
);
231 const struct brw_tracked_state gen6_wm_state
= {
236 _NEW_PROGRAM_CONSTANTS
|
239 .brw
= (BRW_NEW_FRAGMENT_PROGRAM
|
241 .cache
= (CACHE_NEW_SAMPLER
|
244 .emit
= upload_wm_state
,