Merge remote-tracking branch 'origin/master' into pipe-video
[mesa.git] / src / mesa / drivers / dri / i965 / gen7_cc_state.c
1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "brw_util.h"
28 #include "intel_batchbuffer.h"
29 #include "main/macros.h"
30
31 static void
32 upload_cc_state_pointers(struct brw_context *brw)
33 {
34 struct intel_context *intel = &brw->intel;
35
36 BEGIN_BATCH(2);
37 OUT_BATCH(_3DSTATE_CC_STATE_POINTERS << 16 | (2 - 2));
38 OUT_BATCH(brw->cc.state_offset | 1);
39 ADVANCE_BATCH();
40 }
41
42 const struct brw_tracked_state gen7_cc_state_pointer = {
43 .dirty = {
44 .mesa = 0,
45 .brw = BRW_NEW_BATCH,
46 .cache = CACHE_NEW_COLOR_CALC_STATE
47 },
48 .emit = upload_cc_state_pointers,
49 };
50
51 static void
52 upload_blend_state_pointer(struct brw_context *brw)
53 {
54 struct intel_context *intel = &brw->intel;
55
56 BEGIN_BATCH(2);
57 OUT_BATCH(_3DSTATE_BLEND_STATE_POINTERS << 16 | (2 - 2));
58 OUT_BATCH(brw->cc.blend_state_offset | 1);
59 ADVANCE_BATCH();
60 }
61
62 const struct brw_tracked_state gen7_blend_state_pointer = {
63 .dirty = {
64 .mesa = 0,
65 .brw = BRW_NEW_BATCH,
66 .cache = CACHE_NEW_BLEND_STATE
67 },
68 .emit = upload_blend_state_pointer,
69 };
70
71 static void
72 upload_depth_stencil_state_pointer(struct brw_context *brw)
73 {
74 struct intel_context *intel = &brw->intel;
75
76 BEGIN_BATCH(2);
77 OUT_BATCH(_3DSTATE_DEPTH_STENCIL_STATE_POINTERS << 16 | (2 - 2));
78 OUT_BATCH(brw->cc.depth_stencil_state_offset | 1);
79 ADVANCE_BATCH();
80 }
81
82 const struct brw_tracked_state gen7_depth_stencil_state_pointer = {
83 .dirty = {
84 .mesa = 0,
85 .brw = BRW_NEW_BATCH,
86 .cache = CACHE_NEW_DEPTH_STENCIL_STATE
87 },
88 .emit = upload_depth_stencil_state_pointer,
89 };