i965 Gen6+: De-compact clip planes.
[mesa.git] / src / mesa / drivers / dri / i965 / gen7_clip_state.c
1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "brw_context.h"
25 #include "brw_state.h"
26 #include "brw_defines.h"
27 #include "brw_util.h"
28 #include "intel_batchbuffer.h"
29
30 static void
31 upload_clip_state(struct brw_context *brw)
32 {
33 struct intel_context *intel = &brw->intel;
34 struct gl_context *ctx = &intel->ctx;
35 uint32_t depth_clamp = 0;
36 uint32_t provoking, userclip;
37 uint32_t dw1 = GEN6_CLIP_STATISTICS_ENABLE;
38
39 /* _NEW_BUFFERS */
40 GLboolean render_to_fbo = brw->intel.ctx.DrawBuffer->Name != 0;
41
42 dw1 |= GEN7_CLIP_EARLY_CULL;
43
44 /* _NEW_POLYGON */
45 if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo)
46 dw1 |= GEN7_CLIP_WINDING_CCW;
47
48 if (ctx->Polygon.CullFlag) {
49 switch (ctx->Polygon.CullFaceMode) {
50 case GL_FRONT:
51 dw1 |= GEN7_CLIP_CULLMODE_FRONT;
52 break;
53 case GL_BACK:
54 dw1 |= GEN7_CLIP_CULLMODE_BACK;
55 break;
56 case GL_FRONT_AND_BACK:
57 dw1 |= GEN7_CLIP_CULLMODE_BOTH;
58 break;
59 default:
60 assert(!"Should not get here: invalid CullFlag");
61 break;
62 }
63 } else {
64 dw1 |= GEN7_CLIP_CULLMODE_NONE;
65 }
66
67 /* _NEW_TRANSFORM */
68 if (!ctx->Transform.DepthClamp)
69 depth_clamp = GEN6_CLIP_Z_TEST;
70
71 /* _NEW_LIGHT */
72 if (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION) {
73 provoking =
74 (0 << GEN6_CLIP_TRI_PROVOKE_SHIFT) |
75 (1 << GEN6_CLIP_TRIFAN_PROVOKE_SHIFT) |
76 (0 << GEN6_CLIP_LINE_PROVOKE_SHIFT);
77 } else {
78 provoking =
79 (2 << GEN6_CLIP_TRI_PROVOKE_SHIFT) |
80 (2 << GEN6_CLIP_TRIFAN_PROVOKE_SHIFT) |
81 (1 << GEN6_CLIP_LINE_PROVOKE_SHIFT);
82 }
83
84 /* _NEW_TRANSFORM */
85 userclip = ctx->Transform.ClipPlanesEnabled;
86
87 BEGIN_BATCH(4);
88 OUT_BATCH(_3DSTATE_CLIP << 16 | (4 - 2));
89 OUT_BATCH(dw1);
90 OUT_BATCH(GEN6_CLIP_ENABLE |
91 GEN6_CLIP_API_OGL |
92 GEN6_CLIP_MODE_NORMAL |
93 GEN6_CLIP_XY_TEST |
94 userclip << GEN6_USER_CLIP_CLIP_DISTANCES_SHIFT |
95 depth_clamp |
96 provoking);
97 OUT_BATCH(U_FIXED(0.125, 3) << GEN6_CLIP_MIN_POINT_WIDTH_SHIFT |
98 U_FIXED(255.875, 3) << GEN6_CLIP_MAX_POINT_WIDTH_SHIFT |
99 GEN6_CLIP_FORCE_ZERO_RTAINDEX);
100 ADVANCE_BATCH();
101 }
102
103 const struct brw_tracked_state gen7_clip_state = {
104 .dirty = {
105 .mesa = (_NEW_BUFFERS |
106 _NEW_POLYGON |
107 _NEW_LIGHT |
108 _NEW_TRANSFORM),
109 .brw = BRW_NEW_CONTEXT,
110 .cache = 0
111 },
112 .emit = upload_clip_state,
113 };