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11 * The above copyright notice and this permission notice (including the next
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16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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21 * DEALINGS IN THE SOFTWARE.
24 #include "util/ralloc.h"
25 #include "brw_context.h"
29 #include "brw_shader.h"
30 #include "intel_mipmap_tree.h"
31 #include "intel_batchbuffer.h"
32 #include "brw_state.h"
33 #include "program/prog_statevars.h"
34 #include "compiler/glsl/ir_uniform.h"
35 #include "main/shaderapi.h"
38 brw_upload_cs_state(struct brw_context
*brw
)
40 if (!brw
->cs
.prog_data
)
44 uint32_t *desc
= (uint32_t*) brw_state_batch(brw
, AUB_TRACE_SURFACE_STATE
,
46 struct brw_stage_state
*stage_state
= &brw
->cs
.base
;
47 struct brw_cs_prog_data
*cs_prog_data
= brw
->cs
.prog_data
;
48 struct brw_stage_prog_data
*prog_data
= &cs_prog_data
->base
;
49 const struct gen_device_info
*devinfo
= brw
->screen
->devinfo
;
51 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
52 brw_emit_buffer_surface_state(
53 brw
, &stage_state
->surf_offset
[
54 prog_data
->binding_table
.shader_time_start
],
55 brw
->shader_time
.bo
, 0, BRW_SURFACEFORMAT_RAW
,
56 brw
->shader_time
.bo
->size
, 1, true);
59 uint32_t *bind
= (uint32_t*) brw_state_batch(brw
, AUB_TRACE_BINDING_TABLE
,
60 prog_data
->binding_table
.size_bytes
,
61 32, &stage_state
->bind_bo_offset
);
63 uint32_t dwords
= brw
->gen
< 8 ? 8 : 9;
65 OUT_BATCH(MEDIA_VFE_STATE
<< 16 | (dwords
- 2));
67 if (prog_data
->total_scratch
) {
69 /* Broadwell's Per Thread Scratch Space is in the range [0, 11]
70 * where 0 = 1k, 1 = 2k, 2 = 4k, ..., 11 = 2M.
72 OUT_RELOC64(stage_state
->scratch_bo
,
73 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
74 ffs(stage_state
->per_thread_scratch
) - 11);
75 } else if (brw
->is_haswell
) {
76 /* Haswell's Per Thread Scratch Space is in the range [0, 10]
77 * where 0 = 2k, 1 = 4k, 2 = 8k, ..., 10 = 2M.
79 OUT_RELOC(stage_state
->scratch_bo
,
80 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
81 ffs(stage_state
->per_thread_scratch
) - 12);
83 /* Earlier platforms use the range [0, 11] to mean [1kB, 12kB]
84 * where 0 = 1kB, 1 = 2kB, 2 = 3kB, ..., 11 = 12kB.
86 OUT_RELOC(stage_state
->scratch_bo
,
87 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
88 stage_state
->per_thread_scratch
/ 1024 - 1);
96 const uint32_t vfe_num_urb_entries
= brw
->gen
>= 8 ? 2 : 0;
97 const uint32_t vfe_gpgpu_mode
=
98 brw
->gen
== 7 ? SET_FIELD(1, GEN7_MEDIA_VFE_STATE_GPGPU_MODE
) : 0;
99 const uint32_t subslices
= MAX2(brw
->screen
->subslice_total
, 1);
100 OUT_BATCH(SET_FIELD(brw
->max_cs_threads
* subslices
- 1,
101 MEDIA_VFE_STATE_MAX_THREADS
) |
102 SET_FIELD(vfe_num_urb_entries
, MEDIA_VFE_STATE_URB_ENTRIES
) |
103 SET_FIELD(1, MEDIA_VFE_STATE_RESET_GTW_TIMER
) |
104 SET_FIELD(1, MEDIA_VFE_STATE_BYPASS_GTW
) |
108 const uint32_t vfe_urb_allocation
= brw
->gen
>= 8 ? 2 : 0;
110 /* We are uploading duplicated copies of push constant uniforms for each
111 * thread. Although the local id data needs to vary per thread, it won't
112 * change for other uniform data. Unfortunately this duplication is
113 * required for gen7. As of Haswell, this duplication can be avoided, but
114 * this older mechanism with duplicated data continues to work.
116 * FINISHME: As of Haswell, we could make use of the
117 * INTERFACE_DESCRIPTOR_DATA "Cross-Thread Constant Data Read Length" field
118 * to only store one copy of uniform data.
120 * FINISHME: Broadwell adds a new alternative "Indirect Payload Storage"
121 * which is described in the GPGPU_WALKER command and in the Broadwell PRM
122 * Volume 7: 3D Media GPGPU, under Media GPGPU Pipeline => Mode of
123 * Operations => GPGPU Mode => Indirect Payload Storage.
125 * Note: The constant data is built in brw_upload_cs_push_constants below.
127 const uint32_t vfe_curbe_allocation
=
128 ALIGN(cs_prog_data
->push
.per_thread
.regs
* cs_prog_data
->threads
+
129 cs_prog_data
->push
.cross_thread
.regs
, 2);
130 OUT_BATCH(SET_FIELD(vfe_urb_allocation
, MEDIA_VFE_STATE_URB_ALLOC
) |
131 SET_FIELD(vfe_curbe_allocation
, MEDIA_VFE_STATE_CURBE_ALLOC
));
137 if (cs_prog_data
->push
.total
.size
> 0) {
139 OUT_BATCH(MEDIA_CURBE_LOAD
<< 16 | (4 - 2));
141 OUT_BATCH(ALIGN(cs_prog_data
->push
.total
.size
, 64));
142 OUT_BATCH(stage_state
->push_const_offset
);
146 /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
147 memcpy(bind
, stage_state
->surf_offset
,
148 prog_data
->binding_table
.size_bytes
);
150 memset(desc
, 0, 8 * 4);
153 desc
[dw
++] = brw
->cs
.base
.prog_offset
;
155 desc
[dw
++] = 0; /* Kernel Start Pointer High */
157 desc
[dw
++] = stage_state
->sampler_offset
|
158 ((stage_state
->sampler_count
+ 3) / 4);
159 desc
[dw
++] = stage_state
->bind_bo_offset
;
160 desc
[dw
++] = SET_FIELD(cs_prog_data
->push
.per_thread
.regs
,
161 MEDIA_CURBE_READ_LENGTH
);
162 const uint32_t media_threads
=
164 SET_FIELD(cs_prog_data
->threads
, GEN8_MEDIA_GPGPU_THREAD_COUNT
) :
165 SET_FIELD(cs_prog_data
->threads
, MEDIA_GPGPU_THREAD_COUNT
);
166 assert(cs_prog_data
->threads
<= brw
->max_cs_threads
);
168 const uint32_t slm_size
=
169 encode_slm_size(devinfo
->gen
, prog_data
->total_shared
);
172 SET_FIELD(cs_prog_data
->uses_barrier
, MEDIA_BARRIER_ENABLE
) |
173 SET_FIELD(slm_size
, MEDIA_SHARED_LOCAL_MEMORY_SIZE
) |
177 SET_FIELD(cs_prog_data
->push
.cross_thread
.regs
, CROSS_THREAD_READ_LENGTH
);
180 OUT_BATCH(MEDIA_INTERFACE_DESCRIPTOR_LOAD
<< 16 | (4 - 2));
187 const struct brw_tracked_state brw_cs_state
= {
189 .mesa
= _NEW_PROGRAM_CONSTANTS
,
190 .brw
= BRW_NEW_BATCH
|
192 BRW_NEW_CS_PROG_DATA
|
193 BRW_NEW_PUSH_CONSTANT_ALLOCATION
|
194 BRW_NEW_SAMPLER_STATE_TABLE
|
197 .emit
= brw_upload_cs_state
202 * Creates a region containing the push constants for the CS on gen7+.
204 * Push constants are constant values (such as GLSL uniforms) that are
205 * pre-loaded into a shader stage's register space at thread spawn time.
207 * For other stages, see brw_curbe.c:brw_upload_constant_buffer for the
208 * equivalent gen4/5 code and gen6_vs_state.c:gen6_upload_push_constants for
212 brw_upload_cs_push_constants(struct brw_context
*brw
,
213 const struct gl_program
*prog
,
214 const struct brw_cs_prog_data
*cs_prog_data
,
215 struct brw_stage_state
*stage_state
,
216 enum aub_state_struct_type type
)
218 struct gl_context
*ctx
= &brw
->ctx
;
219 const struct brw_stage_prog_data
*prog_data
=
220 (struct brw_stage_prog_data
*) cs_prog_data
;
222 /* Updates the ParamaterValues[i] pointers for all parameters of the
223 * basic type of PROGRAM_STATE_VAR.
225 /* XXX: Should this happen somewhere before to get our state flag set? */
226 _mesa_load_state_parameters(ctx
, prog
->Parameters
);
228 if (cs_prog_data
->push
.total
.size
== 0) {
229 stage_state
->push_const_size
= 0;
234 gl_constant_value
*param
= (gl_constant_value
*)
235 brw_state_batch(brw
, type
, ALIGN(cs_prog_data
->push
.total
.size
, 64),
236 64, &stage_state
->push_const_offset
);
239 STATIC_ASSERT(sizeof(gl_constant_value
) == sizeof(float));
241 if (cs_prog_data
->push
.cross_thread
.size
> 0) {
242 gl_constant_value
*param_copy
= param
;
243 assert(cs_prog_data
->thread_local_id_index
< 0 ||
244 cs_prog_data
->thread_local_id_index
>=
245 cs_prog_data
->push
.cross_thread
.dwords
);
247 i
< cs_prog_data
->push
.cross_thread
.dwords
;
249 param_copy
[i
] = *prog_data
->param
[i
];
253 gl_constant_value thread_id
;
254 if (cs_prog_data
->push
.per_thread
.size
> 0) {
255 for (unsigned t
= 0; t
< cs_prog_data
->threads
; t
++) {
257 8 * (cs_prog_data
->push
.per_thread
.regs
* t
+
258 cs_prog_data
->push
.cross_thread
.regs
);
259 unsigned src
= cs_prog_data
->push
.cross_thread
.dwords
;
260 for ( ; src
< prog_data
->nr_params
; src
++, dst
++) {
261 if (src
!= cs_prog_data
->thread_local_id_index
)
262 param
[dst
] = *prog_data
->param
[src
];
264 thread_id
.u
= t
* cs_prog_data
->simd_size
;
265 param
[dst
] = thread_id
;
271 stage_state
->push_const_size
=
272 cs_prog_data
->push
.cross_thread
.regs
+
273 cs_prog_data
->push
.per_thread
.regs
;
278 gen7_upload_cs_push_constants(struct brw_context
*brw
)
280 struct brw_stage_state
*stage_state
= &brw
->cs
.base
;
282 /* BRW_NEW_COMPUTE_PROGRAM */
283 const struct brw_compute_program
*cp
=
284 (struct brw_compute_program
*) brw
->compute_program
;
287 /* CACHE_NEW_CS_PROG */
288 struct brw_cs_prog_data
*cs_prog_data
= brw
->cs
.prog_data
;
290 _mesa_shader_write_subroutine_indices(&brw
->ctx
, MESA_SHADER_COMPUTE
);
291 brw_upload_cs_push_constants(brw
, &cp
->program
.Base
, cs_prog_data
,
292 stage_state
, AUB_TRACE_WM_CONSTANTS
);
296 const struct brw_tracked_state gen7_cs_push_constants
= {
298 .mesa
= _NEW_PROGRAM_CONSTANTS
,
299 .brw
= BRW_NEW_BATCH
|
301 BRW_NEW_COMPUTE_PROGRAM
|
302 BRW_NEW_PUSH_CONSTANT_ALLOCATION
,
304 .emit
= gen7_upload_cs_push_constants
,
308 * Creates a new CS constant buffer reflecting the current CS program's
309 * constants, if needed by the CS program.
312 brw_upload_cs_pull_constants(struct brw_context
*brw
)
314 struct brw_stage_state
*stage_state
= &brw
->cs
.base
;
316 /* BRW_NEW_COMPUTE_PROGRAM */
317 struct brw_compute_program
*cp
=
318 (struct brw_compute_program
*) brw
->compute_program
;
320 /* BRW_NEW_CS_PROG_DATA */
321 const struct brw_stage_prog_data
*prog_data
= &brw
->cs
.prog_data
->base
;
323 _mesa_shader_write_subroutine_indices(&brw
->ctx
, MESA_SHADER_COMPUTE
);
324 /* _NEW_PROGRAM_CONSTANTS */
325 brw_upload_pull_constants(brw
, BRW_NEW_SURFACES
, &cp
->program
.Base
,
326 stage_state
, prog_data
);
329 const struct brw_tracked_state brw_cs_pull_constants
= {
331 .mesa
= _NEW_PROGRAM_CONSTANTS
,
332 .brw
= BRW_NEW_BATCH
|
334 BRW_NEW_COMPUTE_PROGRAM
|
335 BRW_NEW_CS_PROG_DATA
,
337 .emit
= brw_upload_cs_pull_constants
,