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11 * The above copyright notice and this permission notice (including the next
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15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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24 #include "util/ralloc.h"
25 #include "brw_context.h"
29 #include "brw_shader.h"
30 #include "intel_mipmap_tree.h"
31 #include "intel_batchbuffer.h"
32 #include "brw_state.h"
33 #include "program/prog_statevars.h"
34 #include "compiler/glsl/ir_uniform.h"
37 brw_upload_cs_state(struct brw_context
*brw
)
39 if (!brw
->cs
.prog_data
)
43 uint32_t *desc
= (uint32_t*) brw_state_batch(brw
, AUB_TRACE_SURFACE_STATE
,
45 struct brw_stage_state
*stage_state
= &brw
->cs
.base
;
46 struct brw_cs_prog_data
*cs_prog_data
= brw
->cs
.prog_data
;
47 struct brw_stage_prog_data
*prog_data
= &cs_prog_data
->base
;
48 const struct brw_device_info
*devinfo
= brw
->intelScreen
->devinfo
;
50 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
51 brw
->vtbl
.emit_buffer_surface_state(
52 brw
, &stage_state
->surf_offset
[
53 prog_data
->binding_table
.shader_time_start
],
54 brw
->shader_time
.bo
, 0, BRW_SURFACEFORMAT_RAW
,
55 brw
->shader_time
.bo
->size
, 1, true);
58 uint32_t *bind
= (uint32_t*) brw_state_batch(brw
, AUB_TRACE_BINDING_TABLE
,
59 prog_data
->binding_table
.size_bytes
,
60 32, &stage_state
->bind_bo_offset
);
62 uint32_t dwords
= brw
->gen
< 8 ? 8 : 9;
64 OUT_BATCH(MEDIA_VFE_STATE
<< 16 | (dwords
- 2));
66 if (prog_data
->total_scratch
) {
68 /* Broadwell's Per Thread Scratch Space is in the range [0, 11]
69 * where 0 = 1k, 1 = 4k, 2 = 8k, ..., 11 = 2M.
71 OUT_RELOC64(stage_state
->scratch_bo
,
72 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
73 ffs(prog_data
->total_scratch
) - 11);
74 } else if (brw
->is_haswell
) {
75 /* Haswell's Per Thread Scratch Space is in the range [0, 10]
76 * where 0 = 2k, 1 = 4k, 2 = 8k, ..., 10 = 2M.
78 OUT_RELOC(stage_state
->scratch_bo
,
79 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
80 ffs(prog_data
->total_scratch
) - 12);
82 /* Earlier platforms use the range [0, 11] to mean [1kB, 12kB]
83 * where 0 = 1kB, 1 = 2kB, 2 = 3kB, ..., 11 = 12kB.
85 OUT_RELOC(stage_state
->scratch_bo
,
86 I915_GEM_DOMAIN_RENDER
, I915_GEM_DOMAIN_RENDER
,
87 prog_data
->total_scratch
/ 1024 - 1);
95 const uint32_t vfe_num_urb_entries
= brw
->gen
>= 8 ? 2 : 0;
96 const uint32_t vfe_gpgpu_mode
=
97 brw
->gen
== 7 ? SET_FIELD(1, GEN7_MEDIA_VFE_STATE_GPGPU_MODE
) : 0;
98 const uint32_t subslices
= MAX2(brw
->intelScreen
->subslice_total
, 1);
99 OUT_BATCH(SET_FIELD(brw
->max_cs_threads
* subslices
- 1,
100 MEDIA_VFE_STATE_MAX_THREADS
) |
101 SET_FIELD(vfe_num_urb_entries
, MEDIA_VFE_STATE_URB_ENTRIES
) |
102 SET_FIELD(1, MEDIA_VFE_STATE_RESET_GTW_TIMER
) |
103 SET_FIELD(1, MEDIA_VFE_STATE_BYPASS_GTW
) |
107 const uint32_t vfe_urb_allocation
= brw
->gen
>= 8 ? 2 : 0;
109 /* We are uploading duplicated copies of push constant uniforms for each
110 * thread. Although the local id data needs to vary per thread, it won't
111 * change for other uniform data. Unfortunately this duplication is
112 * required for gen7. As of Haswell, this duplication can be avoided, but
113 * this older mechanism with duplicated data continues to work.
115 * FINISHME: As of Haswell, we could make use of the
116 * INTERFACE_DESCRIPTOR_DATA "Cross-Thread Constant Data Read Length" field
117 * to only store one copy of uniform data.
119 * FINISHME: Broadwell adds a new alternative "Indirect Payload Storage"
120 * which is described in the GPGPU_WALKER command and in the Broadwell PRM
121 * Volume 7: 3D Media GPGPU, under Media GPGPU Pipeline => Mode of
122 * Operations => GPGPU Mode => Indirect Payload Storage.
124 * Note: The constant data is built in brw_upload_cs_push_constants below.
126 const uint32_t vfe_curbe_allocation
=
127 ALIGN(cs_prog_data
->push
.per_thread
.regs
* cs_prog_data
->threads
+
128 cs_prog_data
->push
.cross_thread
.regs
, 2);
129 OUT_BATCH(SET_FIELD(vfe_urb_allocation
, MEDIA_VFE_STATE_URB_ALLOC
) |
130 SET_FIELD(vfe_curbe_allocation
, MEDIA_VFE_STATE_CURBE_ALLOC
));
136 if (cs_prog_data
->push
.total
.size
> 0) {
138 OUT_BATCH(MEDIA_CURBE_LOAD
<< 16 | (4 - 2));
140 OUT_BATCH(ALIGN(cs_prog_data
->push
.total
.size
, 64));
141 OUT_BATCH(stage_state
->push_const_offset
);
145 /* BRW_NEW_SURFACES and BRW_NEW_*_CONSTBUF */
146 memcpy(bind
, stage_state
->surf_offset
,
147 prog_data
->binding_table
.size_bytes
);
149 memset(desc
, 0, 8 * 4);
152 desc
[dw
++] = brw
->cs
.base
.prog_offset
;
154 desc
[dw
++] = 0; /* Kernel Start Pointer High */
156 desc
[dw
++] = stage_state
->sampler_offset
|
157 ((stage_state
->sampler_count
+ 3) / 4);
158 desc
[dw
++] = stage_state
->bind_bo_offset
;
159 desc
[dw
++] = SET_FIELD(cs_prog_data
->push
.per_thread
.regs
,
160 MEDIA_CURBE_READ_LENGTH
);
161 const uint32_t media_threads
=
163 SET_FIELD(cs_prog_data
->threads
, GEN8_MEDIA_GPGPU_THREAD_COUNT
) :
164 SET_FIELD(cs_prog_data
->threads
, MEDIA_GPGPU_THREAD_COUNT
);
165 assert(cs_prog_data
->threads
<= brw
->max_cs_threads
);
167 const uint32_t slm_size
= encode_slm_size(devinfo
, prog_data
->total_shared
);
170 SET_FIELD(cs_prog_data
->uses_barrier
, MEDIA_BARRIER_ENABLE
) |
171 SET_FIELD(slm_size
, MEDIA_SHARED_LOCAL_MEMORY_SIZE
) |
175 SET_FIELD(cs_prog_data
->push
.cross_thread
.regs
, CROSS_THREAD_READ_LENGTH
);
178 OUT_BATCH(MEDIA_INTERFACE_DESCRIPTOR_LOAD
<< 16 | (4 - 2));
185 const struct brw_tracked_state brw_cs_state
= {
187 .mesa
= _NEW_PROGRAM_CONSTANTS
,
188 .brw
= BRW_NEW_BATCH
|
190 BRW_NEW_CS_PROG_DATA
|
191 BRW_NEW_PUSH_CONSTANT_ALLOCATION
|
192 BRW_NEW_SAMPLER_STATE_TABLE
|
195 .emit
= brw_upload_cs_state
200 * Creates a region containing the push constants for the CS on gen7+.
202 * Push constants are constant values (such as GLSL uniforms) that are
203 * pre-loaded into a shader stage's register space at thread spawn time.
205 * For other stages, see brw_curbe.c:brw_upload_constant_buffer for the
206 * equivalent gen4/5 code and gen6_vs_state.c:gen6_upload_push_constants for
210 brw_upload_cs_push_constants(struct brw_context
*brw
,
211 const struct gl_program
*prog
,
212 const struct brw_cs_prog_data
*cs_prog_data
,
213 struct brw_stage_state
*stage_state
,
214 enum aub_state_struct_type type
)
216 struct gl_context
*ctx
= &brw
->ctx
;
217 const struct brw_stage_prog_data
*prog_data
=
218 (struct brw_stage_prog_data
*) cs_prog_data
;
220 /* Updates the ParamaterValues[i] pointers for all parameters of the
221 * basic type of PROGRAM_STATE_VAR.
223 /* XXX: Should this happen somewhere before to get our state flag set? */
224 _mesa_load_state_parameters(ctx
, prog
->Parameters
);
226 if (cs_prog_data
->push
.total
.size
== 0) {
227 stage_state
->push_const_size
= 0;
232 gl_constant_value
*param
= (gl_constant_value
*)
233 brw_state_batch(brw
, type
, ALIGN(cs_prog_data
->push
.total
.size
, 64),
234 64, &stage_state
->push_const_offset
);
237 STATIC_ASSERT(sizeof(gl_constant_value
) == sizeof(float));
239 if (cs_prog_data
->push
.cross_thread
.size
> 0) {
240 gl_constant_value
*param_copy
= param
;
241 assert(cs_prog_data
->thread_local_id_index
< 0 ||
242 cs_prog_data
->thread_local_id_index
>=
243 cs_prog_data
->push
.cross_thread
.dwords
);
245 i
< cs_prog_data
->push
.cross_thread
.dwords
;
247 param_copy
[i
] = *prog_data
->param
[i
];
251 gl_constant_value thread_id
;
252 if (cs_prog_data
->push
.per_thread
.size
> 0) {
253 for (unsigned t
= 0; t
< cs_prog_data
->threads
; t
++) {
255 8 * (cs_prog_data
->push
.per_thread
.regs
* t
+
256 cs_prog_data
->push
.cross_thread
.regs
);
257 unsigned src
= cs_prog_data
->push
.cross_thread
.dwords
;
258 for ( ; src
< prog_data
->nr_params
; src
++, dst
++) {
259 if (src
!= cs_prog_data
->thread_local_id_index
)
260 param
[dst
] = *prog_data
->param
[src
];
262 thread_id
.u
= t
* cs_prog_data
->simd_size
;
263 param
[dst
] = thread_id
;
269 stage_state
->push_const_size
=
270 cs_prog_data
->push
.cross_thread
.regs
+
271 cs_prog_data
->push
.per_thread
.regs
;
276 gen7_upload_cs_push_constants(struct brw_context
*brw
)
278 struct brw_stage_state
*stage_state
= &brw
->cs
.base
;
280 /* BRW_NEW_COMPUTE_PROGRAM */
281 const struct brw_compute_program
*cp
=
282 (struct brw_compute_program
*) brw
->compute_program
;
285 /* CACHE_NEW_CS_PROG */
286 struct brw_cs_prog_data
*cs_prog_data
= brw
->cs
.prog_data
;
288 brw_upload_cs_push_constants(brw
, &cp
->program
.Base
, cs_prog_data
,
289 stage_state
, AUB_TRACE_WM_CONSTANTS
);
293 const struct brw_tracked_state gen7_cs_push_constants
= {
295 .mesa
= _NEW_PROGRAM_CONSTANTS
,
296 .brw
= BRW_NEW_BATCH
|
298 BRW_NEW_COMPUTE_PROGRAM
|
299 BRW_NEW_PUSH_CONSTANT_ALLOCATION
,
301 .emit
= gen7_upload_cs_push_constants
,
305 * Creates a new CS constant buffer reflecting the current CS program's
306 * constants, if needed by the CS program.
309 brw_upload_cs_pull_constants(struct brw_context
*brw
)
311 struct brw_stage_state
*stage_state
= &brw
->cs
.base
;
313 /* BRW_NEW_COMPUTE_PROGRAM */
314 struct brw_compute_program
*cp
=
315 (struct brw_compute_program
*) brw
->compute_program
;
317 /* BRW_NEW_CS_PROG_DATA */
318 const struct brw_stage_prog_data
*prog_data
= &brw
->cs
.prog_data
->base
;
320 /* _NEW_PROGRAM_CONSTANTS */
321 brw_upload_pull_constants(brw
, BRW_NEW_SURFACES
, &cp
->program
.Base
,
322 stage_state
, prog_data
);
325 const struct brw_tracked_state brw_cs_pull_constants
= {
327 .mesa
= _NEW_PROGRAM_CONSTANTS
,
328 .brw
= BRW_NEW_BATCH
|
330 BRW_NEW_COMPUTE_PROGRAM
|
331 BRW_NEW_CS_PROG_DATA
,
333 .emit
= brw_upload_cs_pull_constants
,